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Zarlink
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Part No. |
PDSP16116MC PDSP16116A PDSP16116
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OCR Text |
...y Multipliers, two 32 bit Adder/subtractors and all the control logic required to support Block Floating Point Arithmetic as used in FFT applications. In combination with a PDSP16318, the PDSP16116A forms a two chip 10MHz Complex Multiplier... |
Description |
16 by 16 Bit Complex Multiplier
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File Size |
140.35K /
18 Page |
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it Online |
Download Datasheet
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ZARLINK[Zarlink Semiconductor Inc]
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Part No. |
PDSP16318MC PDSP16318GC1R
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OCR Text |
...s two independent 20-bit Adder/ subtractors combined with accumulator registers and shift structures. The four port architecture permits full 10MHz throughout in FFT and filter applications. Two PDSP16318s combined with a single PDSP16112A ... |
Description |
Complex Accumulator
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File Size |
87.47K /
8 Page |
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it Online |
Download Datasheet
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Zarlink
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Part No. |
PDSP16318A 242
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OCR Text |
...ns two independent 20-bit Adder/subtractors combined with accumulator registers and shift structures. The four port architecture permits full 20MHz throughout in FFT and filter applications. Two PDSP16318As combined with a single PDSP16112A... |
Description |
Complex Accumulator From old datasheet system
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File Size |
82.54K /
7 Page |
View
it Online |
Download Datasheet
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