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				Cypress Semiconductor
Part No.	CYDM256B16 CYDM064B16 CYDM128B16
OCR Text	...endent, asynchronous access for reads and writes to any location in memory. The devices can be utilized as standalone 16-bit dual-port static RAMs or multiple devices can be combined in order to function as a 32-bit or wider master/slave du...
Description	1.8V 4K/8K/16K x 16 MoBL㈢ Dual-Port Static RAM
File Size	641.76K / 25 Page	View it Online	Download Datasheet

				Ramtron International C... Ramtron International Corporation
Part No.	FM21L16 FM21L16-60-TG
OCR Text	...128Kx16 nonvolatile memory that reads and writes like a standard SRAM. A ferroelectric random access memory or FRAM is nonvolatile, which means that data is retained after power is removed. It provides data retention for over 10 years while...
Description	2Mbit FRAM Memory
File Size	226.66K / 14 Page	View it Online	Download Datasheet

				PHILIPS[Philips Semiconductors]
Part No.	P32P4910A P32P4910
OCR Text	...cquisition, sampled during data reads * Separate AGC level storage pins for data and servo * Dual rate attack and decay charge pump for rapid AGC recovery (analog) * Programmable, symmetric, charge pump currents for data reads (sampled) * C...
Description	PRML Read Channel with PR4, 8/9 ENDEC, 4-Burst Servo
File Size	323.04K / 64 Page	View it Online	Download Datasheet

				Qimonda AG
Part No.	HYB25DC256163CE-4 HYB25DC256163CE-5 HYB25DC256163CE-6
OCR Text	...S is edge-aligned with data for reads and is center-aligned with data for writes Differential clock inputs (CK and CK) Four internal banks for concurrent operation Data mask (DM) for write data DLL aligns DQ and DQS transitions with CK tran...
Description	256-Mbit Double-Data-Rate SGRAM
File Size	868.35K / 29 Page	View it Online	Download Datasheet

				Qimonda AG
Part No.	HYI25D256160CC-5 HYI25D256160CE-5 HYI25D256160CE-6 HYI25D256160CF-5 HYI25D256160CF-6 HYI25D256160CT-5 HYI25D256160CT-6 HYB25D256800CEL-6 HYB25D256160CEL-6 HYB25D256400CC-5 HYB25D256800CC-5 HYI25D256800CC-5 HYB25D256400CC-6 HYB25D256800CC-6 HYI25D256800CC-6 HYB25D256800CF-5 HYB25D256800CF-6 HYB25D256400CT-5 HYB25D256400CT-6 HYB25D256400CT-7 HYB25D256400CE-7
OCR Text	...S is edge-aligned with data for reads and is centeraligned with data for writes * Differential clock inputs (CK and CK) * Four internal banks for concurrent operation * Data mask (DM) for write data * DLL aligns DQ and DQS transitions with ...
Description	256-Mbit Double-Data-Rate SDRAM
File Size	1,069.90K / 39 Page	View it Online	Download Datasheet

				Toshiba Semiconductor
Part No.	TMPR3922AU
OCR Text	...s and only become inputs during reads, thus no resistors are required since the bus will only float for a short period of time during bus turn-around. These pins are the address bus for the system. The address lines are multiplexed and can ...
Description	32-bit RISC Microprocessor
File Size	251.61K / 45 Page	View it Online	Download Datasheet

				IDT[Integrated Device Technology]
Part No.	IDT79R3041 IDT79R3041-16 IDT79R3041-20 IDT79R3041-25 IDT79R3041-33 IDT79RV3041 IDT79RV3041-16 IDT79RV3041-20 IDT79RV3041-25 IDT79RV3041-33 IDT79R3041-20J IDT79R3041-20J8 IDT79R3041-20PF IDT79R3041-20PF8 IDT79R3041-33J IDT79R3041-33PF IDT79R3041-33PF8 IDT79R3041-33J8 IDT79R3041-25J IDT79R3041-25J8 IDT79R3041-25PF IDT79R3041-25PF8 IDT79R304116J IDT79R304116PF IDT79R304120J IDT79R304120PF IDT79R304125J IDT79R304125PF IDT79R304133J IDT79R304133PF
OCR Text	... supports burst or simple block reads On-chip DMA arbiter On-chip 24-bit timer Boot from 8-bit, 16-bit, or 32-bit wide PROMs Pin- and software-compatible family includes R3041, R3051, R3052TM, and R3081TM Complete software support -- Optimi...
Description	32-bit Low-Cost CPU. NOT RECOMMENDED FOR NEW DESIGNS INTEGRATED RISController FOR LOW-COST SYSTEMS INTEGRATED RISController? INTEGRATED RISController⑩ FOR LOW-COST SYSTEMS
File Size	390.32K / 34 Page	View it Online	Download Datasheet

				IDT[Integrated Device Technology]
Part No.	IDT79R3051 IDT79R3051-20 IDT79R3051-20J IDT79R3051-20MJ IDT79R3051-25 IDT79R3051-25J IDT79R3051-25MJ IDT79R3051-33 IDT79R3051-33J IDT79R3051-33MJ IDT79R3051-40 IDT79R3051-40J IDT79R3051-40MJ IDT79R3051E IDT79R3051E-20 IDT79R3051E-20J IDT79R3051E-20MJ IDT79R3051E-25 IDT79R3051E-25J IDT79R3051E-25MJ IDT79R3051E-33 IDT79R3051E-33J IDT79R3051E-33MJ IDT79R3051E-40 IDT79R3051E-40J IDT79R3051E-40MJ IDT79R3052 IDT79R3052-20 IDT79R3052-20J IDT79R3052-20MJ IDT79R3052-25 IDT79R3052-25J IDT79R3052-25MJ IDT79R3052-33 IDT79R3052-33J IDT79R3052-33MJ IDT79R3052-40 IDT79R3052-40J IDT79R3052-40MJ IDT79R3052E IDT79R3052E-20 IDT79R3052E-20J IDT79R3052E-20MJ IDT79R3052E-25 IDT79R3052E-25J IDT79R3052E-25MJ IDT79R3052E-33 IDT79R3052E-33J IDT79R3052E-33MJ IDT79R3052E-40 IDT79R3052E-40J IDT79R3052E-40MJ IDT79R305125MJ IDT79R3052E25MJ IDT79R305133MJ
OCR Text	...rface performs both single word reads and quad word reads. Single word reads work with a simple handshake, and quad word reads can either utilize the simple handshake (in lower performance, simple systems) or utilize a tighter timing mode w...
Description	RISControllers
File Size	179.35K / 23 Page	View it Online	Download Datasheet

				PLX Technology
Part No.	PCI9656-BA66BI PCI9656-BA66BIG PCI9656
OCR Text	...it local bus devices - Deferred reads, deferred writes, read ahead, posted writes, programmable read prefetch counter 64-bit, 66MHz PCI operation 32-bit, 66MHz local bus operation Dynamic DMA descriptor ring management with Valid bit sem...
Description	64-bit, 66MHz PCI Bus Mastering I/O Accelerator for Motorola PowerQUICC⑩ & Generic 32-bit, 66MHz Local Bus Designs 64-bit, 66MHz PCI Bus Mastering I/O Accelerator for Motorola PowerQUICC & Generic 32-bit, 66MHz Local Bus Designs 64-bit, 66MHz PCI Bus Mastering I/O Accelerator for Motorola PowerQUICC?/a> & Generic 32-bit, 66MHz Local Bus Designs
File Size	406.98K / 4 Page	View it Online	Download Datasheet

				Qimonda AG
Part No.	HYB25DC128800CE-5 HYB25DC128800CE-6 HYB25DC128160CE-5 HYB25DC128160CE-6
OCR Text	...S is edge-aligned with data for reads and is center-aligned with data for writes Differential clock inputs Four internal banks for concurrent operation Data mask (DM) for write data DLL aligns DQ and DQS transitions with CK transitions Comm...
Description	128-Mbit Double-Data-Rate SDRAM
File Size	1,009.23K / 32 Page	View it Online	Download Datasheet

For reads Found Datasheets File :: 7672 Search Time::1.172ms
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