|
|
 |
Cypress
|
Part No. |
CY7C1334F-133AC
|
OCR Text |
...itions. all synchronous inputs pass through input registers controlled by the rising edge of the clock. all data outputs pass through output registers controlled by t he rising edge of the clock. the clock input is qualified by the clock e... |
Description |
2-Mbit (64K x 32) Pipelined SRAM with NoBL(TM) Architecture
|
File Size |
255.08K /
14 Page |
View
it Online |
Download Datasheet
|
|
|
 |
Siemens Semiconductor G...
|
Part No. |
MGP3006
|
OCR Text |
... (pll is locked). an active low-pass filter integrates the current pulses to generate the tuning voltage for the vco (internal amplifier, ex...through an i 2 c bus control. depending on their function the data are subsequently stored in regist... |
Description |
GHz PLL with I2C Bus and Four Chip Addresses
|
File Size |
448.03K /
21 Page |
View
it Online |
Download Datasheet
|
|

Price and Availability
|