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ICS
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Part No. |
ICS8735I-21
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OCR Text |
...250MHz to 700MHz * Programmable dividers allow for the following output-to-input frequency ratios: 8:1, 4:1, 2:1, 1:1, 1:2, 1:4, 1:8 * External feedback for "zero delay" clock regeneration with configurable frequencies * Cycle-to-cycle jitt... |
Description |
Low Skew, 1-to-1, Differential-to- LVPECL Clock Generator. Industrial Temperature.
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File Size |
144.47K /
14 Page |
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it Online |
Download Datasheet
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AGERE[Agere Systems]
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Part No. |
T8100
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OCR Text |
...ffecting Page 38, Section 2.4.2 dividers and Rate Multipliers
There is an anomaly in the digital phase-lock loop (DPLL) performance of the device. The behavior affects all versions of the T8100 but has been corrected in the T8100A, T8102, ... |
Description |
H.100/H.110 Interface and Time-Slot Interchanger
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File Size |
1,439.07K /
92 Page |
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it Online |
Download Datasheet
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Price and Availability
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