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Hynix Semiconductor, Inc.
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| Part No. |
HY5RS123235FP-2 HY5RS123235FP-16 HY5RS123235FP-11 HY5RS123235FP-12
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| OCR Text |
...al, pipelined double-data-rate (ddr) architecture; two data accesses per clock cycle ? calibrated output driver ? differential clock inputs...2, 3, 4, 5, 6) ? boundary scan feature for connectivity test(refer to jedec std., not in this versi... |
| Description |
16M X 32 DDR DRAM, 0.25 ns, PBGA136 12 X 14 MM, LEAD FREE, FBGA-136
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| File Size |
913.59K /
62 Page |
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