 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| hexfet power mosfet s d g fig 1. typical on-resistance vs. gate voltage fig 2. maximum drain current vs. case temperature benefits improved gate, avalanche and dynamic dv/dt ruggedness fully characterized capacitance and avalanche soa enhanced body diode dv/dt and di/dt capability lead-free halogen free applications brushed motor drive applications bldc motor drive applications pwm inverterized topologies battery powered circuits half-bridge and full-bridge topologies electronic ballast applications synchronous rectifier applications resonant mode power supplies or-ing and redundant power switches dc/dc and ac/dc converters gds gate drain source 4 6 8 10 12 14 16 18 20 v gs, gate -to -source voltage (v) 1.0 2.0 3.0 4.0 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( m ) i d = 100a t j = 25c t j = 125c 25 50 75 100 125 150 175 t c , case temperature (c) 0 50 100 150 200 250 300 i d , d r a i n c u r r e n t ( a ) limited by package v dss 40v r ds(on) typ. 1.1m max. 1.4m i d (silicon limited) 295a i d (package limited) 195a form quantity tube 50 irfs7437-7ppbf tape and reel left 800 IRFS7437TRL7PP base part number package type standard pack orderable part number irfs7437-7ppbf d2pak-7pin downloaded from: http:/// calculated continuous current based on maximum allowable junctiontemperature. bond wire current limit is 195a. note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements. repetitive rating; pulse width limited by max. junctiontemperature. limited by t jmax , starting t j = 25c, l = 0.069mh r g = 50 , i as = 100a, v gs =10v. i sd 100a, di/dt 1288a/ s, v dd v (br)dss , t j 175c. pulse width 400 s; duty cycle 2%. c oss eff. (tr) is a fixed capacitance that gives the same charging time as c oss while v ds is rising from 0 to 80% v dss . c oss eff. (er) is a fixed capacitance that gives the same energy as c oss while v ds is rising from 0 to 80% v dss . when mounted on 1" square pcb (fr-4 or g-10 material). for recommended footprint and soldering techniques refer to application note #an-994. !"#$ limited by t jmax , starting t j = 25c, l = 0.069mh,r g = 50 , i as = 40a, v gs =10v. absolute maximum ratings symbol parameter units i d @ t c = 25c continuous drain current, v gs @ 10v (silicon limited) i d @ t c = 100c continuous drain current, v gs @ 10v (silicon limited) i d @ t c = 25c continuous drain current, v gs @ 10v (wire bond limited) i dm pulsed drain current p d @t c = 25c maximum power dissipation w linear derating factor w/c v gs gate-to-source voltage v dv/dt peak diode recovery v/ns t j operating junction and t stg storage temperature range soldering temperature, for 10 seconds (1.6mm from case) avalanche characteristics e as (thermally limited) single pulse avalanche energy e as (thermally limited) single pulse avalanche energy i ar avalanche current a e ar repetitive avalanche energy mj thermal resistance symbol parameter typ. max. units r jc junction-to-case CCC 0.65 r ja junction-to-ambient (pcb mount) CCC 40 c/w a c 300 344 see fig. 14, 15, 22a, 22b 20 1.5 mj 231 3.5 max. 295 208 1040 195 796 -55 to + 175 static @ t j = 25c (unless otherwise specified) symbol parameter min. typ. max. units v (br)dss drain-to-source breakdown voltage 40 CCC CCC v v (br)dss / t j breakdown voltage temp. coefficient CCC 0.035 CCC v/c r ds(on) static drain-to-source on-resistance CCC 1.1 1.4 m 1.7 CCC m v gs(th) gate threshold voltage 2.2 CCC 3.9 v i dss drain-to-source leakage current CCC CCC 1.0 a CCC CCC 150 i gss gate-to-source forward leakage CCC CCC 100 na gate-to-source reverse leakage CCC CCC -100 r g internal gate resistance CCC 2.2 CCC conditions v gs = 0v, i d = 250 a reference to 25c, i d = 1.0ma v gs = 10v, i d = 100a v ds = v gs , i d = 150 a v gs = 20v v gs = -20v v ds = 40v, v gs = 0v v ds = 40v, v gs = 0v, t j = 125c v gs = 6.0v, i d = 50a downloaded from: http:/// s d g dynamic @ t j = 25c (unless otherwise specified) symbol parameter min. typ. max. units gfs forward transconductance 122 CCC CCC s q g total gate charge CCC 150 225 nc q gs gate-to-source charge CCC 41 CCC q gd gate-to-drain ("miller") charge CCC 51 CCC q sync total gate charge sync. (q g - q gd ) CCC 99 CCC t d(on) turn-on delay time CCC 18 CCC ns t r r i s e t i m e C C C6 2C C C t d(off) t u r n - o f f d e l a y t i m e C C C7 8C C C t f fall time CCC 51 CCC c iss input capacitance CCC 7437 CCC pf c oss output capacitance CCC 1097 CCC c rss reverse transfer capacitance CCC 748 CCC c oss eff. (er) effective output capacitance (energy related) CCC 1314 CCC c oss eff. (tr) effective output capacitance (time related) CCC 1735 CCC diode characteristics symbol parameter min. typ. max. units i s continuous source current CCC CCC 285 a (body diode) i sm pulsed source current CCC CCC 1040 a (body diode) v sd diode forward voltage CCC 1.0 1.3 v t rr reverse recovery time CCC 37 CCC ns t j = 25c v r = 34v, C C C3 8C C C t j = 125c i f = 100a q rr reverse recovery charge CCC 34 CCC nc t j = 25c di/dt = 100a/ s C C C3 6C C C t j = 125c i rrm reverse recovery current CCC 1.8 CCC a t j = 25c t on forward turn-on time intrinsic turn-on time is negligible (turn-on is dominated by ls+ld) conditions v gs = 10v v gs = 0v v ds = 25v ? = 1.0 mhz v gs = 0v, v ds = 0v to 32v v gs = 0v, v ds = 0v to 32v t j = 25c, i s = 100a, v gs = 0v integral reverse p-n junction diode. mosfet symbol showing the r g = 2.7 v gs = 10v v dd = 20v i d = 100a, v ds = 20v, v gs = 10v conditions v ds = 10v, i d = 100a v ds = 20v i d = 100a i d = 30a downloaded from: http:/// fig 3. typical output characteristics fig 5. typical transfer characteristics fig 6. normalized on-resistance vs. temperature fig 4. typical output characteristics fig 8. typical gate charge vs. gate-to-source voltage fig 7. typical capacitance vs. drain-to-source voltage 0.1 1 10 100 v ds , drain-to-source voltage (v) 1 10 100 1000 10000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) vgs top 15v 10v 8.0v 7.0v 6.5v 6.0v 5.5v bottom 5.0v 60 s pulse width tj = 25c 5.0v 0.1 1 10 100 v ds , drain-to-source voltage (v) 10 100 1000 10000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 5.0v 60 s pulse width tj = 175c vgs top 15v 10v 8.0v 7.0v 6.5v 6.0v 5.5v bottom 5.0v -60 -40 -20 0 20 40 60 80 100 120 140 160 180 t j , junction temperature (c) 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( n o r m a l i z e d ) i d = 100a v gs = 10v 1 10 100 v ds , drain-to-source voltage (v) 100 1000 10000 100000 c , c a p a c i t a n c e ( p f ) v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd c oss c rss c iss 0 20 40 60 80 100 120 140 160 180 200 q g , total gate charge (nc) 0.0 2.0 4.0 6.0 8.0 10.0 12.0 14.0 v g s , g a t e - t o - s o u r c e v o l t a g e ( v ) v ds = 32v v ds = 20v i d = 100a 2 3 4 5 6 7 8 9 v gs , gate-to-source voltage (v) 1.0 10 100 1000 10000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) t j = 25c t j = 175c v ds = 10v 60 s pulse width downloaded from: http:/// fig 10. maximum safe operating area fig 11. drain-to-source breakdown voltage fig 9. typical source-drain diode forward voltage fig 12. typical c oss stored energy fig 13. typical on-resistance vs. drain current -60 -40 -20 0 20 40 60 80 100 120 140 160 180 t j , temperature ( c ) 40 41 42 43 44 45 46 47 48 49 v ( b r ) d s s , d r a i n - t o - s o u r c e b r e a k d o w n v o l t a g e ( v ) id = 1.0ma 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 v sd , source-to-drain voltage (v) 1.0 10 100 1000 10000 i s d , r e v e r s e d r a i n c u r r e n t ( a ) t j = 25c t j = 175c v gs = 0v -5 0 5 10 15 20 25 30 35 40 v ds, drain-to-source voltage (v) -0.1 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 e n e r g y ( j ) 0 200 400 600 800 1000 1200 i d , drain current (a) 0.0 2.0 4.0 6.0 8.0 10.0 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( m ) v gs = 6.0v v gs = 7.0v v gs = 8.0v v gs =10v 0.1 1 10 100 v ds , drain-tosource voltage (v) 0.1 1 10 100 1000 10000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) tc = 25c tj = 175c single pulse 1msec 10msec operation in this area limited by r ds (on) 100 sec dc limited by package downloaded from: http:/// ! fig 14. maximum effective transient thermal impedance, junction-to-case fig 15. typical avalanche current vs.pulsewidth fig 16. maximum avalanche energy vs. temperature notes on repetitive avalanche curves , figures 14, 15:(for further info, see an-1005 at www.irf.com) 1. avalanche failures assumption: purely a thermal phenomenon and failure occurs at a temperature far inexcess of t jmax . this is validated for every part type. 2. safe operation in avalanche is allowed as long ast jmax is not exceeded. 3. equation below based on circuit and waveforms shown in figures 16a, 16b.4. p d (ave) = average power dissipation per single avalanche pulse. 5. bv = rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. i av = allowable avalanche current. 7. t = allowable rise in junction temperature, not to exceed t jmax (assumed as 25c in figure 14, 15).t av = average time in avalanche. d = duty cycle in avalanche = t av f z thjc (d, t av ) = transient thermal resistance, see figures 13) p d (ave) = 1/2 ( 1.3bvi av ) = t/ z thjc i av = 2 t/ [1.3bvz th ] e as (ar) = p d (ave) t av 1e-006 1e-005 0.0001 0.001 0.01 0.1 1 t 1 , rectangular pulse duration (sec) 0.0001 0.001 0.01 0.1 1 t h e r m a l r e s p o n s e ( z t h j c ) c / w 0.20 0.10 d = 0.50 0.02 0.01 0.05 single pulse ( thermal response ) notes: 1. duty factor d = t1/t2 2. peak tj = p dm x zthjc + tc 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 50 100 150 200 250 300 350 e a r , a v a l a n c h e e n e r g y ( m j ) top single pulse bottom 1.0% duty cycle i d = 100a 1.0e-06 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 tav (sec) 1 10 100 1000 a v a l a n c h e c u r r e n t ( a ) allowed avalanche current vs avalanche pulsewidth, tav, assuming ? j = 25c and tstart = 150c. allowed avalanche current vs avalanche pulsewidth, tav, assuming tj = 150c and tstart =25c (single pulse) downloaded from: http:/// " #$%& '%(' ) fig 17. threshold voltage vs. temperature #$%& (*' ) #$%& '%(' ) #$%& (*' ) -75 -50 -25 0 25 50 75 100 125 150 175 t j , temperature ( c ) 1.0 2.0 3.0 4.0 5.0 v g s ( t h ) , g a t e t h r e s h o l d v o l t a g e ( v ) i d = 150 a i d = 1.0ma i d = 1.0a 0 200 400 600 800 1000 di f /dt (a/ s) 0 2 4 6 8 10 12 i r r m ( a ) i f = 60a v r = 34v t j = 25c t j = 125c 0 200 400 600 800 1000 di f /dt (a/ s) 0 2 4 6 8 10 12 i r r m ( a ) i f = 100a v r = 34v t j = 25c t j = 125c 0 200 400 600 800 1000 di f /dt (a/ s) 0 50 100 150 200 250 300 q r r ( n c ) i f = 60a v r = 34v t j = 25c t j = 125c 0 200 400 600 800 1000 di f /dt (a/ s) 0 50 100 150 200 250 300 q r r ( n c ) i f = 100a v r = 34v t j = 25c t j = 125c downloaded from: http:/// + fig 23a. switching time test circuit fig 23b. switching time waveforms fig 22b. unclamped inductive waveforms fig 22a. unclamped inductive test circuit t p v (br)dss i as r g i as 0.01 t p d.u.t l v ds + - v dd driver a 15v 20v v gs fig 24a. gate charge test circuit fig 24b. gate charge waveform vds vgs id vgs(th) qgs1 qgs2 qgd qgodr fig 22. , '% ') $( for n-channel hexfet power mosfets ? ? ? p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-appliedvoltage reverserecovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period - % &'% ()*( + +* - + - + + + - - - % ? ! " ? # $%$$ ? ! & ' ' ? $%$$( % d.u.t. v ds i d i g 3ma v gs .3 f 50k .2 f 12v current regulator same type as d.u.t. current sampling resistors + - v ds 90%10% v gs t d(on) t r t d(off) t f % ) * 1 + & 0.1 % % $,$ $ % + - % % downloaded from: http:/// . d 2 pak - 7 pin package outline dimensions are shown in millimeters (inches) downloaded from: http:/// d 2 pak - 7 pin part marking information d 2 pak - 7 pin tape and reel ywwp irfs7437-7p assembly lot code international rectifier logo part number date code y = last digit of year ww = work week p = lead-free lc lc downloaded from: http:/// /0 12 &2)) )& # )%) //3*4 * %' ' 4 , % &' 2&2 ) # )&) ///5&& ' 677( & ms l 1 (per je de c j-s t d-020d ??? ) rohs compliant (per jedec jesd47f ??? guidelines) yes qualification information ? industrial ?? qualification level d 2 pak-7pin moisture sensitivity level ir world headquarters: 101 n. sepulveda blvd., el segundo, california 90245, usa to contact international rectifier, please visit http://www.irf.com/whoto-call/ revision history date comment ? updated data sheet based on corporate template. ? updated package outline and part marking on page 9 & 10. ? updated e as (l =1mh) = 796mj on page 2 ? updated note 10 limited by t jmax , starting t j = 25c, l = 1mh, r g = 50 , i as = 40a, v gs =10v. on page 2 4/30/2014 2/19/2015 downloaded from: http:/// |
Price & Availability of IRFS7437TRL7PP
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |