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sn74lvc1g99 www.ti.com sces609g ? september 2004 ? revised november 2013 ultra-configurable multiple-function gate with 3-state output check for samples: sn74lvc1g99 1 features description the sn74lvc1g99 device is operational from 1.65 v 2 ? available in texas instruments to 5.5 v. nanofree ? package the sn74lvc1g99 device features configurable ? supports 5-v v cc operation multiple functions with a 3-state output. the output is ? inputs accept voltages to 5.5 v disabled when the output-enable ( oe) input is high. ? supports down translation to v cc when oe is low, the output state is determined by 16 patterns of 4-bit input. the user can choose logic ? max t pd of 6.7 ns at 3.3 v functions, such as mux, and, or, nand, nor, ? low power consumption, 10- a max i cc xor, xnor, inverter, and buffer. all inputs can be ? 24-ma output drive at 3.3 v connected to v cc or gnd. ? offers nine different logic functions in a this device functions as an independent inverter, but single package because of schmitt action, it has different input ? i off supports live insertion, partial-power- threshold levels for positive-going (v t+ ) and negative- down mode, and back-drive protection going (v t ? ) signals. ? input hysteresis allows for slow input to ensure the high-impedance state during power up transition time and better noise immunity at or power down, oe should be tied to v cc through a input pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the ? latch-up performance exceeds 100 ma per driver. jesd 78, class ii this device is fully specified for partial-power-down ? esd protection exceeds jesd 22 applications using i off . the i off circuitry disables the ? 2000-v human-body model (a114-a) outputs, preventing damaging current backflow ? 200-v machine model (a115-a) through the device when it is powered down. ? 1000-v charged-device model (c101) nanofree ? package technologies are a major breakthrough in ic packaging concepts, using the die as the package. 1 please be aware that an important notice concerning availability, standard warranty, and use in critical applications of texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2 nanofree is a trademark of texas instruments. production data information is current as of publication date. copyright ? 2004 ? 2013, texas instruments incorporated products conform to specifications per the terms of the texas instruments standard warranty. production processing does not necessarily include testing of all parameters. see mechanical drawings for dimensions. dct package (top view) dcu package (top view) yzp package (bottom view) 1 v cc 8 oe 2 7 a y 3 6 b d 4 5 gnd c 3 6 d b 8 1 v cc oe 5 gnd 4 c 2 7 y a gnd 5 4 c 3 6 d b 2 7 y a 8 v cc 1 oe
sn74lvc1g99 sces609g ? september 2004 ? revised november 2013 www.ti.com these devices have limited built-in esd protection. the leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the mos gates. function table inputs output oe d c b a y l l l l l l l l l l h h l l l h l l l l l h h h l l h l l l l l h l h l l l h h l h l l h h h h l h l l l h l h l l h l l h l h l h l h l h h l l h h l l h l h h l h h l h h h l l l h h h h l h h or l h or l h or l h or l z logic diagram (positive logic) 2 submit documentation feedback copyright ? 2004 ? 2013, texas instruments incorporated product folder links: sn74lvc1g99 a 2 b 3 c 7 d 6 y 5 oe 1
sn74lvc1g99 www.ti.com sces609g ? september 2004 ? revised november 2013 function selection table primary function complementary function page 3-state buffer 3 3-state inverter 3 3-state 2-in-1 data selector mux 4 3-state 2-in-1 data selector mux, inverted out 4 3-state 2-input and 3-state 2-input nor, both inputs inverted 5 3-state 2-input and, one input inverted 3-state 2-input nor, one input inverted 5 3-state 2-input and, both inputs inverted 3-state 2-input nor 5 3-state 2-input nand 3-state 2-input or, both inputs inverted 6 3-state 2-input nand, one input inverted 3-state 2-input or, one input inverted 6 3-state 2-input nand, both inputs inverted 3-state 2-input or 6 3-state 2-input xor 7 3-state 2-input xnor 3-state 2-input xor, one input inverted 7 3-state buffer functions available function oe a b c d input h or l l l h or l input h l l h input l 3-state buffer l h l input h h h or l l input h or l l h input l l h or l input copyright ? 2004 ? 2013, texas instruments incorporated submit documentation feedback 3 product folder links: sn74lvc1g99 input y oe
sn74lvc1g99 sces609g ? september 2004 ? revised november 2013 www.ti.com 3-state inverter functions available function oe a b c d input h or l l h x input h h l h input h 3-state buffer l h l input l h h or l l input h or l h h input h h h or l input 3-state mux functions available function oe a b c d 3-state 2-to-1, data selector mux input 1 input 2 input 1 or input 2 l 3-state 2-to-1, data selector mux input 2 input 1 input 2 or input 1 l l 3-state 2-to-1, data selector mux, inverted out input 1 input 2 input 1 or input 2 h 3-state 2-to-1, data selector mux, inverted out input 2 input 1 input 2 or input 1 h 4 submit documentation feedback copyright ? 2004 ? 2013, texas instruments incorporated product folder links: sn74lvc1g99 input 1 input 2 a /b y input 1 input 2 a /b y input y oe
sn74lvc1g99 www.ti.com sces609g ? september 2004 ? revised november 2013 3-state and/nor/or functions available no. of inputs and/nand function or/nor function oe a b c d 2 3-state and 3-state nor l input 1 input 2 l l 2 3-state and 3-state nor l input 2 input 1 l no. of inputs and/nand function or/nor function oe a b c d 2 3-state and 3-state nor input 2 l input 1 l l 2 3-state and 3-state nor h input 1 input 2 h no. of inputs and/nand function or/nor function oe a b c d 2 3-state and 3-state nor input 1 l input 2 l l 2 3-state and 3-state nor h input 2 input 1 h no. of inputs and/nand function or/nor function oe a b c d 2 3-state and, both inverted inputs 3-state nor input 1 h input 2 h l 2 3-state and, both inverted inputs 3-state nor input 2 h input 1 h copyright ? 2004 ? 2013, texas instruments incorporated submit documentation feedback 5 product folder links: sn74lvc1g99 input 1 y input 2 input 1 y input 2 oe oe input 1 y input 2 input 1 y input 2 oe oe input 1 y input 2 input 1 y input 2 oe oe input 1 y input 2 input 1 y input 2 oe oe
sn74lvc1g99 sces609g ? september 2004 ? revised november 2013 www.ti.com 3-state nand/or functions available no. of inputs and/nand function or/nor function oe a b c d 2 3-state nand 3-state or l input 1 input 2 h l 2 3-state nand 3-state or l input 2 input 1 h no. of inputs and/nand function or/nor function oe a b c d 2 3-state nand 3-state or input 2 l input 1 h l 2 3-state nand 3-state or h input 1 input 2 l no. of inputs and/nand function or/nor function oe a b c d 2 3-state nand 3-state or input 1 l input 2 h l 2 3-state nand 3-state or h input 2 input 1 l no. of inputs and/nand function or/nor function oe a b c d 2 3-state nand 3-state or input 1 h input 2 l l 2 3-state nand 3-state or input 2 h input 1 l 6 submit documentation feedback copyright ? 2004 ? 2013, texas instruments incorporated product folder links: sn74lvc1g99 input 1 y input 2 input 1 y input 2 oe oe input 1 y input 2 input 1 y input 2 oe oe input 1 y input 2 input 1 y input 2 oe oe input 1 y input 2 input 1 y input 2 oe oe
sn74lvc1g99 www.ti.com sces609g ? september 2004 ? revised november 2013 3-state xor/xnor functions available function oe a b c d input 1 h or l l input 2 input 2 h or l l input 1 h or l input 1 h input 2 3-state xor l h or l input 2 h input 1 l h input 1 input 2 l h input 2 input 1 function oe a b c d 3-state xor l h l input 1 input 2 function oe a b c d 3-state xor l h l input 1 input 2 function oe a b c d 3-state xnor h l input 1 input 2 l 3-state xnor h l input 2 input 1 copyright ? 2004 ? 2013, texas instruments incorporated submit documentation feedback 7 product folder links: sn74lvc1g99 input 1 y input 2 oe input 1 y input 2 oe input 1 y input 2 oe input 1 y input 2 oe
sn74lvc1g99 sces609g ? september 2004 ? revised november 2013 www.ti.com absolute maximum ratings (1) over operating free-air temperature range (unless otherwise noted) min max unit v cc supply voltage range ? 0.5 6.5 v v i input voltage range (2) ? 0.5 6.5 v v o voltage range applied to any output in the high-impedance or power-off state (2) ? 0.5 6.5 v v o voltage range applied to any output in the high or low state (2) (3) ? 0.5 v cc + 0.5 v i ik input clamp current v i < 0 ? 50 ma i ok output clamp current v o < 0 ? 50 ma i o continuous output current 50 ma continuous current through v cc or gnd 100 ma dct package 220 ja package thermal impedance (4) dcu package 227 c/w yzp package 102 t stg storage temperature range ? 65 150 c (1) stresses beyond those listed under " absolute maximum ratings " may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under " recommended operating conditions " is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) the input and output negative voltage ratings may be exceeded if the input and output current ratings are observed. (3) the value of v cc is provided in the recommended operating conditions table. (4) the package thermal impedance is calculated in accordance with jesd 51-7. recommended operating conditions (1) min max unit operating 1.65 5.5 v cc supply voltage v data retention only 1.5 v i input voltage 0 5.5 v v o output voltage 0 v cc v v cc = 1.65 v ? 4 v cc = 2.3 v ? 8 i oh high-level output current ? 16 ma v cc = 3 v ? 24 v cc = 4.5 v ? 32 v cc = 1.65 v 4 v cc = 2.3 v 8 i ol low-level output current 16 ma v cc = 3 v 24 v cc = 4.5 v 32 v cc = 1.8 v 0.15 v, 2.5 v 0.2 v 20 t/ v input transition rise or fall rate v cc = 3.3 v 0.3 v 10 ns/v v cc = 5 v 0.5 v 5 (1) all unused inputs of the device must be held at v cc or gnd to ensure proper device operation. refer to the ti application report, implications of slow or floating cmos inputs , literature number scba004 . 8 submit documentation feedback copyright ? 2004 ? 2013, texas instruments incorporated product folder links: sn74lvc1g99
sn74lvc1g99 www.ti.com sces609g ? september 2004 ? revised november 2013 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) ? 40 c to 85 c ? 40 c to 125 c parameter test conditions v cc unit min typ (1) max min typ (1) max 1.65 v 0.79 1.26 0.79 1.26 2.3 v 1.11 1.66 1.11 1.66 v t+ positive- going input 3 v 1.5 1.97 1.5 1.97 v threshold voltage 4.5 v 2.16 2.84 2.16 2.84 5.5 v 2.61 3.43 2.61 3.43 1.65 v 0.39 0.72 0.39 0.72 2.3 v 0.58 0.97 0.58 0.97 v t ? negative- going input 3 v 0.84 1.24 0.84 1.24 v threshold voltage 4.5 v 1.41 1.89 1.41 1.89 5.5 v 1.87 2.39 1.87 2.39 1.65 v 0.37 0.72 0.37 0.72 2.3 v 0.48 0.87 0.48 0.87 v t hysteresis 3 v 0.56 0.97 0.56 0.97 v (v t+ ? v t ? ) 4.5 v 0.71 1.14 0.71 1.14 5.5 v 0.71 1.21 0.71 1.21 1.65 v i oh = ? 100 a to v cc ? 0.1 v cc ? 0.1 5.5 v i oh = ? 4 ma 1.65 v 1.2 1.2 v oh v i oh = ? 8 ma 2.3 v 1.9 1.9 i oh = ? 16 ma 2.4 2.4 3 v i oh = ? 24 ma 2.3 2.3 i oh = ? 32 ma 4.5 v 3.8 3.8 1.65 v i ol = 100 a to 0.1 0.1 5.5 v i ol = 4 ma 1.65 v 0.45 0.45 v ol v i ol = 8 ma 2.3 v 0.3 0.3 i ol = 16 ma 0.4 0.4 3 v i ol = 24 ma 0.55 0.55 i ol = 32 ma 4.5 v 0.55 0.55 0 v to i i v i = 5.5 v or gnd 5 5 a 5.5 v i off v i or v o = 5.5 v 0 v 10 10 a 1.65 v i oz v o = v cc or gnd to 10 10 a 5.5 v 1.65 v i cc v i = 5.5 v or gnd, i o = 0 to 10 10 a 5.5 v 3 v to i cc one input at v cc ? 0.6 v, other inputs at v cc or gnd 500 500 a 5.5 v c i v i = v cc or gnd 3.3 v 3.5 3.5 pf c o v o = v cc or gnd 3.3 v 6 6 pf (1) t a = 25 c copyright ? 2004 ? 2013, texas instruments incorporated submit documentation feedback 9 product folder links: sn74lvc1g99
sn74lvc1g99 sces609g ? september 2004 ? revised november 2013 www.ti.com switching characteristics over recommended operating free-air temperature range, c l = 15 pf (unless otherwise noted) (see figure 1 ) sn74lvc1g99 ? 40 c to 85 c from to parameter v cc = 1.8 v v cc = 2.5 v v cc = 3.3 v v cc = 5 v unit (input) (output) 0.15 v 0.2 v 0.3 v 0.5 v min max min max min max min max a 4.5 30.1 2.5 11.3 1.8 7.5 1.3 4.8 b 4.4 28.3 2.4 10.8 1.8 7.2 1.3 4.7 t pd y ns c 4.4 29.1 2.4 11.7 1.9 7.6 1.3 5 d 4.3 25.1 2.4 10.2 1.7 6.7 1.3 4.5 t en oe y 3.4 24.7 2.1 10 1.3 5.8 1 3.8 ns t dis oe y 4 15.5 2.7 7.5 3.5 7 2 5.5 ns switching characteristics over recommended operating free-air temperature range, c l = 30 pf or 50 pf (unless otherwise noted) (see figure 2 ) sn74lvc1g99 ? 40 c to 85 c from to parameter v cc = 1.8 v v cc = 2.5 v v cc = 3.3 v v cc = 5 v unit (input) (output) 0.15 v 0.2 v 0.3 v 0.5 v min max min max min max min max a 4.6 30.8 2.6 11.7 2.4 8.4 1.8 5.5 b 4.6 28.9 2.6 11.3 2.3 8.2 1.8 5.4 t pd y ns c 4.4 29.8 2.5 12.3 2.5 8.6 1.8 5.7 d 4.3 25.7 2.5 10.7 2.4 7.6 1.6 5.2 t en oe y 4.2 25.2 2.4 11.3 2 7 1.7 4.7 ns t dis oe y 3.7 15 2 5.8 2.1 5.6 1 4.5 ns switching characteristics over recommended operating free-air temperature range (unless otherwise noted) (see figure 2 ) sn74lvc1g99 ? 40 c to 125 c from to parameter v cc = 1.8 v v cc = 2.5 v v cc = 3.3 v v cc = 5 v unit (input) (output) 0.15 v 0.2 v 0.3 v 0.5 v min max min max min max min max a 4.6 32.8 2.6 13.7 2.4 10.4 1.8 6.9 b 4.6 30.9 2.6 13.3 2.3 10.2 1.8 6.8 t pd y ns c 4.4 31.8 2.4 14.3 2.5 10.6 1.8 7.2 d 4.3 27.7 2.5 12.7 2.4 9.5 1.6 6.5 t en oe y 4.2 27.2 2.4 13.3 2.0 9.0 1.7 6.0 ns t dis oe y 3.7 17.0 2.0 7.3 2.1 7.4 1.0 5.6 ns operating characteristics t a = 25 c v cc = 1.8 v v cc = 2.5 v v cc = 3.3 v v cc = 5 v parameter test conditions unit typ typ typ typ c pd power dissipation capacitance f = 10 mhz 19 20 22 27 pf 10 submit documentation feedback copyright ? 2004 ? 2013, texas instruments incorporated product folder links: sn74lvc1g99
sn74lvc1g99 www.ti.com sces609g ? september 2004 ? revised november 2013 parameter measurement information figure 1. load circuit and voltage waveforms copyright ? 2004 ? 2013, texas instruments incorporated submit documentation feedback 11 product folder links: sn74lvc1g99 t h t su from output under test c (see note a) l load circuit s1 v load open gnd r l data input timing input 0 v0 v 0 v t w input 0 v input output waveform 1 s1 at v (see note b) load output waveform 2 s1 at gnd (see note b) v ol v oh 0 v? 0 v outputoutput t /t plh phl open test s1 output control v m v m v m v m v m 1.8 v 0.15 v 2.5 v 0.2 v 3.3 v 0.3 v 5 v 0.5 v 1 m w 1 m w 1 m w 1 m w v cc r l 2 v cc 2 v cc 6 v 2 v cc v load c l 15 pf15 pf 15 pf 15 pf 0.15 v0.15 v 0.3 v0.3 v v d 3 v v i v cc /2 v cc /2 1.5 v v cc /2 v m 2 ns 2 ns 2.5 ns 2.5 ns inputs r l t /t r f v cc v cc v cc v load t /t plz pzl gnd t /t phz pzh voltage waveforms enable and disable times low- and high-level enabling voltage waveforms propagation delay times inverting and noninverting outputs notes: a. c includes probe and jig capacitance. b. waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. c. all input pulses are supplied by generators having the following characteristics: prr 10 mhz, z = 50 . d. the outputs are measured one at a time, with one transition per measurement. e. t and t are the same as t . f. t and t are the same as t . g. t and t are the same as t . h. all parameters and waveforms are not applicable to all devices. l o plz phz dis pzl pzh en plh phl pd w voltage waveforms pulse duration voltage waveforms setup and hold times v i v i v i v m v m v /2 load t pzl t plz t phz t pzh v C v oh d v + v ol d v m v m v m v m v ol v oh v i v i v oh v ol v m v m v m v m t plh t phl t plh t phl
sn74lvc1g99 sces609g ? september 2004 ? revised november 2013 www.ti.com parameter measurement information (continued) figure 2. load circuit and voltage waveforms 12 submit documentation feedback copyright ? 2004 ? 2013, texas instruments incorporated product folder links: sn74lvc1g99 t h t su from output under test c (see note a) l load circuit s1 v load open gnd r l data input timing input 0 v0 v 0 v t w input 0 v input output waveform 1 s1 at v (see note b) load output waveform 2 s1 at gnd (see note b) v ol v oh 0 v? 0 v outputoutput test s1 t /t plh phl open output control v m v m v m v m v m 1.8 v 0.15 v 2.5 v 0.2 v 3.3 v 0.3 v 5 v 0.5 v 1 k w 500 w 500 w 500 w v cc r l 2 v cc 2 v cc 6 v 2 v cc v load c l 30 pf30 pf 50 pf 50 pf 0.15 v0.15 v 0.3 v0.3 v v d 3 v v i v cc /2 v cc /2 1.5 v v cc /2 v m 2 ns 2 ns 2.5 ns 2.5 ns inputs r l t /t r f v cc v cc v cc v load t /t plz pzl gnd t /t phz pzh voltage waveforms enable and disable times low- and high-level enabling voltage waveforms propagation delay times inverting and noninverting outputs notes: a. c includes probe and jig capacitance. b. waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. c. all input pulses are supplied by generators having the following characteristics: prr 10 mhz, z = 50 . d. the outputs are measured one at a time, with one transition per measurement. e. t and t are the same as t . f. t and t are the same as t . g. t and t are the same as t . h. all parameters and waveforms are not applicable to all devices. l o plz phz dis pzl pzh en plh phl pd w voltage waveforms pulse duration voltage waveforms setup and hold times v i v i v i v m v m v /2 load t pzl t plz t phz t pzh v C v oh d v + v ol d v m v m v m v m v ol v oh v i v i v oh v ol v m v m v m v m t plh t phl t plh t phl
sn74lvc1g99 www.ti.com sces609g ? september 2004 ? revised november 2013 revision history changes from revision e (october 2007) to revision f page ? changed document template from tims format to doczone format. .................................................................................. 1 ? changed 3-state mux graphic to fix labeling error. .............................................................................................................. 4 changes from revision f (april 2011) to revision g page ? updated document to new ti data sheet format. ................................................................................................................. 1 ? updated features. ................................................................................................................................................................ 1 ? added esd warning. ............................................................................................................................................................ 2 ? updated operating temperature range. ................................................................................................................................. 8 copyright ? 2004 ? 2013, texas instruments incorporated submit documentation feedback 13 product folder links: sn74lvc1g99
package option addendum www.ti.com 27-jan-2018 addendum-page 1 packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish (6) msl peak temp (3) op temp (c) device marking (4/5) samples SN74LVC1G99DCTR active sm8 dct 8 3000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 125 c99 (r, z) SN74LVC1G99DCTRg4 active sm8 dct 8 3000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 125 c99 (r, z) sn74lvc1g99dctt active sm8 dct 8 250 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 125 c99 (r, z) sn74lvc1g99dcur active vssop dcu 8 3000 green (rohs & no sb/br) cu nipdau | cu sn level-1-260c-unlim -40 to 125 (c99q, c99r) sn74lvc1g99dcurg4 active vssop dcu 8 3000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 125 c99r sn74lvc1g99dcut active vssop dcu 8 250 green (rohs & no sb/br) cu nipdau | cu sn level-1-260c-unlim -40 to 125 (c99q, c99r) sn74lvc1g99yzpr active dsbga yzp 8 3000 green (rohs & no sb/br) snagcu level-1-260c-unlim -40 to 125 den (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) rohs: ti defines "rohs" to mean semiconductor products that are compliant with the current eu rohs requirements for all 10 rohs substances, including the requirement that rohs substance do not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, "rohs" products are suitable for use in specified lead-free processes. ti may reference these types of products as "pb-free". rohs exempt: ti defines "rohs exempt" to mean products that contain lead but are compliant with eu rohs pursuant to a specific eu rohs exemption. green: ti defines "green" to mean the content of chlorine (cl) and bromine (br) based flame retardants meet js709b low halogen requirements of <=1000ppm threshold. antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) msl, peak temp. - the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. (4) there may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) multiple device markings will be inside parentheses. only one device marking contained in parentheses and separated by a "~" will appear on a device. if a line is indented then it is a continuation of the previous line and the two combined represent the entire device marking for that device.
package option addendum www.ti.com 27-jan-2018 addendum-page 2 (6) lead/ball finish - orderable devices may have multiple material finish options. finish options are separated by a vertical ruled line. lead/ball finish values may wrap to two lines if the finish value exceeds the maximum column width. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis. other qualified versions of sn74lvc1g99 : ? automotive: sn74lvc1g99-q1 note: qualified version definitions: ? automotive - q100 devices qualified for high-reliability automotive applications targeting zero defects
tape and reel information *all dimensions are nominal device package type package drawing pins spq reel diameter (mm) reel width w1 (mm) a0 (mm) b0 (mm) k0 (mm) p1 (mm) w (mm) pin1 quadrant SN74LVC1G99DCTR sm8 dct 8 3000 180.0 13.0 3.35 4.5 1.55 4.0 12.0 q3 sn74lvc1g99dctt sm8 dct 8 250 180.0 13.0 3.35 4.5 1.55 4.0 12.0 q3 sn74lvc1g99dcur vssop dcu 8 3000 180.0 8.4 2.25 3.35 1.05 4.0 8.0 q3 sn74lvc1g99yzpr dsbga yzp 8 3000 178.0 9.2 1.02 2.02 0.63 4.0 8.0 q1 package materials information www.ti.com 12-nov-2017 pack materials-page 1
*all dimensions are nominal device package type package drawing pins spq length (mm) width (mm) height (mm) SN74LVC1G99DCTR sm8 dct 8 3000 182.0 182.0 20.0 sn74lvc1g99dctt sm8 dct 8 250 182.0 182.0 20.0 sn74lvc1g99dcur vssop dcu 8 3000 202.0 201.0 28.0 sn74lvc1g99yzpr dsbga yzp 8 3000 220.0 220.0 35.0 package materials information www.ti.com 12-nov-2017 pack materials-page 2

mechanical data mpds049b ? may 1999 ? revised october 2002 post office box 655303 ? dallas, texas 75265 dct (r-pdso-g8) plastic small-outline package ????? ????? ????? ????? 0,60 0,20 0,25 0 ? 8 0,15 nom gage plane 4188781/c 09/02 4,25 5 0,30 0,15 2,90 3,75 2,70 8 4 3,15 2,75 1 0,10 0,00 1,30 max seating plane 0,10 m 0,13 0,65 pin 1 index area notes: a. all linear dimensions are in millimeters. b. this drawing is subject to change without notice. c. body dimensions do not include mold flash or protrusion d. falls within jedec mo-187 variation da.

www.ti.com package outline c 0.5 max 0.19 0.15 1.5 typ 0.5 typ 8x 0.25 0.21 0.5 typ b e a d 4223082/a 07/2016 dsbga - 0.5 mm max height yzp0008 die size ball grid array notes: 1. all linear dimensions are in millimeters. any dimensions in parenthesis are for reference only. dimensioning and tolerancing per asme y14.5m. 2. this drawing is subject to change without notice. ball a1 corner seating plane ball typ 0.05 c b 1 2 0.015 c a b symm symm c a d scale 8.000d: max = e: max = 1.918 mm, min = 0.918 mm, min = 1.858 mm0.858 mm
www.ti.com example board layout 8x ( 0.23) (0.5) typ (0.5) typ ( 0.23) metal 0.05 max ( 0.23) solder mask opening 0.05 min 4223082/a 07/2016 dsbga - 0.5 mm max height yzp0008 die size ball grid array notes: (continued) 3. final dimensions may vary due to manufacturing tolerance considerations and also routing constraints. for more information, see texas instruments literature number snva009 (www.ti.com/lit/snva009). symm symm land pattern example scale:40x 1 2 a b c d non-solder mask defined (preferred) solder mask details not to scale solder mask opening solder mask defined metal under solder mask
www.ti.com example stencil design (0.5) typ (0.5) typ 8x ( 0.25) (r0.05) typ metal typ 4223082/a 07/2016 dsbga - 0.5 mm max height yzp0008 die size ball grid array notes: (continued) 4. laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. symm symm solder paste example based on 0.1 mm thick stencil scale:40x 1 2 a b c d
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