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? semiconductor components industries, llc, 2004 september, 2004 ? rev. 19 1 publication order number: ncv8501/d ncv8501 series micropower 150 ma ldo linear regulators with enable, delay, reset , and monitor flag the ncv8501 is a family of precision micropower voltage regulators. their output current capability is 150 ma. the family has output voltage options for adjustable, 2.5 v, 3.3 v, 5.0 v, 8.0 v, and 10 v. the output voltage is accurate within 2.0% with a maximum dropout voltage of 0.6 v at 150 ma. low quiescent current is a feature drawing only 90 a with a 100 a load. this part is ideal for any and all battery operated microprocessor equipment. microprocessor control logic includes an active reset (with delay), and a flag monitor which can be used to provide an early warning signal to the microprocessor of a potential impending reset signal. the use of the flag monitor allows the microprocessor to finish any signal processing before the reset shuts the microprocessor down. the active reset circuit operates correctly at an output voltage as low as 1.0 v. the reset function is activated during the power up sequence or during normal operation if the output voltage drops outside the regulation limits. the regulator is protected against reverse battery, short circuit, and thermal overload conditions. the device can withstand load dump transients making it suitable for use in automotive environments. the device has also been optimized for emc conditions. features ? output voltage options: adjustable, 2.5 v, 3.3 v, 5.0 v, 8.0 v, 10 v ? 2.0% output ? low 90 a quiescent current ? fixed or adjustable output voltage ? active reset ? enable ? 150 ma output current capability ? fault protection ? +60 v peak transient voltage ? ?15 v reverse voltage ? short circuit ? thermal overload ? early warning through flag /mon leads ? ncv prefix for automotive and other applications requiring site and change control ? pb?free packages are available so?8 d suffix case 751 1 8 see detailed ordering and shipping information in the package dimensions section on page 13 of this data sheet. ordering information soic 16 lead wide body exposed pad pdw suffix case 751r 1 16 http://onsemi.com 1 8501x alyw 8 so?8 sow?16 e pad 8501x awlyyww 1 16 x = voltage ratings as indicated below: a = adjustable 2 = 2.5 v 3 = 3.3 v 5 = 5.0 v 8 = 8.0 v 1 = 10 v a = assembly location wl, l = wafer lot yy, y = year ww, w = work week marking diagrams
ncv8501 series http://onsemi.com 2 gnd nc 18 flag enable v adj mon v out v in pin connections, adjustable output so?8 gnd delay 18 reset enable flag mon v out v in pin connections, fixed output so?8 enable mon 1 16 nc v in nc nc nc nc gnd nc nc nc nc v out flag v adj sow?16 e pad enable mon 1 16 delay v in nc nc nc nc gnd nc nc nc nc v out reset flag sow?16 e pad v out gnd v in ncv8501 10 f 10 k r rst reset 10 f microprocessor delay c delay v bat v dd flag figure 1. application diagram mon r flg 10 k v adj (adjustable output only) i/o i/o enable
ncv8501 series http://onsemi.com 3 maximum ratings* rating value unit v in (dc) ?15 to 45 v peak transient voltage (46 v load dump @ v in = 14 v) 60 v operating voltage 45 v v out (dc) 16 v voltage range (reset , flag ) ?0.3 to 10 v input voltage range (mon) ?0.3 to 10 v input voltage range (enable) ?0.3 to 10** v esd susceptibility (human body model) 2.0 kv junction temperature, t j ?40 to +150 c storage temperature, t s ?55 to 150 c package thermal resistance, so?8: junction?to?case, r jc junction?to?ambient, r ja 45 165 c/w c/w package thermal resistance, sow?16 e pad: junction?to?case, r jc junction?to?ambient, r ja junction?to?pin, r jp (note 1) 15 56 35 c/w c/w c/w lead temperature soldering: reflow: (smd styles only) (note 2) 240 peak 260 peak (pb?free) (note 3) c maximum ratings are those values beyond which device damage can occur. maximum ratings applied to the device are individual str ess limit values (not normal operating conditions) and are not valid simultaneously. if these limits are exceeded, device functional operation i s not implied, damage may occur and reliability may be affected. *during the voltage range which exceeds the maximum tested voltage of v in , operation is assured, but not specified. wider limits may apply. thermal dissipation must be observed closely. **reference figure 14 for switched?battery enable application. 1. measured to pin 16. 2. 150 second maximum above 183 c, pb?free ? 150 second maximum above 217 c. 3. ?5 c / +0 c allowable conditions, applies to both pb and pb?free devices.
ncv8501 series http://onsemi.com 4 electrical characteristics (i out = 1.0 ma, enable = 5.0 v, ?40 c t j 125 c; v in dependent on voltage option (note 4); unless otherwise specified.) characteristic test conditions min typ max unit output stage output voltage for 2.5 v option 6.5 v < v in < 16 v, 100 a i out 150 ma 5.5 v < v in < 26 v , 100 a i out 150 ma 2.450 2.425 2.5 2.5 2.550 2.575 v v output voltage for 3.3 v option 7.3 v < v in < 16 v, 100 a i out 150 ma 5.5 v < v in < 26 v , 100 a i out 150 ma 3.234 3.201 3.3 3.3 3.366 3.399 v v output voltage for 5.0 v option 9.0 v < v in < 16 v, 100 a i out 150 ma 6.0 v < v in < 26 v , 100 a i out 150 ma 4.90 4.85 5.0 5.0 5.10 5.15 v v output voltage for 8.0 v option 9.0 v < v in < 26 v , 100 a i out 150 ma 7.76 8.0 8.24 v output voltage for 10 v option 11 v < v in < 26 v , 100 a i out 150 ma 9.7 10 10.3 v output voltage for adjustable option v out = v adj (unity gain) 6.5 v < v in < 16 v, 100 a < i out < 150 ma 5.5 v < v in < 26 v, 100 a < i out < 150 ma 1.254 1.242 1.280 1.280 1.306 1.318 v v dropout voltage (v in ? v out ) (5.0 v, 8.0 v, 10 v, and adj. > 5.0 v options only) i out = 150 ma i out = 1.0 ma ? ? 400 100 600 150 mv mv load regulation v in = 14 v, 5.0 ma i out 150 ma ?30 5.0 30 mv line regulation [v out (typ) + 1.0] < v in < 26 v, i out = 1.0 ma ? 15 60 mv quiescent current, low load 2.5 v option 3.3 v option 5.0 v option 8.0 v option 10 v option adjustable option i out = 100 a, v in = 12 v, mon = v out ? ? ? ? ? ? 90 90 90 100 100 50 125 125 125 150 150 75 a a a a a a quiescent current, medium load all options i out = 75 ma, v in = 14 v, mon = v out ? 4.0 6.0 ma quiescent current, high load all options i out = 150 ma, v in = 14 v, mon = v out ? 12 19 ma quiescent current, (i q ) sleep mode enable = 0 v, v in = 12 v ? 12 30 a current limit ? 151 300 ? ma short circuit output current v out = 0 v 40 190 ? ma thermal shutdown (guaranteed by design) 150 180 ? c reset function (reset) reset threshold for 2.5 v option high (v rh ) low (v rl ) 5.5 v v in 26 v (note 5) v out increasing v out decreasing 2.28 2.25 2.350 2.300 0.98 v out 0.97 v out v v reset threshold for 3.3 v option high (v rh ) low (v rl ) 5.5 v v in 26 v (note 5) v out increasing v out decreasing 3.00 2.97 3.102 3.036 0.98 v out 0.97 v out v v reset threshold for 5.0 v option high (v rh ) low (v rl ) v out increasing v out decreasing 4.55 4.50 4.70 4.60 0.98 v out 0.97 v out v v 4. voltage range specified in the output stage of the electrical characteristics in boldface type. 5. for v in 5.5 v, a reset = low may occur with the output in regulation.
ncv8501 series http://onsemi.com 5 electrical characteristics (i out = 1.0 ma, enable = 5.0 v, ?40 c t j 125 c; v in dependent on voltage option (note 4); unless otherwise specified.) characteristic unit max typ min test conditions reset function (reset) reset threshold for 8.0 v option high (v rh ) low (v rl ) v out increasing v out decreasing 6.86 6.80 7.52 7.36 0.98 v out 0.97 v out v v reset threshold for 10 v option high (v rh ) low (v rl ) v out increasing v out decreasing 8.60 8.50 9.40 9.20 0.98 v out 0.97 v out v v output voltage low (v rlo ) 1.0 v v out v rl , r reset = 10 k ? 0.1 0.4 v delay switching threshold (v dt ) ? 1.4 1.8 2.2 v delay low voltage v out < reset threshold low(min) ? ? 0.1 v delay charge current delay = 1.0 v, v out > v rh 1.5 2.5 3.5 a delay discharge current delay = 1.0 v, v out = 1.5 v 5.0 ? ? ma flag /monitor monitor threshold increasing and decreasing 1.10 1.20 1.31 v hysteresis ? 20 50 100 mv input current mon = 2.0 v ?0.5 0.1 0.5 a output saturation voltage mon = 0 v, i flag = 1.0 ma ? 0.1 0.4 v voltage adjust (adjustable output only) input current v adj = 1.28 v ?0.5 ? 0.5 a enable input threshold low high ? 3.0 ? ? 0.5 ? v v input current enable = 5.0 v ? 1.0 5.0 a 4. voltage range specified in the output stage of the electrical characteristics in boldface type. 5. for v in 5.5 v, a reset = low may occur with the output in regulation.
ncv8501 series http://onsemi.com 6 package pin description, adjustable output package pin number so?8 sow?16 e pad pin symbol function 1 7 v in input voltage. 2 8 mon monitor. input for early warning comparator. if not needed connect to v out. 3 9 enable enable control for the ic. a high powers the device up. 4 3?6, 10?12, 14, 15 nc no connection. 5 13 gnd ground. all gnd leads must be connected to ground . 6 16 flag open collector output from early warning comparator. 7 1 v adj voltage adjust. a resistor divider from v out to this lead sets the output voltage. 8 2 v out 2.0%, 150 ma output. package pin description, fixed output package pin number so?8 sow?16 e pad pin symbol function 1 7 v in input voltage. 2 8 mon monitor. input for early warning comparator. if not needed connect to v out. 3 9 enable enable control for the ic. a high powers the device up. 4 10 delay timing capacitor for reset function. 5 13 gnd ground. all gnd leads must be connected to ground . 6 16 reset active reset (accurate to v out 1.0 v) 7 1 flag open collector output from early warning comparator. 8 2 v out 2.0%, 150 ma output. ? 3?6, 11, 12, 14, 15 nc no connection.
ncv8501 series http://onsemi.com 7 typical performance characteristics ?40 v out (v) 4.98 temperature ( c) 4.99 5.00 5.01 ?25 ?10 125 5 203550658095110 v out = 5.0 v v in = 14 v i out = 5.0 ma figure 2. output voltage vs. temperature ?40 v out (v) 3.27 temperature ( c) 3.32 3.33 3.35 ?25 ?10 125 5 203550658095110 3.34 3.29 3.30 3.31 3.28 v out = 3.3 v v in = 14 v i out = 5.0 ma figure 3. output voltage vs. temperature figure 4. quiescent current vs. output current figure 5. quiescent current vs. output current +25 c ?40 c 0 i q (ma) 0 i out (ma) 0.2 0.4 0.6 0.8 1.0 1.2 510152025 +125 c v in = 12 v 0 i q (ma) 0 i out (ma) 2 4 6 8 10 12 14 15 30 45 60 140 75 90 105 120 135 +25 c ?40 c +125 c v in = 12 v 6 i q (ma) 0 v in (v) 1 2 3 4 5 6 7 8101214 26 16 18 20 22 24 i out = 10 ma i out = 50 ma i out = 100 ma t = 25 c figure 6. quiescent current vs. input voltage figure 7. quiescent current vs. input voltage i out = 100 a 6 i q ( a) 0 v in (v) 20 49 60 80 100 120 8101214 2 6 16 18 20 22 24 t = 25 c
ncv8501 series http://onsemi.com 8 typical performance characteristics +25 c ?40 c +125 c 0 dropout voltage (mv) 0 i out (ma) 150 200 250 300 350 400 450 25 50 75 100 150 50 100 125 figure 8. dropout voltage vs. output current v out = 5.0 v, 8.0 v, or 10 v quiescent current ( a) 0 2 4 6 8 10 12 16 14 ?40 temperature ( c) ?25 ?10 125 5 203550658095110 figure 9. sleep mode i q vs. temperature v in = 12 v 0.01 0.1 1.0 10 100 1000 0 102030 5060708090100110 output current (ma) esr ( ) c vout = 10 f c vout = 0.1 f unstable region stable region 40 0.01 0.1 1.0 10 100 1000 0 102030405060708090100 output current (ma) esr ( ) c vout = 10 f 10 v 8 v 5 v 3.3 v 2.5 v unstable region stable region figure 10. output stability with output voltage change figure 11. output stability with output capacitor change
ncv8501 series http://onsemi.com 9 v in reset v out flag delay figure 12. block diagram gnd mon current source (circuit bias) current limit sense error amplifier v bg i bias v bg v bg i bias i bias v bg i bias + ? + ? + ? + ? + bandgap reference thermal protection 1.8 v 3.0 a 20 k adjustable version only v adj enable fixed voltage only
ncv8501 series http://onsemi.com 10 circuit description regulator control functions the ncv8501 contains the microprocessor compatible control function reset (figure 13). figure 13. reset and delay circuit wave forms v in v out reset delay (v dt ) threshold delay threshold reset t d t d reset function a reset signal (low voltage) is generated as the ic powers up until v out is within 6.0% of the regulated output voltage, or when v out drops out of regulation,and is lower than 8.0% below the regulated output voltage. hysteresis is included in the function to minimize oscillations. the reset output is an open collector npn transistor, controlled by a low voltage detection circuit. the circuit is functionally independent of the rest of the ic thereby guaranteeing that the reset signal is valid for v out as low as 1.0 v. enable function the part stays in a low i q sleep mode when the enable pin is held low. the part has an internal pull down if the pin is left floating. this is intended for failure modes only. an external connection (active pulldown, resistor, or switch) for normal operation is recommended. the integrity of the enable pin allows it to be tied directly to the battery line through an external resistor. it will withstand load dump potentials in this configuration. figure 14. enable function v in v out gnd ncv8501 enable v bat 10 k delay function the reset delay circuit provides a programmable (by external capacitor) delay on the reset output lead. the delay lead provides source current (typically 2.5 a) to the external delay capacitor during the following proceedings: 1. during power up (once the regulation threshold has been verified). 2. after a reset event has occurred and the device is back in regulation. the delay capacitor is discharged when the regulation (reset threshold) has been violated. this is a latched incident. the capacitor will fully discharge and wait for the device to regulate before going through the delay time event again. flag /monitor function an on?chip comparator is provided to perform an early warning to the microprocessor of a possible reset signal. the reset signal typically turns the microprocessor off instantaneously. this can cause unpredictable results with the microprocessor. the signal received from the flag pin will allow the microprocessor time to complete its present task before shutting down. this function is performed by a comparator referenced to the bandgap reference. the actual trip point can be programmed externally using a resistor divider to the input monitor (mon) (figure 15). the typical threshold is 1.20 v on the mon pin. figure 15. flag /monitor function v bat v in mon v out c out v cc i/o reset p flag reset gnd delay ncv8501 r adj voltage adjust figure 16 shows the device setup for a user configurable output voltage. the feedback to the v adj pin is taken from a voltage divider referenced to the output voltage. the loop is balanced around the unity gain threshold (1.28 v typical). figure 16. adjustable output voltage v out v adj ncv8501 15 k 5.1 k c out 5.0 v 1.28 v
ncv8501 series http://onsemi.com 11 application notes figure 17. additional output current ncv8501 v in v out v adj c2 0.1 f v bat 5.0 v mjd31c r1 294 k r2 100 k c1 47 f >1 amp adding capability figure 17 shows how the adjustable version of parts can be used with an external pass transistor for additional current capability. the setup as shown will provide greater than 1 amp of output current. flag monitor figure 18 shows the flag monitor waveforms as a result of the circuit depicted in figure 15. as the output voltage falls (v out ), the monitor threshold is crossed. this causes the voltage on the flag output to go low sending a warning signal to the microprocessor that a reset signal may occur in a short period of time. t warning is the time the microprocessor has to complete the function it is currently working on and get ready for the reset shutdown signal. figure 18. flag monitor circuit waveform v out mon reset flag monitor ref. voltage t warning flag figure 19. test and application circuit showing output compensation v in v out c out ** 10 f r rst reset c in * 0.1 f ncv8501 *c in required if regulator is located far from the power supply filter **c out required for stability. capacitor must operate at minimum temperature expected setting the delay time the delay time is controlled by the reset delay low voltage, delay switching threshold, and the delay charge current. the delay follows the equation: t delay [ c delay (v dt reset delay low voltage) ] delay charge current example: using c delay = 33 nf. assume reset delay low voltage = 0. use the typical value for v dt = 1.8 v. use the typical value for delay charge current = 2.5 a. t delay [ 33 nf(1.8 0) ] 2.5 a 23.8 ms stability considerations the output or compensation capacitor helps determine three main characteristics of a linear regulator: start?up delay, load transient response and loop stability. the capacitor value and type should be based on cost, availability, size and temperature constraints. a tantalum or aluminum electrolytic capacitor is best, since a film or ceramic capacitor with almost zero esr can cause instability. the aluminum electrolytic capacitor is the least expensive solution, but, if the circuit operates at low temperatures (?25 c to ?40 c), both the value and esr of the capacitor will vary considerably. the capacitor manufacturers data sheet usually provides this information. the value for the output capacitor c out shown in figure 19 should work for most applications, however it is not necessarily the optimized solution.
ncv8501 series http://onsemi.com 12 calculating power dissipation in a single output linear regulator the maximum power dissipation for a single output regulator (figure 20) is: p d(max) [v in(max) v out(min) ]i out(max) v in(max) i q (eq. 1) where: v in(max) is the maximum input voltage, v out(min) is the minimum output voltage, i out(max) is the maximum output current for the application, and i q is the quiescent current the regulator consumes at i out(max) . once the value of p d(max) is known, the maximum permissible value of r ja can be calculated: r ja 150 c t a p d (eq. 2) the value of r ja can then be compared with those in the package section of the data sheet. those packages with r ja 's less than the calculated value in equation 2 will keep the die temperature below 150 c. in some cases, none of the packages will be sufficient to dissipate the heat generated by the ic, and an external heatsink will be required. smart regulator ? i q control features i out i in figure 20. single output regulator with key performance parameters labeled v in v out } figure 21. 16 lead sow (exposed pad), ja as a function of the pad copper area (2 oz. cu thickness), board material = 0.0625 g?10/r?4 40 70 90 100 thermal resistance, junction to ambient, r ja , ( c/w) 0 copper area (mm 2 ) 200 400 800 80 60 50 600 heatsinks a heatsink effectively increases the surface area of the package to improve the flow of heat away from the ic and into the surrounding air. each material in the heat flow path between the ic and the outside environment will have a thermal resistance. like series electrical resistances, these resistances are summed to determine the value of r ja : r ja r jc r cs r sa (eq. 3) where: r jc = the junction?to?case thermal resistance, r cs = the case?to?heatsink thermal resistance, and r sa = the heatsink?to?ambient thermal resistance. r jc appears in the package section of the data sheet. like r ja , it too is a function of package type. r cs and r sa are functions of the package type, heatsink and the interface between them. these values appear in heatsink data sheets of heatsink manufacturers.
ncv8501 series http://onsemi.com 13 ordering information device output voltage package shipping 2 ncv8501dadj adjustable so?8 98 units/rail ncv8501dadjg adjustable so?8 (pb?free) 98 units/rail ncv8501dadjr2 adjustable so?8 2500 tape & reel ncv8501dadjr2g adjustable so?8 (pb?free) 2500 tape & reel ncv8501pdwadj adjustable sow?16 ex p osed pad 47 units/rail ncv8501pdwadjr2 adj usta bl e sow ?16 e xpose d p a d 1000 tape & reel ncv8501d25 2.5 v so?8 98 units/rail ncv8501d25g 2.5 v so?8 (pb?free) 98 units/rail ncv8501d25r2 2.5 v so?8 2500 tape & reel ncv8501d25r2g 2.5 v so?8 (pb?free) 2500 tape & reel ncv8501pdw25 25v sow?16 ex p osed pad 47 units/rail ncv8501pdw25r2 2.5 v sow ?16 e xpose d p a d 1000 tape & reel ncv8501d33 3.3 v so?8 98 units/rail ncv8501d33g 3.3 v so?8 (pb?free) 98 units/rail ncv8501d33r2 3.3 v so?8 2500 tape & reel ncv8501d33r2g 3.3 v so?8 (pb?free) 2500 tape & reel ncv8501pdw33 33v sow?16 ex p osed pad 47 units/rail ncv8501pdw33r2 3.3 v sow ?16 e xpose d p a d 1000 tape & reel ncv8501d50 5.0 v so?8 98 units/rail ncv8501d50g 5.0 v so?8 (pb?free) 98 units/rail ncv8501d50r2 5.0 v so?8 2500 tape & reel ncv8501d50r2g 5.0 v so?8 (pb?free) 2500 tape & reel ncv8501pdw50 50v sow?16 ex p osed pad 47 units/rail ncv8501pdw50r2 5.0 v sow ?16 e xpose d p a d 1000 tape & reel ncv8501d80 8.0 v so?8 98 units/rail ncv8501d80g 8.0 v so?8 (pb?free) 98 units/rail ncv8501d80r2 8.0 v so?8 2500 tape & reel ncv8501d80r2g 8.0 v so?8 (pb?free) 2500 tape & reel ncv8501pdw80 80v sow?16 ex p osed pad 47 units/rail ncv8501pdw80r2 8.0 v sow ?16 e xpose d p a d 1000 tape & reel ncv8501d100 10 v so?8 98 units/rail ncv8501d100g 10 v so?8 (pb?free) 98 units/rail ncv8501d100r2 10 v so?8 2500 tape & reel ncv8501d100r2g 10 v so?8 (pb?free) 2500 tape & reel ncv8501pdw100 10 v sow?16 ex p osed pad 47 units/rail ncv8501pdw100r2 10 v sow ?16 e xpose d p a d 1000 tape & reel 2for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specification brochure, brd8011/d.
ncv8501 series http://onsemi.com 14 package dimensions so?8 nb d suffix case 751?07 issue ab seating plane 1 4 5 8 n j x 45 k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 6. 751?01 thru 751?06 are obsolete. new standard is 751?07. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 ?x? ?y? g m y m 0.25 (0.010) ?z? y m 0.25 (0.010) z s x s m 1.52 0.060 7.0 0.275 0.6 0.024 1.270 0.050 4.0 0.155 mm inches scale 6:1 *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint*
ncv8501 series http://onsemi.com 15 package dimensions soic 16 lead wide body exposed pad pdw suffix case 751r?02 issue a g ?w? ?u? p m 0.25 (0.010) w ?t? seating plane k d 16 pl c m 0.25 (0.010) t uw s s m f detail e detail e r x 45 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable protrusion shall be 0.13 (0.005) total in excess of the d dimension at maximum material condition. 6. 751r-01 obsolete, new standard 751r-02. j m 14 pl pin 1 i.d. 8 1 16 9 top side 0.10 (0.004) t 16 exposed pad 18 back side l h dim a min max min max inches 10.15 10.45 0.400 0.411 millimeters b 7.40 7.60 0.292 0.299 c 2.35 2.65 0.093 0.104 d 0.35 0.49 0.014 0.019 f 0.50 0.90 0.020 0.035 g 1.27 bsc 0.050 bsc h 3.76 3.86 0.148 0.152 j 0.25 0.32 0.010 0.012 k 0.10 0.25 0.004 0.009 l 4.58 4.78 0.180 0.188 m 0 7 0 7 p 10.05 10.55 0.395 0.415 r 0.25 0.75 0.010 0.029 a b 9
ncv8501 series http://onsemi.com 16 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800?282?9855 toll free usa/canada japan : on semiconductor, japan customer focus center 2?9?1 kamimeguro, meguro?ku, tokyo, japan 153?0051 phone : 81?3?5773?3850 ncv8501/d smart regulator is a registered trademark of semiconductor components industries, llc. literature fulfillment : literature distribution center for on semiconductor p.o. box 61312, phoenix, arizona 85082?1312 usa phone : 480?829?7710 or 800?344?3860 toll free usa/canada fax : 480?829?7709 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : http://onsemi.com order literature : http://www.onsemi.com/litorder for additional information, please contact your local sales representative.

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