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1 mhz to 4 ghz, 80 db log arithmic detector /controller ADL5513 rev. 0 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062 - 9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ? 2008 an alog devices, inc. all rights reserved. features wide bandwidth: 1 mhz to 4 ghz 80 db dynamic range ( 3 db) constant dynamic range over frequency stability over ?40 o c to +85 o c temperature range: 0.5 db operating temperature range: ?40 o c to +125 o c sensitivity: ?70 dbm low noise measurement/cont roller output (vout) pulse response time: 21 ns/20 ns (fall/rise) single - supply operation: 2.7 v to 5.5 v @ 31 ma power - down feature: 1 mw @ 5 v small footprint lfcsp fabricated using high speed sige process applications rf transmitter power amplifier li nearization and gain/power control power monitoring in radio link transmitters rssi measurement in base stations, wlan, wimax, radar functional block dia gram 2 1 4 3 i v i v det det det det det slope contro l gain bias band ga p reference 12 11 10 9 13 14 15 16 8 7 6 5 ADL5513 vout vset comm t adj inhi inlo vpos vpos nc nc clpf nc nc nc nc nc 07514-001 figure 1. general description the ADL5513 is a demodulating logar ithmic amplifier, capable of accurately converting an rf input signal to a corresponding decibel - scaled output. it employs the progressive compression technique over a cascaded amplifier chain, each stage of which is equipped with a detector cell. the devi ce can be used in either measurement or controller modes. the ADL5513 maintains accurate log confor mance for signals up to 4 ghz. the input dynamic range is typically 80 db (re ferred to 50 ) with error less than 3 db and 74 db with error les s than 1 db. the ADL5513 has 20 ns response time that enables rf burst detection to a pulse rate of beyond 50 mhz. the device provides unprecedented logarithmic intercept stability vs. ambient temp erature conditions. a supply of 2.7 v to 5.5 v is required to power the d evice. current consumption is 31 ma, and it decreases to 200 a when the device is disabled. the ADL5513 can be configured to provide a control voltage to a power amplifier or a meas urement output from the vout pin. because the output can be used for controller applications, special attention has been paid to minimize wideband noise. in this mode, the setpoint control voltage is applied to the vset pin . the feedback loop through an r f amplifier is closed via vout, the output of which regulates the amplifier output to a magni - tude corresponding to vset. the ADL5513 provides 0 v to (v pos ? 0.1 v) output capability at the vout pin, suitable for controller applications. as a measurement device, vout is externally connected to vset to produce an output voltage , v out , that increases linear - in- db with rf input signal amplitude. the logarithm ic slope is 21 mv/db, determined by the vset interface. the intercept is ? 88 dbm (re ferred to 50 , conti - nuous wave input, 900 mhz) using the inhi input. these parameters are very stable against supply and temperature variations. the ADL5513 is fabricate d on a sige bipolar ic process and is available in a 3 mm 3 mm, 16 - lead lfcsp package for the ?40c to +125c operating temperature range. a fully populated evaluation board is available.
ADL5513 rev. 0 | page 2 of 28 table of contents features .............................................................................................. 1 ? applications ....................................................................................... 1 ? functional block diagram .............................................................. 1 ? general description ......................................................................... 1 ? revision history ............................................................................... 2 ? specifications ..................................................................................... 3 ? absolute maximum ratings ............................................................ 7 ? esd caution .................................................................................. 7 ? pin configuration and function descriptions ............................. 8 ? typical performance characteristics ............................................. 9 ? theory of operation ...................................................................... 13 ? applications information .............................................................. 14 ? basic connections ...................................................................... 14 ? input signal coupling ................................................................ 14 ? output filtering .......................................................................... 14 ? output interface ......................................................................... 15 ? setpoint interface ....................................................................... 15 ? description of characterization ............................................... 15 ? error calculations ...................................................................... 16 ? adjusting accuracy through choice of calibration points ............................................................................................ 16 ? temperature compensation of output voltage ..................... 17 ? device calibration ..................................................................... 18 ? power-down functionality ....................................................... 18 ? measurement mode ................................................................... 19 ? setting the output slope in measurement mode .................. 19 ? controller mode ......................................................................... 20 ? constant power operation ....................................................... 20 ? increasing the dynamic range of the ADL5513 ................... 22 ? evaluation board ............................................................................ 23 ? outline dimensions ....................................................................... 25 ? ordering guide .......................................................................... 25 ? revision history 10/08revision 0: initial version
ADL5513 rev. 0 | page 3 of 28 specifications v s = 5 v, t a = 25c, z 0 = 50 ?, pin inhi and pin inlo are ac - coupled, continuous wave ( cw ) input, s ingle - ended input drive, vout tied to vset, e rror referred to best - fit line (linear regression ? 20 to ? 40 dbm ), unless otherwise noted. (temperature adjust voltage optimized for 85 c .) table 1 . parameter conditions min typ max unit overall function maximum input frequency 1 4000 m hz frequency = 100 mhz output voltage: high power in put p in = ? 10 dbm 1.5 0 1.6 3 1.7 6 v output voltage: low power in put p in = ? 5 0 dbm 0.64 0.79 0.94 v 3.0 db dynamic range 75 db 1.0 db dynamic range 64 db 0.5 db dynamic range 58 db maximum input level, 1.0 db 6 dbm minimum input level, 1.0 db ? 58 dbm deviation at t a = 25c p in = ?10 dbm 0. 27 db p in = ?30 dbm 0. 003 db p in = ?50 dbm ? 0.14 db deviation vs. temperature deviation from output at t a = 25c 25c < t a < 85c; p in = ?10 dbm +0.15 / ? 0. 33 db ?40 c < t a < +25c; p in = ?10 dbm +0.23/ ?0.43 db 25c < t a < 125c; p in = ? 10 dbm 0.8 db 25c < t a < 85c; p in = ?30 dbm +0.12/ ?0.31 db ?40 c < t a < +25c; p in = ?30 dbm 0.3 1 db 25c < t a < 125c; p in = ? 30 dbm +0.74 db +25c < t a < +85c; p in = ?50 dbm + 0.3 5/ ?0.18 db ?40 c < t a < +25c; p in = ?50 dbm +0. 25/ ?0.47 db 25c < t a < 125c; p in = ? 50 dbm +0.52/ ?0.24 db logarithmic slope 19. 5 21 22. 5 mv/db logarithmic intercept ?87 dbm input impedance 1.3/0.4 k ?/pf frequency = 900 mhz output voltage: high power in put p in = ? 10 dbm 1.64 v output voltage: low power in put p in = ? 50 dbm 0.79 v 3.0 db dynamic range 76 db 1.0 db dynamic range 70 db 0.5 db dynamic range 68 db maximum input level, 1.0 db 8 dbm minimum input level, 1.0 db ?62 dbm deviation at t a = 25c p in = ?10 dbm 0.2 db p in = ?30 dbm 0.002 db p in = ?50 dbm 0.34 db deviation vs. temperature deviation from output at t a = 25c 25c < t a < 85c; p in = ?10 dbm +0.25/ ?0.3 db ?40 c < t a < +25c; p in = ?10 dbm +0.2/ ?0.53 db 25c < t a < 125c; p in = ? 10 dbm +0.72/ ?0.1 db 25c < t a < 85c; p in = ?30 dbm +0.2/ ?0.3 db ?40 c < t a < +25c; p in = ?30 dbm +0.28/ ?0.37 db 25c < t a < 125c; p in = ? 30 dbm 0.7 db 25c < t a < 85c; p in = ?50 dbm +0.4/ ?0.36 db ?40 c < t a < +25c; p in = ?50 dbm +0.37/ ?0.5 db 25c < t a < 125c; p in = ? 50 dbm +0.67/ ?0.28 db
ADL5513 rev. 0 | page 4 of 28 parameter conditions min typ max unit logarithmic slope 21 mv/db logarithmic intercept ?8 8 dbm input impedance 1.3 /0. 4 k ?/pf frequency = 1900 mhz output voltage: high power in put p in = ? 10 dbm 1.66 v output voltage: low power in put p in = ? 50 dbm 0.80 v 3.0 db dynamic range 75 db 1.0 db dynamic range 70 db 0.5 db dynamic range 68 db maximum input level, 1.0 db 8 dbm minimum input level, 1.0 db ? 62 dbm deviation at t a = 25c p in = ?10 dbm 0.25 db p in = ?30 dbm 0.0012 db p in = ?50 dbm 0.52 db deviation vs. temperature deviation from output at t a = 25c 25c < t a < 85c; p in = ?10 dbm +0.14/ ?0.41 db ?40 c < t a < +25c; p in = ?10 dbm +0.19/ ?0.51 db 25c < t a < 125c; p in = ? 10 dbm 0.9 db 25c < t a < 85c; p in = ?30 dbm +0.1/ ?0.38 db ?40 c < t a < +25c; p in = ?30 dbm +0.37/ ?0.26 db 25c < t a < 125c; p in = ? 30 dbm 0.83 db 25c < t a < 85c; p in = ?50 dbm +0.55/ ?0.3 db ?40 c < t a < +25c; p in = ?50 dbm +0.79/ ?0.16 db 25c < t a < 125c; p in = ? 50 dbm +0.62/ ?0.41 db logarithmic slop e 21 mv/db logarithmic intercept ?88 dbm input impedance 0.6 /0. 5 k ?/pf frequency = 2140 mhz output voltage: high power in put p i n = ? 10 dbm 1.66 v output voltage: low power in put p in = ? 50 dbm 0.82 v 3.0 db dynamic range 77 db 1.0 db dynamic range 70 db 0.5 db dynamic range 66 db maximum input level, 1.0 db 8 dbm minimum input level, 1.0 db ? 62 dbm d eviation at t a = 25c p in = ?10 dbm 0.33 db p in = ?30 dbm 0.02 db p in = ?50 dbm 0.23 db deviation vs. temperature deviation from output at t a = 25c 25c < t a < 85c; p in = ?10 dbm 0.28 db ?40 c < t a < +25c; p in = ?10 dbm +0.2/ ?0.52 db 25c < t a < 125c; p in = ? 10 dbm +0.7/ ?0.1 db 25c < t a < 85c; p in = ?30 dbm +0.15/ ?0.35 db ?40 c < t a < +25c; p in = ?30 dbm +0.24/ ?0.41 db 25c < t a < 125c; p in = ? 30 dbm 0.77 db 25c < t a < 85c; p in = ?50 dbm +0.2/ ?0.6 db ? 40 c < t a < +25c; p in = ?50 dbm +0.1/ ?0.94 db 25c < t a < 125c; p in = ? 50 dbm +0.8/ ?0.2 db logarithmic slope 21 mv/db logarithmic intercept ?8 9 dbm input impedance 0.5 /0. 5 k ?/pf
ADL5513 rev. 0 | page 5 of 28 parameter conditions min typ max unit frequency = 2600 mhz output voltage: high power input p in = ?10 dbm 1.67 v output voltage: low power input p in = ?50 dbm 0.83 v 3.0 db dynamic range 80 db 1.0 db dynamic range 74 db 0.5 db dynamic range 69 db maximum input level, 1.0 db 7 dbm minimum input level, 1.0 db ?67 dbm deviation at t a = 25c p in = ?10 dbm 0.33 db p in = ?30 dbm 0.02 db p in = ?50 dbm 0.01 db deviation vs. temperature deviation from output at t a = 25c 25c < t a < 85c; p in = ?10 dbm +0.2/?0.4 db ?40c < t a < +25c; p in = ?10 dbm +0.05/?0.68 db 25c < t a < 125c; p in = ?10 dbm +0.75/?0.05 db 25c < t a < 85c; p in = ?30 dbm +0.1/?0.37 db ?40c < t a < +25c; p in = ?30 dbm +0.25/?0.4 db 25c < t a < 125c; p in = ?30 dbm 0.8 db 25c < t a < 85c; p in = ?50 dbm +0.2/?0.6 db ?40c < t a < +25c; p in = ?50 dbm 0.5 db 25c < t a < 125c; p in = ?50 dbm 1.13 db logarithmic slope 21 mv/db logarithmic intercept ?89 dbm input impedance 0.4/0.6 k/pf frequency = 3.6 ghz output voltage: high power input p in = ?10 dbm 1.74 v output voltage: low power input p in = ?50 dbm 0.84 v 3.0 db dynamic range 76 db 1.0 db dynamic range 62 db 0.5 db dynamic range 58 db maximum input level, 1.0 db 1 dbm minimum input level, 1.0 db ?61 dbm deviation at t a = 25c p in = ?10 dbm 0.43 db p in = ?30 dbm ?0.05 db p in = ?50 dbm ?0.14 db deviation vs. temperature deviation from output at t a = 25c 25c < t a < 85c; p in = ?10 dbm +0.32/?0.28 db ?40c < t a < +25c; p in = ?10 dbm +0.27/?0.54 db 25c < t a < 125c; p in = ?10 dbm +0.58/?0.21 db 25c < t a < 85c; p in = ?30 dbm +0.3/?0.22 db ?40c < t a < +25c; p in = ?30 dbm +0.38/?0.33 db 25c < t a < 125c; p in = ?30 dbm +0.67/?0.05 db 25c < t a < 85c; p in = ?50 dbm +0.41/?0.37 db ?40c < t a < +25c; p in = ?50 dbm +0.41/?0.62 db 25c < t a < 125c; p in = ?50 dbm +0.8/?0.18 db logarithmic slope 22.5 mv/db logarithmic intercept ?87 dbm input impedance 0.5/0.4 k/pf setpoint input pin vset nominal range log conformance error 1 db, rf input = 8 dbm 2 v log conformance error 1 db, rf input = ?62 dbm 0.58 v logarithmic scale factor 47.1 db/ v input impedance 40 k
ADL5513 rev. 0 | page 6 of 28 parameter conditions min typ max unit output interface pin vout voltage swing v set = 0 v, rf in put = open 0.47 v v set = 0.47 v, rf input = open 4.7 v capacitance drive clpf = open 47 pf capacitance drive clpf = 20 p f 1 nf current source/sink output held at 1 v to 1% change 0.64/55 ma output noise rf input = 100 mhz, 0 dbm f nois e = 100 khz, clpf = open 145 nv/ hz f noise = 100 khz, clpf = 1 nf 82 nv/ hz pulse response time input level = no signal to 0 dbm, 90% to 10% fall time clpf = open, 1 s pulse width 21 ns clpf = open, 500 s pulse width 5.5 s rise time clpf = open, 1 s pulse width 20 ns clpf = open, 500 s pulse width 20 ns fall time clpf = 1000 pf, 10 s pulse width 4.2 s clpf = 1000 pf, 500 s pulse width 5.5 s rise time clpf = 1000 pf, 10 s pulse width 3.2 s clpf = 1000 pf, 500 s pulse width 4.3 s smal l signal video bandwidth (or envelope bandwidth) clpf = ope n , 3 db v ideo b andwidth 10 mhz temperature adjust/power - down interface pin tadj temperature adjust useful range 0 to 1.3 v minimum logic level to disable logic high disables v pos ? 0.3 v input current logic high tadj = 0 v 31 ma logic low tadj = 4.7 v 200 a enable time pwdn low to vout at 100% final value, pwdn high to vout at 10% final value clpf = open , rf input = 0 dbm, 100 mhz, 1 s pulse width 84 ns clpf = 1000 pf , rf input = 0 dbm, 100 mhz, 1 s pulse width 10.8 s disable time clpf = open , rf input = 0 dbm, 100 mhz, 1 s pulse width 165 ns clpf = 1000 pf , rf input = 0 dbm, 100 mhz, 1 s pulse width 1.2 s input impedance 1 tadj = 0.9 v, sourc ing 70 a 13 k ? power supply interface pin vpos supply voltage 2.7 5.5 v quiescent current 25c, rf input = ?55 dbm 31 ma supply current when disabled <0.2 ma 1 see the temperature compensation of output voltage section.
ADL5513 rev. 0 | page 7 of 28 absolute maximum rat ings table 2 . parameter rating supply voltage , v pos 5.5 v v set voltage 0 v to v pos input power (single - ended, re: 50 ?) 20 dbm internal power dissipation 220 m w ja 79.3 c/w maximum junction temperature 150c operating temperature range ?40c to +125c storage temperature range ?65c to +150c lead temperature (soldering , 60 sec) 260c stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. esd caution
ADL5513 rev. 0 | page 8 of 28 pin configura tion and function descrip tion s 07514-002 pin 1 indic a t or notes 1. nc = no connec t . 2. the exposed p ad is internal l y connected t o comm; solder t o a low impedance ground plane. 1 vpos 2 inhi 3 inlo 4 vpos 1 1 vset 12 vout 10 comm 9 t adj 5 6 7 8 nc nc nc nc nc nc clpf nc 15 16 14 13 ADL5513 t op view (not to scale) figure 2 . pin configuration table 3 . pin function descriptions pin o. nemonic description 1, 4 vpos positive supply voltage, 2.7 v to 5.5 v . 2 inhi rf input. ac - coupled rf input. 3 inlo rf common for inhi. ac - coupl ed rf common. 5, 6, 7, 8, 13, 15, 16 nc no connect. these pins can be left open or be soldered to a low impedance ground plane. 9 tadj temperature com pensation adjustment. frequency - d ependent t emperature c ompensation is set by applying a specified voltag e to the pin. the tadj pin has dual functionality as a power - down pin, pwdn. applying a voltage of v pos ? 0.3 v disable s the device . 10 comm device common. 11 vset setpoint input for operation in controller mode. to operate in rssi mode short vset to vou t. 12 vout logarithmic/ error output. 14 clpf loop filter capacitor pin . in measurement mode, this capacitor pin sets the pulse response time and video bandwidth. in controller mode, the capacitance on this node sets the response time of the error amplifi er/integrator. 15 ( epad ) exposed pad dle (epad) internally connected to comm; solder to a low impedance ground plane.
ADL5513 rev. 0 | page 9 of 28 typical performance characteristics v pos = 5 v; t a = +25c, ? 40c, +85c, +125 c ; c lpf = 0.1 f , e rror is calculated by using the best - fit line between p in = ? 20 dbm and p in = ? 40 dbm at the specified input frequency, unless otherwise noted . 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 3.0 2.5 2.0 1.5 1.0 0.5 0 ?0.5 ?1.0 ?1.5 ?2.0 ?2.5 ?3.0 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 10 p in (dbm) v out (v) error (db) 07514-003 +25c ?40c +85c +125c figure 3. v out and log conformance vs. input amplitude at 100 mhz, typical device, v tadj = 0. 89 v 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 3.0 2.5 2.0 1.5 1.0 0.5 0 ?0.5 ?1.0 ?1.5 ?2.0 ?2.5 ?3.0 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 10 p in (dbm) v out (v) error (db) 07514-004 +25c ?40c +85c +125c figure 4. v out and log conformance vs. input amplitude at 900 mhz, typical device, v tadj = 0.86 v 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 3.0 2.5 2.0 1.5 1.0 0.5 0 ?0.5 ?1.0 ?1.5 ?2.0 ?2.5 ?3.0 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 10 p in (dbm) v out (v) error (db) 07514-007 +25c ?40c +85c +125c figure 5. v out and log conformance vs. input amplitude at 1900 mhz, typical device, v tadj = 0.8 0 v 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 3.0 2.5 2.0 1.5 1.0 0.5 0 ?0.5 ?1.0 ?1.5 ?2.0 ?2.5 ?3.0 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 10 p in (dbm) v out (v) error (db) 07514-005 +25c ?40c +85c +125c figure 6. v out and log conformance vs. input amplitude at 100 mhz, multiple devices, v tadj = 0. 89 v 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 3.0 2.5 2.0 1.5 1.0 0.5 0 ?0.5 ?1.0 ?1.5 ?2.0 ?2.5 ?3.0 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 10 p in (dbm) v out (v) error (db) 07514-006 +25c ?40c +85c +125c figure 7. v out and log conformance vs. input amplitude at 900 mhz, multiple devices, v tadj = 0.86 v 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 3.0 2.5 2.0 1.5 1.0 0.5 0 ?0.5 ?1.0 ?1.5 ?2.0 ?2.5 ?3.0 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 10 p in (dbm) v out (v) error (db) 07514-010 +25c ?40c +85c 125c figure 8. v out and log conformance vs. input amplitude at 1900 mhz, multiple devices, v tadj = 0.8 0 v
ADL5513 rev. 0 | page 10 of 28 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 3.0 2.5 2.0 1.5 1.0 0.5 0 ?0.5 ?1.0 ?1.5 ?2.0 ?2.5 ?3.0 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 10 p in (dbm) v out (v) error (db) 07514-008 +25c ?40c +85c 125c figure 9. v out and log conformance vs. in put amplitude at 2140 mhz, typical device, v tadj = 0.84 v 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 3.0 2.5 2.0 1.5 1.0 0.5 0 ?0.5 ?1.0 ?1.5 ?2.0 ?2.5 ?3.0 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 10 p in (dbm) v out (v) error (db) 07514-009 +25c ?40c +85c 125c figure 10 . v out and log conformance vs. input amplitude at 2600 mhz, typical device, v tadj = 0.83 v 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 3.0 2.5 2.0 1.5 1.0 0.5 0 ?0.5 ?1.0 ?1.5 ?2.0 ?2.5 ?3.0 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 10 p in (dbm) v out (v) error (db) 07514-013 +25c ?40c +85c 125c figure 11 . v out and log conformance vs. input amplitude at 3600 mhz, typical device, v tadj = 0.9 0 v 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 3.0 2.5 2.0 1.5 1.0 0.5 0 ?0.5 ?1.0 ?1.5 ?2.0 ?2.5 ?3.0 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 10 p in (dbm) v out (v) error (db) 07514-011 +25c ?40c +85c 125c figure 12 . v out and log conformance vs. input amplitude at 2140 mhz, multiple devices, v tadj = 0.84 v 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 3.0 2.5 2.0 1.5 1.0 0.5 0 ?0.5 ?1.0 ?1.5 ?2.0 ?2.5 ?3.0 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 10 p in (dbm) v out (v) error (db) 07514-012 +25c ?40c +85c 125c figure 13 . v out and log conformance vs. input amplitude at 2600 mhz, multiple devices, v tadj = 0.83 v 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 3.0 2.5 2.0 1.5 1.0 0.5 0 ?0.5 ?1.0 ?1.5 ?2.0 ?2.5 ?3.0 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 10 p in (dbm) v out (v) error (db) 07514-016 +25c ?40c +85c 125c figure 14 . v out and log conformance vs. input amplitude at 3600 mhz, multiple devices, v tadj = 0.9 0 v
ADL5513 rev. 0 | page 11 of 28 100k 10k 1k 100 10 1k 10k 100k 1m 10m frequency (hz) noise spectral density (nv/ hz) 07514-015 p in = 0dbm p in = ?10dbm p in = ?20dbm p in = ?40dbm p in = ?60dbm p in = off figure 15 . output noise spectr al density, c lpf = open 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 6 5 4 3 2 1 0 100 200 300 400 500 600 700 800 900 1000 1100 1200 1300 1400 1500 1600 1700 1800 1900 2000 0 time (ns) v out (v) input pulse (v) 07514-019 rf pulse p in = 0dbm p in = ?10dbm p in = ?20dbm p in = ?30dbm p in = ?40dbm p in = ?50dbm p in = ?60dbm figure 16 . output response to rf burst input for various rf input levels, carrier frequency = 100 mhz, clpf = open 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 ?0.2 5 4 3 2 1 0 0 100 200 300 400 500 600 700 800 time (s) v out (v) power-down pulse (v) 07514-022 power-down pulse p in = 0dbm p in = ?10dbm p in = ?20dbm p in = ?30dbm p in = ?40dbm p in = ?50dbm p in = ?60dbm figure 17 . output response using power - down mode for variou s rf input levels, carrier frequency = 100 mhz, clpf = open 100k 10k 1k 100 10 1k 10k 100k 1m 10m frequency (hz) noise spectral density (nv/ hz) 07514-018 p in = 0dbm p in = ?10dbm p in = ?20dbm p in = ?40dbm p in = ?60dbm p in = off figure 18 . output noise spectral density, c lpf = 1 nf 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 6 5 4 3 2 1 0 0 10 20 30 40 50 60 70 80 time (ms) v out (v) input pulse (v) 07514-020 rf pulse p in = ?10dbm p in = 0dbm p in = ?20dbm p in = ?30dbm p in = ?50dbm p in = ?40dbm p in = ?60dbm figure 19 . output response to rf burst input for various rf input levels, carrier fr equency = 100 mhz, c lpf = 0.1 f 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 ?0.2 5 4 3 2 1 0 0 100 200 300 400 500 600 700 800 900 time (s) v out (v) power-down pulse (v) 07514-021 power-down pulse p in = 0dbm p in = ?10dbm p in = ?20dbm p in = ?30dbm p in = ?40dbm p in = ?50dbm p in = ?60dbm figure 20 . output response using power - down mode for various rf input levels, carrier frequency = 100 mhz, c lpf = 10 pf
ADL5513 rev. 0 | page 12 of 28 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 3.0 2.5 2.0 1.5 1.0 0.5 0 ?0.5 ?1.0 ?1.5 ?2.0 ?2.5 ?3.0 ?70 ?65 ?60 ?55 ?50 ?45 ?40 ?35 ?30 ?25 ?20 ?15 ?10 ?5 0 5 10 p in (dbm) v out (v) error (db) 07514-017 +25c ?40c +85c +125c figure 21 . output voltage stability vs. inpu t amplitude at 1900 mhz when v pos varies from 2.7 v to 5.5 v 3600mhz 2600mhz 2140mhz 1900mhz 900mhz 100mhz 0 j0.5 j1 j2 ?j0.5 ?j1 ?j2 07514-014 3 1 1/3 figure 22 . input impedance vs. frequency , no termination resistor on inhi, z 0 = 50 1600 0 200 400 600 800 1000 1200 1400 19.5 22.5 22.0 21.5 21.0 20.5 20.0 slope @ 5v/100mhz @ 25c (mv/db) count 07514-056 mean = 21.0268 figure 23 . slope distribution , 100 mhz
ADL5513 rev. 0 | page 13 of 28 theory o f operation the ADL5513 is a demodulating logarithmic amplifier, specifi - cally designed for use in rf measurement and power control applications at frequencies up to 4 ghz. a block diagram is shown in figure 24 . s haring much of its design with the ad8313 logarithmic detector/controller, the ADL5513 maintains tight inter cept variability vs. temperature over a 80 db range. additional enhancements over the ad8313 , such as a reduced rf burst response time of 20 ns and board space require ments of only 3 mm 3 mm, add to the low cost and high performance benefits found in the ADL5513. 2 1 4 3 i v i v det det det det det slope contro l gain bias band ga p reference 12 11 10 9 13 14 15 16 8 7 6 5 ADL5513 vout vset comm t adj inhi inlo vpos vpos nc nc clpf nc nc nc nc nc 07514-024 figure 24 . block d iagram a fully differential design, using a proprietary, high speed sige process, extends high frequency performance. t he maximum input with 1 db log conformance error is typically 10 dbm (re ferred to 50 ?). the noise spectral density of ? 70 dbm sets the lower limit of the dynamic range. the common pin, comm , provides a quality low impedance connection to the printed circuit board (pcb) ground. the package paddle, which is internally connected to the c omm pin, should also be grounded to the pcb to reduce thermal impedance from the die to the pcb. the logarithmic function is approximated in a piecewise fashion by cascaded gain stages. (for a more comprehensive explanation of the logarithm approximation, see the ad8307 data sheet.) using precision biasing, the gain is stabilized over temperature and supply variations. the overall dc gain is high, due to the cascaded nature of the gain stages. the rf signal vo ltages are converted to a fluctuating differential current having an average value that increases with signal level. after the detector currents are summed and filtered, the following function is formed at the summing node: i d log 10 ( v in / v intercept ) (1) where: i d is the internally set detector current. v in is the input signal voltage. v intercept is the intercept voltage (that is, when v in = v intercept , the output voltage is 0 v, if it were capable of going to 0 ).
ADL5513 rev. 0 | page 14 of 28 applications informa tion basic conn ections the ADL5513 is specified for operation up to 4 ghz; as a result, low impedance supply pins with adequate isolation between functions are essential. a power supply voltage of between 2.7 v and 5.5 v should be applied to vpos . connect 100 pf and 0.1 f p ower supply decoupling capacitors close to this power supply pin. 07514-025 1 vpos 2 inhi 3 inlo 4 vpos 11 vset 12 vout 10 comm 9 tadj 5 6 7 8 nc nc nc nc nc nc clpf nc 15 16 14 13 ADL5513 r4 0 ? r12 0 ? v out (see note 2) z1 c5 100pf c6 0.1f vpos c2 47nf r1 52.3 ? rfin c1 47nf c4 100pf c3 0.1f r11 0 ? vpos (see note 1) notes 1. see the output filtering section. 2. see the temperature compensation of output voltage and power-down functionality sections. figure 25 . basic connections the exposed paddle of the lfcsp package is internally connected to comm. for optimum thermal and electrical performance, solder the paddle to a low impedance ground plane . input signal couplin g the rf input (inhi) is single - ended and must be ac - coupled. inlo (input common) should be ac - coupled to ground. suggested coupling capacitors are 47 nf , ceramic , 0402 - style capacitors for in put frequencies of 1 mhz to 4 ghz. the coupling capacitors should be mounted close to the inhi and inlo pins. the coupling capacitor values can be increased to lower the high - pass cutoff frequency of the input stage. the high - pass corner is set by the inpu t coupli ng capacitors and the internal 2 0 pf high - pass capacitor. the dc voltage on inhi and inlo is about one diode voltage drop below v pos . gain st age 2k? 7k? 15k ? 7k? 15k? g m offset com p 20pf vpos inhi inlo 07514-026 figure 26 . input interface while the input can be reactively matc h ed, in general, thi s is not necessary. an external 52.3 shunt resistor (connected to the signal side of the input coupling c apacitors, as shown in figure 25) combines with relatively high input impedance to give an adequate broadband 50 match. the coupling time constant, 50 c c /2, forms a high - pass corner with a 3 db attenuation at f hp = 1/(2 50 c c ), where c1 = c2 = c c . using the typical value of 47 nf, this high - pass corner is ~68 khz. in high frequency applications, f hp should be as large as possible to minimize the couplin g of unwanted low frequency signals. in low frequency applications, a simple rc network forming a low - pass filter should be added at the input for similar reasons. this low - pass filter network should generally be placed at the generator side of the couplin g capacitors, thereby lowering the r equired capacitance value for a given high - pass corner frequency. output filtering for applications in which maximum video bandwidth and, consequently, fast rise time are desired, it is essential that the clpf pin be lef t unconnected and free of any stray capacitance. the output video bandwidth , which is 10 mhz , can be reduced by connecting a ground - referenced capacitor (c flt ) to the clpf pin, as shown i n figure 27 . this is genera lly done to reduce output ripple (at twice the input frequency for a symmetric input wave - form such as sinusoidal signals). +4 i log 1k? 3pf c fl t clpf vout 07514-027 figure 27 . lowering the postdemodulation bandwidth c flt is selected by ( ) pf 0 . 3 k 1.5 2 1 ? = the video bandwidth should typically be set to a frequency equal to about one - tenth the minimum input frequency. this ensures that the output ripple of the demodulated log output, which is at twice the input frequency, is well filtered. in many log amp applications , it may be necessary to lower the corner frequency of the postdemodulation filter to achieve low output ripple while maintaining a rapid response time to changes in signal level. an example of a four - pole active filter is shown in the ad8307 data sheet. averaging the output measurement can also be done when filtering is not possible.
ADL5513 rev. 0 | page 15 of 28 output interface the vout pin is driven by a pnp output stage. an internal 10 resistor is placed in series with the output and the vout pin. the rise time of the output is limited mainly by the slew on clpf. the fall time is an rc-limited slew given by the load capacitance and the pull-down resistance at vout. there is an internal pull-down resistor of 1.6 k. a resistive load at vout is placed in parallel with the internal pull-down resistor to provide additional discharge current. 10? vout 1200? 400? + ? 0.8v v pos clpf comm 07514-028 figure 28. output interface the ADL5513 output can drive over 1 nf of capacitance. when driving such high output capacitive loads, it is required to capaci- tively load the clpf pin. the capacitance on the clpf pin should be at least 1/50 th that of the capacitance on the vout pin. setpoint interface the v set input drives the high impedance (40 k) input of an internal op amp. the v set voltage appears across the internal 3.5 k resistor to generate i set . when a portion of v out is applied to vset, the feedback loop forces i d log 10 ( v in / v intercept ) = i set (2) if v set = v out /2x, i set = v out /(2x 3.5 k). the result is v out = (i d 3.5 k 2x) log 10 (v in /v intercept ). 3.5k ? comm 20k? comm 07514-029 v set v set 20k ? i set figure 29. vset interface the slope is given by i d 2x 3.5 k = 20 mv/db x. for example, if a resistor divider to ground is used to generate a v set voltage of v out /2, then x = 2. the slope is set to 800 v/decade or 40 mv/db. see the measurement mode section for more information on setting the slope in measurement mode. description of characterization the general hardware configuration used for most of the ADL5513 characterization is shown in figure 30. the signal source and power supply used in this example are the agilent e8251a psg signal generator and e3631a triple output power supply. output voltage was measured using the agilent 34980a switch box . ADL5513 characterization board controlling computer agilent 34980a switch box vpos inhi inlo vout agilent e3631a triple output power supply agilent e8251a psg signal generator 07514-030 figure 30. general characterization configuration
ADL5513 rev. 0 | page 16 of 28 error calculations the measured transfer function of the ADL5513 at 100 mhz is shown in figure 31. the figure shows plots of measured output voltage, calculated error, and an ideal line. the input power and output voltage are used to calculate the slope and intercept values. the slope and intercept are calculated using linear regression over the input range from ?40 dbm to ?20 dbm. the slope and intercept terms are used to generate an ideal line. the error is the difference in measured output voltage compared to the ideal output line. 3.0 2.5 2.0 1.5 1.0 0.5 0 ?0.5 ?1.0 ?1.5 ?2.0 ?2.5 ?3.0 ?90 ?85 ?80 ?75 ?70 ?65 ?60 ?55 ?50 ?45 ?40 ?35 ?30 ?25 ?20 ?15 ?10 ?5 0 5 10 p in (dbm) error (db) 07514-031 ideal line v out and error @ +25c v out and error @ ?40c v out and error @ +85c p in2 p in1 v out2 v out1 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 v out (v) figure 31. typical output voltage vs. input signal the equation for output voltage can be written as v out = slope ( p in ? intercept ) where: slope is the change in output voltage divided by the change in input power, p in . slope is expressed in volts per decibel (v/db). intercept is the calculated power in decibels (db) at which the output voltage is 0 v. note that v out = 0 v can never be achieved. calibration is performed by applying two known signal levels to the adl 5513 and measuring the corresponding voltage outputs. the calibration points are in general chosen to be within the linear-in-db range of the device. calculation of the slope and intercept are accomplished by using the following equations: in2 in1 2 measured out1 measured out pp v v slope ? ? ? ) ( ) ( slope v p intercept measured out in1 ) ( ?? once the slope and intercept are calculated, v out(ideal) can be calculated, and the error is determined using the following equation: slope v v error ideal out measured out ) ( )( ) ( ? ? figure 31 shows a plot of the error at 25c, the temperature at which the device is calibrated. error is not 0 db over the full dynamic range. this is because the log amp does not perfectly follow the ideal v out vs. p in equation, even within its operating range. the error at the calibrating points of ?20 dbm and ?40 dbm is equal to 0 db by definition. figure 31 also shows error plots for output voltages measured at ?40c and 85c. these error plots are calculated using slope and intercept at 25c, which is consistent in a mass-production environment, where calibration over temperature is not practical. this is a measure of the linearity of the device. error from the linear response to the cw waveform is not a measure of absolute accuracy because it is calculated using the slope and intercept of each device. however, error verifies the linearity of the devices. similarly, at temperature extremes, error represents the output voltage variations from the 25c ideal line performance. data presented in the graphs are the typical error distributions observed during characterization of the ADL5513. device performance was optimized for operation at 85c; this can be changed by changing the voltage at tadj. adjusting accuracy through choice of calibration points choose calibration points to suit the specific application, but usually they should be in the linear range of the log amp. in some applications, very high accuracy is required at a reduced input range; in other applications, good linearity is necessary over the full power input range. the linearity of the transfer function can be adjusted by choice of calibration points. figure 32 and figure 33 show plots for a typical device at 3600 mhz as an exam- ple of adjusting accuracy through choice of calibration points. 2.50 2.25 2.00 1.75 1.50 1.25 1.00 0.75 0.50 0.25 0 2.5 2.0 1.5 1.0 0.5 0 ?0.5 ?1.0 ?1.5 ?2.0 ?2.5 ?70 ?65 ?60 ?55 ?50 ?45 ?40 ?35 ?30 ?25 ?20 ?15 ?10 ?5 0 5 10 p in (dbm) v out (v) error (db) 07514-032 +25c ?40c +85c +125c figure 32. typical device at 3600 mhz, calibration points at p in = ?20 dbm and ?40 dbm
ADL5513 rev. 0 | page 17 of 28 2.50 2.25 2.00 1.75 1.50 1.25 1.00 0.75 0.50 0.25 0 2.5 2.0 1.5 1.0 0.5 0 ?0.5 ?1.0 ?1.5 ?2.0 ?2.5 ?70 ?65 ?60 ?55 ?50 ?45 ?40 ?35 ?30 ?25 ?20 ?15 ?10 ?5 0 5 10 p in (dbm) v out (v) error (db) 07514-033 +25c ?40c +85c +125c figure 33 . typical device at 3600 mhz, calibration points at p in = ? 12 dbm and ? 40 dbm in figure 32, calibration points are chosen so that linearity is improved over t he full dynamic range , but error at the higher power level at p in = ? 10 dbm is 0.5 db at 25c . i n figure 33, calibration points are chosen so that error is smaller at higher power input , but with loss of linearity over the full dynamic range . figure 34 shows another way of presenting the error of a log amp detector. the same typical device from figure 32 and figure 33 is presented where the error at ? 40c, + 85c, and + 125c are calc ulated with respect to the output voltage at + 25c. this is the key difference i n presenting the error of a log amp compared with the plots in figure 32 and figure 33 where the error is calculated with respect to the ideal line at 25c. 2.50 2.25 2.00 1.75 1.50 1.25 1.00 0.75 0.50 0.25 0 2.5 2.0 1.5 1.0 0.5 0 ?0.5 ?1.0 ?1.5 ?2.0 ?2.5 ?70 ?65 ?60 ?55 ?50 ?45 ?40 ?35 ?30 ?25 ?20 ?15 ?10 ?5 0 5 10 p in (dbm) v out (v) error (db) 07514-034 ?40c +85c +125c figure 34 . error vs. temperature with respect to output voltage at 25c , 3600 mhz with this alternative technique, the error at amb ient becomes 0 db by definition. this would be valid if the device transfer function perfectly followed the ideal equation or if there were many calibration points used . v out = slope ( p in ? intercept ) because the log amp nev er perfectly follows this equation , espe - cially outside of its lin ear range , figure 34 can be misleading as a representation of log amp error . this plot tends to artificially imp rove linearity and extend the dynamic range, unless enough calibration points are used to remove error. figure 34 is a useful tool for estimating temperature drift at a particular power level with respect to the (n onideal) output voltage at ambient. temperature compensa tion of output voltage the primary component of the variation in v out vs. temperature as the input signal amplitude is held constant is the drift of the intercept. this drift is also a weak function of the input signal frequency; therefore, a provision is made for the optimization of the internal temperature compensation at a given frequency by providing pin tadj with dual functionality. the first function for this p in is temperature compensation and the second function is to power down the device when v tadj = v pos ? 0.3 v (see the power - down functionality section ) . pwdn/ t adj comm comm 07514-035 v interna l i com p figure 35 . tadj interface v tadj is a voltage forced between tadj and ground . the value of this voltage determines the magnitude of an a nalog correction coefficient, which is used to reduce intercept drift . the relationship between output temperature drift and fre - quency is not linear and can not be easily modeled. as a result, experimentation is required to select the optimum v tadj voltage . the v tadj voltage applied to pin tadj can be supplied by a dac with sufficient resolution , or resistor r8 and resistor r9 on the evaluation board (see figure 47) can be configured as a voltage divider using vpos as the voltage source . table 4 shows the recommended v oltage values for some commonly used frequencies in characterization to optimize operation at 85c. the tadj pin has high input impedance. table 4 . recommended v tadj values frequency recommended v tadj (v) 100 mhz 0.89 900 mhz 0.86 1.9 ghz 0.8 0 2.14 ghz 0.84 2.6 ghz 0.83 3.6 ghz 0.9 0
ADL5513 rev. 0 | page 18 of 28 compensating the device for temperature drift using tadj allows for great flexibility. if the user requires minimum temperature drift at a given input power or subset of the dynamic range, the tadj voltage can be swept while monitoring vout over temperature. figure 36 shows how error changes on a typical part over the full dynamic range when v tadj is swept from 0.5 v to 1.2 v in steps of 0.1 v. 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 3.0 2.5 2.0 1.5 1.0 0.5 0 ?0.5 ?1.0 ?1.5 ?2.0 ?2.5 ?3.0 ?70 ?65 ?60 ?55 ?50 ?45 ?40 ?35 ?30 ?25 ?20 ?15 ?10 ?5 0 5 10 p in (dbm) v out (v) error (db) 07514-036 v tadj = 0.5v v tadj = 1.2v +25c +85c figure 36. v out vs. tadj at 85c, 1900 mhz figure 37 shows the results of sweeping v tadj over multiple temperatures while holding p in constant. the same v tadj should be used for the full dynamic range for a specified supply operation. device calibration v tadj voltages in table 4 are chosen so that the error is at its minimum at 85c. criteria for the choice of v tadj is unique for a given application. figure 37 shows how error on a typical device changes at inhi = ?30 dbm when v tadj is swept at different temperatures. if the ADL5513 must have minimum error at a certain temperature, then v tadj should be chosen such that the line for that temperature intersects the 25c line. at this v tadj setting, the error at all other temperatures is not the minimum. if the deviation of error over temperature is more important than the error at a single temperature, v tadj should be determined by the intersection of the lines for the temperatures of interest. for the characterization data presented, v tadj values were chosen so that ADL5513 has a minimum error at 85c, which is at the intersection of the lines for 85c and 25c. for example, at 1900 mhz, v tadj = 0.8 v. if a given application requires error deviation to be at a minimum when the temperature changes from ?40c to 85c, v tadj is determined by the intersection of the error line for those temperatures. 1.5 1.0 0.5 0 ?0.5 ?1.0 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 tadj (v) error (db), p in = ?30db m 07514-037 +25c 0c +85c ?40c +45c +105c ?20c +65c +125c figure 37. error vs. v tadj , p in = ?30 dbm at 1900 mhz it is important that temperature adjustment be performed on multiple devices. power-down functionality power-down functionality of ADL5513 is achieved through exter- nally applied voltage on the tadj pin. if v tadj = v pos ? 0.3 v, the output voltage and supply current are close to 0. 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 4.0 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 5.0 tadj (v) v out @ ?10dbm (v) 07514-038 +25c ?40c +85c +125c figure 38. v out vs. v tadj at 100 mhz, v pos = 5 v 100 10 1 0.1 4.0 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 5.0 tadj (v) sleep current (ma) 07514-039 +25c ?40c +85c +125c figure 39. sleep current vs. v tadj , v pos = 5 v
ADL5513 rev. 0 | page 19 of 28 measurement mode when the v out voltage or a portion of the v out voltage is fed back to the vset pin, the device operates in measurement mode. as shown in figure 40 , the ADL5513 h as an offset voltage, a positive slope, and a v out me asurement intercept at the low end of its input signal range. 3.0 2.5 2.0 1.5 1.0 0.5 0 ?0.5 ?1.0 ?1.5 ?2.0 ?2.5 ?3.0 ?90 ?85 ?80 ?75 ?70 ?65 ?60 ?55 ?50 ?45 ?40 ?35 ?30 ?25 ?20 ?15 ?10 ?5 0 5 10 p in (dbm) error (db) p in2 p in1 v out2 v out1 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 v out (v) error 25c v out 25c v out ideal 07514-040 figure 40 . typi cal output voltage vs. input signal the output voltage vs. input signal voltage of the ADL5513 is linear - in - db over a multidecade range. the equation for this function is v out = x v slope/dec log 10 ( v in / v intercept ) = x v slope/db 20 log 10 ( v in / v inte rcept ) (3) where: x is the feedback factor in v set = v out / x . v slope/dec is nomin ally 400 mv/decade o r 20 mv/db. v intercept is the x - axis intercept of the linear - in - db portion of the v out vs. p in curve (see figure 40) . v intercept is ? 100 dbv for a sinusoidal input signal. an offset voltage, v offset , of 0.47 v is internally added to the detector signal, so that the minimum value for v out is x v offset ; therefore, for x = 1, the minimum v out is 0.47 v. the slope i s very stable vs. process and t emperature variation. when base 10 logarithms are used, v slope/dec represents the volts per decade. a decade corresponds to 20 db; v slope/dec /20 = v slope/db represents the slope in volts per decibel (v /db ) . as shown in figure 40, v out voltage has a positive slope . although demodulating log amps respond to input signal voltage, not input signal power, it is customary to discuss the amplitude of high frequency signals in terms of power. in this case, the charac teristic impedance of the system, z 0 , must be known to convert voltages to their corresponding power levels. the following equations are used to perform this conversion: p (dbm) = 10 log 10 ( v rms 2 /( z 0 1 mw)) ( 4 ) p (dbv) = 20 log 10 ( v rms /1 v rms ) ( 5 ) p (dbm) = p (dbv ) ? 10 log 10 ( z 0 1 mw/1 v rms 2 ) ( 6 ) for example, p intercept for a sinusoidal input signal expressed in terms of decibels referred to 1 mw ( dbm ) in a 50 ? system is p intercept (dbm) = p intercept (dbv) C 10 log 10 ( z 0 1 mw/1 v rms 2 ) = ? 100 dbv ? 10 log 1 0 (50 10 ?3 ) = ? 87 dbm ( 7 ) further information on the intercept variation dependence upon waveform can be found in the ad8313 and ad8307 data sheets. setting the outp ut slope in measurem ent mode to operate in measurement mode, vout is connected to vse t. connecting vout directly to vset yields the nominal logarithm ic slope of approximately 2 0 mv/db. the output swing corresponding to the specified input range is then app roximately 0. 47 v to 2 .0 v. the slope and output swing can be increased by placing a resistor divider between vout and vset (that is, one resistor from vout to vset and one resistor from vset to ground). the input impedance of vset is approximately 40 k ?. slope - setting resistors should be kept below 20 k ? to prevent this input impedance from affecting the resulting slope. if two equal resistors are used (for example, 10 k ?/10 k?), the slope doubles to approximately 40 mv/db. 40mv/db 10k? 10k? vout vset ADL5513 07514-041 figure 41 . increasing the slope the required resistor values needed to increase the slope are calculated from the following equation . 1 2 1 2 1 slope slope r r = + (8) w here : r1 is the resistor from vout to vset. r2 is the r esistor from vset to g round. slope1 i s the nominal slope of the ADL5513 . slope2 is the new slope. it is important to remember when increasing the slope of the ADL5513 that r1 and r2 must be properly sized so the output current drive capability is not exceeded. the dynamic range of the ADL5513 may be limited if the maximum output voltage is achieved before the maximum input power is reached. in cases where v pos is 5 v , the maximum output voltage is 4.7 v. the slope of the ADL5513 can be reduced by connecting vset t o vout and adding a voltage d ivider on the output.
ADL5513 rev. 0 | page 20 of 28 controller mode the ADL5513 provides a controller mode feature at pin vout. using v set for the setpoint voltage, it is possible for the ADL5513 to control subsystems, such as power amplifiers (pas), variable gain amplifiers (vgas), or variable voltage attenuators (vvas), which have output power that increases monotonically with respect to their gain control signal. to operate in controller mode, the link between vset and vout is broken. a setpoint voltage is applied to the vset input, vout is connected to the gain control terminal of the vga, and the rf input of the detector is connected to the output of the vga (usually using a directional coupler and some additional attenua- tion). based on the defined relationship between v out and the rf input signal when the device is in measurement mode, the ADL5513 adjusts the voltage on vout (vout is now an error amplifier output) until the level at the rf input corresponds to the applied v set . when the ADL5513 operates in controller mode, there is no defined relationship between the v set and the v out voltage; v out settles to a value that results in the correct input signal level appearing at inhi/inlo. for this output power control loop to be stable, a ground- referenced capacitor must be connected to the clpf pin. this capacitor, c flt , integrates the error signal (in the form of a current) to set the loop bandwidth and ensure loop stability. further details on control loop dynamics can be found in the ad8315 data sheet. vga/vva rfin inhi inlo vset clpf vout ADL5513 direction a l coupler 52.3 ? 47nf 47nf c flt dac gain control voltage 07514-042 figure 42. controller mode constant power operation in controller mode, the ADL5513 can be used to hold the output power stable over a broad temperature/input power range. this can be useful in topologies where a transmit card is driving an hpa or when connecting power-sensitive modules together. figure 44 shows a schematic of a circuit setup that holds the output power to approximately ?39 dbm at 900 mhz when the input power is varied over a 62 db dynamic range. figure 43 shows the performance results. a portion of the output power is coupled to the input of ADL5513 using a 20 db coupler. the vset voltage is set to 0.65 v, which forces the ADL5513 output voltage to control the adl5330 to deliver ?59 dbm. (if the ADL5513 is in measurement mode and a ?59 dbm input power is applied, the output voltage is 0.65 v). a generic op amp is used (ad8062) to invert the slope of the ADL5513 so that the gain of the adl5330 decreases as the ADL5513 control voltage increases. the high end power is limited by the maximum gain of the adl5330 and can increase if vset is moved so that the ADL5513 has a higher power on its input and a vga with higher linearity is used. the low power is limited by the sensitivity of the ADL5513 and can be increased with a reduction in the coupling value of the coupler. ? 35 ?36 ?37 ?38 ?39 ?40 ?41 ?42 ?43 ?44 ?45 ?65 ?60 ?55 ?50 ?45 ?40 ?35 ?30 ?25 ?20 ?15 ?10 ?5 0 5 p in (dbm) p out (dbm) 07514-044 +25c ?40c +85c figure 43. performance of adl5330/ADL5513 constant power circuit
ADL5513 rev. 0 | page 21 of 28 07514-043 1 vpos 2 inhi 3 inlo 4 vpos 11 vset 12 vout tadj 10 comm 9 5 6 7 8 nc nc nc nc nc nc clpf nc 15 16 14 13 ADL5513 vps1 vps1 vps2 vps2 com1 inhi inlo com1 oplo ophi com2 com2 vref ipbs opbs gnlo com2 com1 vps2 vps2 enbl gain vps2 vps2 adl5330 vpo s vpo s 0 ? 0 ? 0 ? 0 ? 0 ? 0 ? 5v 100p f 5v 100p f 1n f 1n f 100p f gai n 10 k ? s m a s w 1 100p f t1 100p f vpo s 0 . 1f 0 . 1f 0 . 1f 0 . 1f 0 . 1f 100p f 100p f vpo s 120n h 120n h 100p f 100p f t2 z1 gnd 1k? 47nf 100pf c7 1000pf 0.1uf 100pf 47nf 52.3 ? 0.1uf vtadj 5v 5v directional coupler 20db rfout vset = 0.65v input ad8062 10k? 10k? 10k? 10k? 10k? 5v 20k? 5v figure 44 . schematic of the ADL5513 operating in controller mode to provide automatic gain control functionality in combination with the adl5330
ADL5513 rev. 0 | page 22 of 28 increasing the dynamic range of the ADL5513 the ADL5513 dynamic range can be extended by adding a standa- lone vga, whose gain control input is derived directly from vout. this extends the dynamic range by the gain control range of the vga. in order for the overall measurement to remain linear in db, the vga must provide a linear-in-db (exponential) gain control function. the vga gain must decrease with an increase in its gain bias in the same way as the ADL5513. alterna- tively, an inverting op amp with suitable level shifting can be used. it is convenient to select a vga that needs only a single 5.0 v supply and is capable of generating a single-ended output. all of these conditions are met by the ad8368 . figure 46 shows the schematic. using the inverse gain mode (mode pin low) of the ad8368, its gain decreases on a slope of 37.5 mv/db to a minimum value of ?12 db for a gain voltage (v gain ) of 1.0 v. the voltage, v gain , that is required by the ad8368 is 50% of the output of the ADL5513. to scale this voltage, it is necessary to install a voltage divider at the output of the ADL5513. over the 1.5 v range from the output of the ADL5513, the gain of the ad8368 varies by (0.5 1.5 v)/(37.5 mv/db), or 20 db. com- bined with the 75 db gain span (at 120 mhz) of the ADL5513, this results in a 95 db variation for a 1.5 v change in v out . due to the amplification of out-of-band noise by ad8368, a band-pass filter was inserted between the ad8368 and ADL5513 to increase the low end sensitivity. the vga amplifies low power signals and attenuates high power signals to fit them in the detectable range of the ADL5513. if an amplifier with higher gain and lower noise figure is used, better than 90 db sensitivity can be achieved for use in an rssi application. figure 45 shows data results of the extended dynamic range at 120 mhz with error in vout. 1.750 1.625 1.500 1.375 1.250 1.125 1.000 0.875 0.750 0.625 0.500 0.375 0.250 3.0 2.0 1.0 0 ?1.0 ?2.0 ?3.0 2.5 1.5 0.5 ?0.5 ?1.5 ?2.5 ?90 ?70 ?50 ?30 ?10 0 20 ?80 ?60 ?40 ?20 10 p in (dbm) v out (v) error (db) 07514-045 v out +25c v out ?40c v out +85c err0r +25c err0r ?40c err0r +85c figure 45. output and conformance for the ad8368/ADL5513 extended dynamic range circuit 07514-046 inpt enbl vpsi ocom icom mode vpsi vpsi vpso vpso vpsi outp g a i n d e t o h p f l d e t i o c o m d e c l d e c l i c o m i c o m i c o m d e c l v p s i ad8368 vpos1 10k? 215 ? 0 ? 0 ? 10nh 10nf 10nf 1nf 0.1f c10 1nf 5.6pf 1nf c12 1nf c15 0.1f input 10nf vpos3 0 ? c12 1nf c15 0.1f vpos2 band-pass 120mhz 52.3 ? 1 vpos 2 inhi 3inlo 4 vpos 11 vset 12 tadj vout vout 10 comm 9 5 6 7 8 n c n c n c n c n c n c c l p f n c 1 5 1 6 1 4 1 3 ADL5513 z1 vpos gnd 1k? 47nf 100pf c7 1000pf 0.1uf 100pf 0.1uf vtadj = 0.89v vpos vpos 1k? 1k? v pos vpos1 vpos vpos2 vpos3 figure 46. ADL5513 with 95 db dynamic range
ADL5513 rev. 0 | page 23 of 28 evaluation board 07514-047 52.3 ? 1 vpos 2 inhi 3 inlo 4 vpos 11 vset 12 tadj vout 10 comm 9 5 6 7 8 nc nc nc nc nc nc clpf nc 15 16 14 13 ADL5513 z1 vpos gnd 1k? 47nf c1 c4 c3 r11 0 ? r12 r2 r1 0 ? r4 r3 open rl open cl open r5 open r6 open r8 open r9 open 0 ? r7 0 ? r10 0 ? 47nf c2 c6 c5 100pf c7 1000pf 0.1f 100pf 0.1f vpos vpos vset vout vpos tadj tadj vout_alt ext_pwdn_tadj rfin figure 47 . evaluation board schematic 07514-048 figure 48 . component side layout 07514-049 figure 49 . component side silkscreen
ADL5513 rev. 0 | page 24 of 28 table 5 . evaluation board configuration options component function default value c1, c2, r1 input i nterface. the 52.3 ? resistor in position r1 combines with the internal input impedance of the ADL5513 to give a broadband input impedance of about 50 ?. c1 and c2 are dc - blocking capacitors. a reactive impedance match can be implemented by replacing r1 with an inductor and c1 and c2 with appropriately valued capacitors. r1 = 52.3 ? (size 0402) c1 = 47 nf (size 0402) c2 = 47 nf (siz e 0402) c3, c4, c5, c6, r11, r12 power s upply d ecoupling . the nominal supply decoupling consists of a 100 pf filter capacitor placed physically close to the ADL5513 and a 0.1 f capacitor placed nearer to the power supply input pin. if additional isolat ion from the power supply is required, a small resistance (r11 or r12) can be installed between the power supply and the ADL5513. c3 = 0.1 f (size 0402) c4 = 100 pf (size 0402) c5 = 100 pf (size 0402) c6 = 0.1 f (size 0402) r11 = 0 ? (size 0402) r12 = 0 ? (size 0402) c7 filter c apacitor . the low - pass corner frequency of the circuit that drives the vout pin can be lowered by placin g a capacitor between clpf and ground. increasing this capacitor increases the overall rise/fall time of the ADL5513 for pulsed input signals. c7 = 1000 pf (size 0402) r2, r3 r4, r5, r10, rl, cl output interface measurement mode. in measurement mode, a po rtion of the output voltage is fed back to the vset pin via r4. the magnitude of the slope of the v out output voltage response can be increased by reducing the portion of v out that is fed back to vset . r3 can be used as a back - terminating resistor or as pa rt of a single - pole, low - pass filter. if a reduction in slope is desired, a voltage divider can be installed at the output using r3 and rl. r2 = open (size 0402) r3 = 1 k ? (size 0402) r4 = 0 ? (size 0402) r5 = open (size 0402) r10 = open (size 0402) rl = c l = open (size 0402) output interface controller mode. in controller mode, the ADL5513 can control the gain of an external component. to allow for this, remove the r4 resistor. a setpoint voltage is applied to pin vset. the value of this setpoint voltag e corresponds to the desired rf input signal level applied to the ADL5513 rf input. a sample of the rf output signal from this variable gain compo nent is applied to the ADL5513 input by a directional coupler. the voltage at the vout pin is applied to the gain control of the variable gain element. the magnitude of the control voltage can optionally be reduced via a voltage divider comprising r3 and rl, or a low - pass filter can be installed using r3 and cl. r2 = open (size 0402) r3 = 1 k ? (size 0402) r4 = op en (size 0402) r5 = open (size 0402) r10 = 0 ? (size 0402) rl = cl = open (size 0402) r6, r7, r8, r9 temperature c ompensation i nterface. a voltage source can be used to optimize the temperature performance for various inp ut frequencies. the pads for r8 an d r9 can be used for a voltage divider from the vpos node to set the t adj voltage at different frequencies. the ADL5513 can be disabled by applying a voltage of v pos ? 0.3 v to this node. r6 = open (size 0402) r7 = 0 ? (size 0402) r8 = open (size 0402) r9 = open ? (size 0402)
ADL5513 rev. 0 | page 25 of 28 outline dimensions * compliant to jedec standards mo-220-veed-2 except for exposed pad dimension. 1 0.50 bsc 0.60 max pin 1 indic a t or 1.50 ref 0.50 0.40 0.30 0.25 min 0.45 2.75 bsc sq t o p view 12 max 0.80 max 0.65 ty p sea ting plane pin 1 indic a t or 0.90 0.85 0.80 0.30 0.23 0.18 0.05 max 0.02 nom 0.20 ref 3.00 bsc sq * 1.65 1.50 sq 1.35 16 5 13 8 9 12 4 exposed pad bottom view 071708-a for proper connection of the exposed pad, refer to the pin configuration and function descriptions section of this data sheet. figure 50 . 16 - lead lead frame chip scale package [lfcsp_v q ] 3 mm 3 mm body, very thin quad (cp - 16 - 3) dimensions shown in millimeters ordering guide model temperature range package description package option branding ADL5513acpz -r7 1 ? 40c to +125c 16- lead lead frame chip scale package [lfcsp_vq] cp -16-3 q1 l ADL5513acpz -r2 1 ? 40c to +125c 16- lead lead frame chip scale package lfcsp_v q] cp -16-3 q1 l ADL5513acpz - wp 1 ? 40c to +125c 16- lead lead frame chip scale package [lfcsp_vq] cp -16-3 q1 l ADL5513 - evalz 1 evaluation board 1 z = rohs compliant part.
ADL5513 rev. 0 | page 26 of 28 notes
ADL5513 rev. 0 | page 27 of 28 notes
ADL5513 rev. 0 | page 28 of 28 note s ? 2008 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d07514 - 0 - 10/08(0)

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