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225710 ENA0339 BLU0201 JC547B SA9V0A 1KSMB47A PT7A7513 GP30A
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  this is information on a product in full production. october 2016 docid028475 rev 5 1/113 lsm6dsl inemo inertial module: always-on 3d accelerometer and 3d gyroscope datasheet - production data features ? power consumption: 0.4 ma in combo normal mode and 0.65 ma in combo high-performance mode ? ?always-on? experience with low power consumption for both accelerometer and gyroscope ? smart fifo up to 4 kbyte based on features set ? android m compliant ? hard, soft ironing for external magnetic sensor corrections ? 2/4/8/16 g full scale ? 125/245/500/1000/2000 dps full scale ? analog supply voltage: 1.71 v to 3.6 v ? independent ios supply (1.62 v) ? compact footprint, 2.5 mm x 3 mm x 0.83 mm ? spi & i 2 c serial interface with main processor data synchronization feature ? pedometer, step detector and step counter ? significant motion and tilt function ? standard interrupts: free-fall, wakeup, 6d/4d orientation, click and double-click ? embedded temperature sensor ? ecopack ? , rohs and ?green? compliant applications ? motion tracking and gesture detection ? collecting sensor data ? indoor navigation ? iot and connected devices ? intelligent power saving for handheld devices ? vibration monitoring and compensation description the lsm6dsl is a system-in-package featuring a 3d digital accelerometer and a 3d digital gyroscope performing at 0.65 ma in high-performance mode and enabling always-on low-power features for an optimal motion experience for the consumer. the lsm6dsl supports main os requirements, offering real, virtual and batch sensors with 4 kbyte for dynamic data batching. st?s family of mems sensor modules leverages the robust and mature manufacturing processes already used for the production of micromachined accelerometers and gyroscopes. the various sensing elements are manufactured using specialized micromachining processes, while the ic interfaces are developed using cmos technology that allows the design of a dedicated circuit which is trimmed to better match the characteristics of the sensing element. the lsm6dsl has a full-scale acceleration range of 2/4/8/16 g and an angular rate range of 125/245/500/1000/2000 dps. high robustness to mechanical shock makes the lsm6dsl the preferred choice of system designers for the creation and manufacturing of reliable products. the lsm6dsl is available in a plastic land grid array (lga) package. lga-14l (2.5 x 3 x 0.83 mm) typ. table 1. device summary part number temp. range [c] package packing lsm6dsl -40 to +85 lga-14l (2.5x3x0.83mm) tray LSM6DSLTR -40 to +85 tape & reel www.st.com
contents lsm6dsl 2/113 docid028475 rev 5 contents 1 overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 2 embedded low-power features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 2.1 tilt detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 2.2 absolute wrist tilt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3 pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.1 pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4 module specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.1 mechanical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.2 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 4.3 temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.4 communication interface characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 26 4.4.1 spi - serial peripheral interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 4.4.2 i 2 c - inter-ic control interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 4.5 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 4.6 terminology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 4.6.1 sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 4.6.2 zero-g and zero-rate level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5 functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 5.1 operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 5.2 gyroscope power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 5.3 accelerometer power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 5.4 block diagram of filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 5.4.1 block diagrams of the gyroscope filters . . . . . . . . . . . . . . . . . . . . . . . . . 31 5.4.2 block diagrams of the accelerometer filters . . . . . . . . . . . . . . . . . . . . . . 32 5.5 fifo . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 5.5.1 bypass mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 5.5.2 fifo mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 5.5.3 continuous mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 5.5.4 continuous-to-fifo mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
docid028475 rev 5 3/113 lsm6dsl contents 113 5.5.5 bypass-to-continuous mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 5.5.6 fifo reading procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 6 digital interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 6.1 i 2 c/spi interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 6.2 master i 2 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 6.3 i 2 c serial interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 6.3.1 i 2 c operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 6.4 spi bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 6.4.1 spi read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 6.4.2 spi write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 6.4.3 spi read in 3-wire mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 7 application hints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 7.1 lsm6dsl electrical connections in mode 1 . . . . . . . . . . . . . . . . . . . . . . . 43 7.2 lsm6dsl electrical connections in mode 2 . . . . . . . . . . . . . . . . . . . . . . . 44 8 register mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 9 register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 9.1 func_cfg_access (01h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 9.2 sensor_sync_time_frame (04h) . . . . . . . . . . . . . . . . . . . . . . . . . . 51 9.3 sensor_sync_res_ratio (05h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 9.4 fifo_ctrl1 (06h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 9.5 fifo_ctrl2 (07h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 9.6 fifo_ctrl3 (08h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 9.7 fifo_ctrl4 (09h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 9.8 fifo_ctrl5 (0ah) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 9.9 drdy_pulse_cfg_g (0bh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 9.10 int1_ctrl (0dh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 9.11 int2_ctrl (0eh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 9.12 who_am_i (0fh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 9.13 ctrl1_xl (10h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 9.14 ctrl2_g (11h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 9.15 ctrl3_c (12h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
contents lsm6dsl 4/113 docid028475 rev 5 9.16 ctrl4_c (13h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 9.17 ctrl5_c (14h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 9.18 ctrl6_c (15h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 9.19 ctrl7_g (16h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 9.20 ctrl8_xl (17h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 9.21 ctrl9_xl (18h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 9.22 ctrl10_c (19h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 9.23 master_config (1ah) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 9.24 wake_up_src (1bh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 9.25 tap_src (1ch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 9.26 d6d_src (1dh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 9.27 status_reg (1eh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 9.28 out_temp_l (20h), out_temp_h (21h) . . . . . . . . . . . . . . . . . . . . . . . 71 9.29 outx_l_g (22h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 9.30 outx_h_g (23h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 9.31 outy_l_g (24h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 9.32 outy_h_g (25h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 9.33 outz_l_g (26h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 9.34 outz_h_g (27h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 9.35 outx_l_xl (28h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 9.36 outx_h_xl (29h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 9.37 outy_l_xl (2ah) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 9.38 outy_h_xl (2bh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 9.39 outz_l_xl (2ch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 9.40 outz_h_xl (2dh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 9.41 sensorhub1_reg (2eh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 9.42 sensorhub2_reg (2fh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 9.43 sensorhub3_reg (30h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 9.44 sensorhub4_reg (31h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 9.45 sensorhub5_reg (32h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 9.46 sensorhub6_reg (33h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 9.47 sensorhub7_reg (34h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 9.48 sensorhub8_reg(35h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
docid028475 rev 5 5/113 lsm6dsl contents 113 9.49 sensorhub9_reg (36h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 9.50 sensorhub10_reg (37h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 9.51 sensorhub11_reg (38h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 9.52 sensorhub12_reg (39h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 9.53 fifo_status1 (3ah) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 9.54 fifo_status2 (3bh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 9.55 fifo_status3 (3ch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 9.56 fifo_status4 (3dh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 9.57 fifo_data_out_l (3eh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 9.58 fifo_data_out_h (3fh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 9.59 timestamp0_reg (40h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 9.60 timestamp1_reg (41h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 9.61 timestamp2_reg (42h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 9.62 step_timestamp_l (49h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 9.63 step_timestamp_h (4ah) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 9.64 step_counter_l (4bh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 9.65 step_counter_h (4ch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 9.66 sensorhub13_reg (4dh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 9.67 sensorhub14_reg (4eh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 9.68 sensorhub15_reg (4fh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 9.69 sensorhub16_reg (50h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 9.70 sensorhub17_reg (51h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 9.71 sensorhub18_reg (52h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 9.72 func_src1 (53h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 9.73 func_src2 (54h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 9.74 wrist_tilt_ia (55h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 9.75 tap_cfg (58h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 9.76 tap_ths_6d (59h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 9.77 int_dur2 (5ah) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 9.78 wake_up_ths (5bh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 9.79 wake_up_dur (5ch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 9.80 free_fall (5dh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 9.81 md1_cfg (5eh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
contents lsm6dsl 6/113 docid028475 rev 5 9.82 md2_cfg (5fh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91 9.83 master_cmd_code (60h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 9.84 sens_sync_spi_error_code (61h) . . . . . . . . . . . . . . . . . . . . . . . . 92 9.85 out_mag_raw_x_l (66h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 9.86 out_mag_raw_x_h (67h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 9.87 out_mag_raw_y_l (68h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 9.88 out_mag_raw_y_h (69h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 9.89 out_mag_raw_z_l (6ah) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 9.90 out_mag_raw_z_h (6bh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 9.91 x_ofs_usr (73h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94 9.92 y_ofs_usr (74h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94 9.93 z_ofs_usr (75h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94 10 embedded functions register mapping . . . . . . . . . . . . . . . . . . . . . . . . . 95 11 embedded functions registers description - bank a . . . . . . . . . . . . . . 97 11.1 slv0_add (02h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97 11.2 slv0_subadd (03h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97 11.3 slave0_config (04h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97 11.4 slv1_add (05h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 11.5 slv1_subadd (06h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 11.6 slave1_config (07h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 11.7 slv2_add (08h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 11.8 slv2_subadd (09h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 11.9 slave2_config (0ah) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 11.10 slv3_add (0bh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 11.11 slv3_subadd (0ch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 11.12 slave3_config (0dh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 11.13 datawrite_src_mode_sub_slv0 (0eh) . . . . . . . . . . . . . . . . . . . . 101 11.14 config_pedo_ths_min (0fh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 11.15 sm_ths (13h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 11.16 pedo_deb_reg (14h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 11.17 step_count_delta (15h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 11.18 mag_si_xx (24h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
docid028475 rev 5 7/113 lsm6dsl contents 113 11.19 mag_si_xy (25h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103 11.20 mag_si_xz (26h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103 11.21 mag_si_yx (27h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103 11.22 mag_si_yy (28h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104 11.23 mag_si_yz (29h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104 11.24 mag_si_zx (2ah) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104 11.25 mag_si_zy (2bh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104 11.26 mag_si_zz (2ch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 11.27 mag_offx_l (2dh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 11.28 mag_offx_h (2eh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 11.29 mag_offy_l (2fh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 11.30 mag_offy_h (30h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106 11.31 mag_offz_l (31h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106 11.32 mag_offz_h (32h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106 12 embedded functions registers description - bank b . . . . . . . . . . . . . 107 12.1 a_wrist_tilt_lat (50h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107 12.2 a_wrist_tilt_ths (54h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107 12.3 a_wrist_tilt_mask (59h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107 13 soldering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108 14 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109 14.1 lga-14 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109 14.2 lga-14 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110 15 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
list of tables lsm6dsl 8/113 docid028475 rev 5 list of tables table 1. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 2. pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 table 3. mechanical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 table 4. electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 table 5. temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 table 6. spi slave timing values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 table 7. i 2 c slave timing values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 table 8. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 table 9. serial interface pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 table 10. master i 2 c pin details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 table 11. i 2 c terminology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 table 12. sad+read/write patterns . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 table 13. transfer when master is writing one byte to slave . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 table 14. transfer when master is writing multiple bytes to slave . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 table 15. transfer when master is receiving (reading) one byte of data from slave . . . . . . . . . . . . . 38 table 16. transfer when master is receiving (reading) multiple bytes of data from slave . . . . . . . . . 38 table 17. internal pin status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 table 18. registers address map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 table 19. func_cfg_access register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 table 20. func_cfg_access register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 table 21. configuration of embedded functions register banks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 table 22. sensor_sync_time_frame register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 table 23. sensor_sync_time_frame register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 table 24. sensor_sync_res_ratio register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 table 25. sensor_sync_res_ratio register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 table 26. fifo_ctrl1 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 table 27. fifo_ctrl1 register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 table 28. fifo_ctrl2 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 table 29. fifo_ctrl2 register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 table 30. fifo_ctrl3 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 table 31. fifo_ctrl3 register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 table 32. gyro fifo decimation setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 table 33. accelerometer fifo decimation setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 table 34. fifo_ctrl4 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 table 35. fifo_ctrl4 register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 table 36. fourth fifo data set decimation setting. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 table 37. third fifo data set decimation setting. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 5 table 38. fifo_ctrl5 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 table 39. fifo_ctrl5 register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 table 40. fifo odr selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 table 41. fifo mode selection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 table 42. drdy_pulse_cfg_g register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 table 43. drdy_pulse_cfg_g register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 table 44. int1_ctrl register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 table 45. int1_ctrl register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 table 46. int2_ctrl register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 table 47. int2_ctrl register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .58 table 48. who_am_i register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
docid028475 rev 5 9/113 lsm6dsl list of tables 113 table 49. ctrl1_xl register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 table 50. ctrl1_xl register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .59 table 51. accelerometer odr register setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 9 table 52. ctrl2_g register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 table 53. ctrl2_g register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60 table 54. gyroscope odr configuration setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 table 55. ctrl3_c register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 table 56. ctrl3_c register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 table 57. ctrl4_c register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 table 58. ctrl4_c register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 table 59. ctrl5_c register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 table 60. ctrl5_c register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 table 61. output registers rounding pattern . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .63 table 62. angular rate sensor self-test mode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 table 63. linear acceleration sensor self-test mode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 table 64. ctrl6_c register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 table 65. ctrl6_c register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 table 66. trigger mode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 table 67. gyroscope lpf1 bandwidth selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 table 68. ctrl7_g register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 table 69. ctrl7_g register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .65 table 70. ctrl8_xl register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 table 71. ctrl8_xl register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .65 table 72. accelerometer bandwidth selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 6 table 73. ctrl9_xl register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 table 74. ctrl9_xl register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .66 table 75. ctrl10_c register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 table 76. ctrl10_c register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .67 table 77. master_config register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 table 78. master_config register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 table 79. wake_up_src register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .68 table 80. wake_up_src register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 table 81. tap_src register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 table 82. tap_src register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .69 table 83. d6d_src register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 table 84. d6d_src register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .70 table 85. status_reg register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 table 86. status_reg register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 table 87. out_temp_l register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 table 88. out_temp_h register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 table 89. out_temp register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 table 90. outx_l_g register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 table 91. outx_l_g register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .71 table 92. outx_h_g register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 table 93. outx_h_g register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 table 94. outy_l_g register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 table 95. outy_l_g register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .72 table 96. outy_h_g register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 table 97. outy_h_g register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 table 98. outz_l_g register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 table 99. outz_l_g register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .72 table 100. outz_h_g register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
list of tables lsm6dsl 10/113 docid028475 rev 5 table 101. outz_h_g register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .73 table 102. outx_l_xl register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 table 103. outx_l_xl register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .73 table 104. outx_h_xl register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 table 105. outx_h_xl register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .73 table 106. outy_l_xl register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 table 107. outy_l_xl register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .73 table 108. outy_h_g register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 table 109. outy_h_g register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .74 table 110. outz_l_xl register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 table 111. outz_l_xl register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .74 table 112. outz_h_xl register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 table 113. outz_h_xl register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .74 table 114. sensorhub1_reg register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 table 115. sensorhub1_reg register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 table 116. sensorhub2_reg register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 table 117. sensorhub2_reg register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 table 118. sensorhub3_reg register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 table 119. sensorhub3_reg register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 table 120. sensorhub4_reg register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 table 121. sensorhub4_reg register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 table 122. sensorhub5_reg register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 table 123. sensorhub5_reg register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 table 124. sensorhub6_reg register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 table 125. sensorhub6_reg register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 table 126. sensorhub7_reg register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 table 127. sensorhub7_reg register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 table 128. sensorhub8_reg register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 table 129. sensorhub8_reg register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 table 130. sensorhub9_reg register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 table 131. sensorhub9_reg register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 table 132. sensorhub10_reg register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 table 133. sensorhub10_reg register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 table 134. sensorhub11_reg register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 table 135. sensorhub11_reg register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 table 136. sensorhub12_reg register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 table 137. sensorhub12_reg register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 table 138. fifo_status1 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 table 139. fifo_status1 register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 table 140. fifo_status2 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 table 141. fifo_status2 register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 table 142. fifo_status3 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 table 143. fifo_status3 register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 table 144. fifo_status4 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 table 145. fifo_status4 register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 table 146. fifo_data_out_l register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .79 table 147. fifo_data_out_l register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 table 148. fifo_data_out_h register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 table 149. fifo_data_out_h register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 table 150. timestamp0_reg register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 table 151. timestamp0_reg register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 table 152. timestamp1_reg register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
docid028475 rev 5 11/113 lsm6dsl list of tables 113 table 153. timestamp1_reg register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 table 154. timestamp2_reg register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 table 155. timestamp2_reg register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 table 156. step_timestamp_l register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 1 table 157. step_timestamp_l register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 table 158. step_timestamp_h register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 table 159. step_timestamp_h register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 table 160. step_counter_l register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 table 161. step_counter_l register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 table 162. step_counter_h register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2 table 163. step_counter_h register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 table 164. sensorhub13_reg register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 table 165. sensorhub13_reg register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 table 166. sensorhub14_reg register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 table 167. sensorhub14_reg register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 table 168. sensorhub15_reg register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 table 169. sensorhub15_reg register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 table 170. sensorhub16_reg register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 table 171. sensorhub16_reg register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 table 172. sensorhub17_reg register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 table 173. sensorhub17_reg register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 table 174. sensorhub18_reg register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 table 175. sensorhub18_reg register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 table 176. func_src1 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 table 177. func_src1 register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 table 178. func_src2 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 table 179. func_src2 register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 table 180. wrist_tilt_ia register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 table 181. wrist_tilt_ia register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5 table 182. tap_cfg register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 table 183. tap_cfg register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 table 184. tap_ths_6d register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 table 185. tap_ths_6d register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 table 186. threshold for d4d/d6d function. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .87 table 187. int_dur2 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 table 188. int_dur2 register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 table 189. wake_up_ths register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 table 190. wake_up_ths register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 table 191. wake_up_dur register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 table 192. wake_up_dur register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 table 193. free_fall register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 table 194. free_fall register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .89 table 195. threshold for free-fall function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 table 196. md1_cfg register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 table 197. md1_cfg register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .90 table 198. md2_cfg register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91 table 199. md2_cfg register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .91 table 200. master_cmd_code register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 table 201. master_cmd_code register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 table 202. sens_sync_spi_error_code register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 table 203. sens_sync_spi_error_code register description . . . . . . . . . . . . . . . . . . . . . . . . . . 92 table 204. out_mag_raw_x_l register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
list of tables lsm6dsl 12/113 docid028475 rev 5 table 205. out_mag_raw_x_l register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 table 206. out_mag_raw_x_h register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 table 207. out_mag_raw_x_h register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 table 208. out_mag_raw_y_l register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 table 209. out_mag_raw_y_l register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 table 210. out_mag_raw_y_h register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 table 211. out_mag_raw_y_h register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 table 212. out_mag_raw_z_l register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 table 213. out_mag_raw_z_l register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 table 214. out_mag_raw_z_h register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 table 215. out_mag_raw_z_h register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 table 216. x_ofs_usr register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94 table 217. x_ofs_usr register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94 table 218. y_ofs_usr register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94 table 219. y_ofs_usr register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94 table 220. z_ofs_usr register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94 table 221. z_ofs_usr register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94 table 222. register address map - bank a - embedded functions . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 table 223. register address map - bank b - embedded functions . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 table 224. slv0_add register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97 table 225. slv0_add register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .97 table 226. slv0_subadd register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97 table 227. slv0_subadd register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97 table 228. slave0_config register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .97 table 229. slave0_config register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 table 230. slv1_add register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 table 231. slv1_add register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .98 table 232. slv1_subadd register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 table 233. slv1_subadd register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 table 234. slave1_config register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .99 table 235. slave1_config register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 table 236. slv2_add register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 table 237. slv2_add register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .99 table 238. slv2_subadd register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 table 239. slv2_subadd register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 table 240. slave2_config register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 table 241. slave2_config register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 table 242. slv3_add register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 table 243. slv3_add register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 table 244. slv3_subadd register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 table 245. slv3_subadd register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 table 246. slave3_config register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 table 247. slave3_config register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 table 248. datawrite_src_mode_sub_slv0 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 table 249. datawrite_src_mode_sub_slv0 register description. . . . . . . . . . . . . . . . . . . . . . 101 table 250. config_pedo_ths_min register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 table 251. config_pedo_ths_min register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 table 252. sm_ths register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 table 253. sm_ths register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 table 254. pedo_deb_reg register default values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 table 255. pedo_deb_reg register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 table 256. step_count_delta register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
docid028475 rev 5 13/113 lsm6dsl list of tables 113 table 257. step_count_delta register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 table 258. mag_si_xx register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103 table 259. mag_si_xx register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 03 table 260. mag_si_xy register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103 table 261. mag_si_xy register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 03 table 262. mag_si_xz register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103 table 263. mag_si_xz register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 03 table 264. mag_si_yx register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103 table 265. mag_si_yx register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 03 table 266. mag_si_yy register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104 table 267. mag_si_yy register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 04 table 268. mag_si_yz register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104 table 269. mag_si_yz register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 04 table 270. mag_si_zx register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104 table 271. mag_si_zx register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 04 table 272. mag_si_zy register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104 table 273. mag_si_zy register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 04 table 274. mag_si_zz register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 table 275. mag_si_zz register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 table 276. mag_offx_l register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 table 277. mag_offx_l register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 table 278. mag_offx_h register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 table 279. mag_offx_h register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 table 280. mag_offy_l register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 table 281. mag_offy_l register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 table 282. mag_offy_h register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106 table 283. mag_offy_h register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106 table 284. mag_offz_l register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106 table 285. mag_offz_l register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106 table 286. mag_offz_h register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106 table 287. mag_offz_h register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106 table 288. a_wrist_tilt_lat register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 07 table 289. a_wrist_tilt_lat register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107 table 290. a_wrist_tilt_ths register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 7 table 291. a_wrist_tilt_ths register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107 table 292. a_wrist_tilt_mask register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 7 table 293. a_wrist_tilt_mask register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107 table 294. reel dimensions for carrier tape of lga-14 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111 table 295. document revision history. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
list of figures lsm6dsl 14/113 docid028475 rev 5 list of figures figure 1. pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 2. lsm6dsl connection modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 9 figure 3. spi slave timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 figure 4. i 2 c slave timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 figure 5. block diagram of filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 figure 6. gyroscope digital chain - mode 1 (ui/eis) and mode 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 figure 7. accelerometer chain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 figure 8. accelerometer composite filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 figure 9. read and write protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 figure 10. spi read protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 figure 11. multiple byte spi read protocol (2-byte example) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 figure 12. spi write protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 figure 13. multiple byte spi write protocol (2-byte example). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 figure 14. spi read protocol in 3-wire mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 figure 15. lsm6dsl electrical connections in mode 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 figure 16. lsm6dsl electrical connections in mode 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 figure 17. lga-14 2.5x3x0.86 mm package outline and mechanical data . . . . . . . . . . . . . . . . . . . . 109 figure 18. carrier tape information for lga-14 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110 figure 19. lga-14 package orientation in carrier tape . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110 figure 20. reel information for carrier tape of lga-14 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
docid028475 rev 5 15/113 lsm6dsl overview 113 1 overview the lsm6dsl is a system-in-package featuring a high-performance 3-axis digital accelerometer and 3-axis digital gyroscope. the integrated power-efficient modes are able to reduce the power consumption down to 0.65 ma in high-performance mode, combining always-on low-power features with superior sensing precision for an optimal motion experience for the consumer thanks to ultra-low noise performance for both the gyroscope and accelerometer. the lsm6dsl delivers best-in-class motion sensing that can detect orientation and gestures in order to empower application developers and consumers with features and capabilities that are more sophisticated than simply orienting their devices to portrait and landscape mode. the event-detection interrupts enable efficient and reliable motion tracking and contextual awareness, implementing hardware recognition of free-fall events, 6d orientation, click and double-click sensing, activity or inactivity, and wakeup events. the lsm6dsl supports main os requirements, offering real, virtual and batch mode sensors. in addition, the lsm6dsl can efficiently run the sensor-related features specified in android, saving power and enabling faster reaction time. in particular, the lsm6dsl has been designed to implement hardware features such as significant motion detection, tilt, pedometer functions, timestamping and to support the data acquisition of an external magnetometer with ironing correction (hard, soft). the lsm6dsl offers hardware flexibility to connect the pins with different mode connections to external sensors to expand functionalities such as adding a sensor hub, etc. up to 4 kbyte of fifo with dynamic allocation of significant data (i.e. external sensors, timestamp, etc.) allows overall power saving of the system. like the entire portfolio of mems sensor modules, the lsm6dsl leverages the robust and mature in-house manufacturing processes already used for the production of micromachined accelerometers and gyroscopes. the various sensing elements are manufactured using specialized micromachining processes, while the ic interfaces are developed using cmos technology that allows the design of a dedicated circuit which is trimmed to better match the characteristics of the sensing element. the lsm6dsl is available in a small plastic land grid array (lga) package of 2.5 x 3.0 x 0.83 mm to address ultra-compact solutions.
embedded low-power features lsm6dsl 16/113 docid028475 rev 5 2 embedded low-power features the lsm6dsl has been designed to be fully compliant with android, featuring the following on-chip functions: ? 4 kbyte data buffering ? 100% efficiency with flexible configurations and partitioning ? possibility to store timestamp ? event-detection interrupts (fully configurable): ? free-fall ? wakeup ? 6d orientation ? click and double-click sensing ? activity / inactivity recognition ? specific ip blocks with negligible power consumption and high-performance: ? pedometer functions: step detector and step counters ? tilt (refer to section 2.1: tilt detection for additional information ? absolute wrist tilt (refer to section 2.2: absolute wrist tilt for additional information) ? significant motion detection ? sensor hub ? up to 6 total sensors: 2 internal (accelerometer and gyroscope) and 4 external sensors ? data rate synchronization with external trigger for reduced sensor access and enhanced fusion 2.1 tilt detection the tilt function helps to detect activity change and has been implemented in hardware using only the accelerometer to achieve both the targets of ultra-low power consumption and robustness during the short duration of dynamic accelerations. it is based on a trigger of an event each time the device's tilt changes. for a more customized user experience, in the lsm6dsl the tilt function is configurable through: ? a programmable average window ? a programmable average threshold the tilt function can be used with different scenarios, for example: a) triggers when phone is in a front pants pocket and the user goes from sitting to standing or standing to sitting; b) doesn?t trigger when phone is in a front pants pocket and the user is walking, running or going upstairs.
docid028475 rev 5 17/113 lsm6dsl embedded low-power features 113 2.2 absolute wrist tilt the lsm6dsl implements in hardware the absolute wrist tilt (awt) function which allows detecting when the angle between a selectable accelerometer semi-axis and the horizontal plane becomes higher than a specific user-selectable value. configurable threshold and latency parameters are associated with the awt function: the threshold parameter defines the amplitude of the tilt angle; the latency parameter defines the minimum duration of the awt event to be recognized. the awt interrupt signal is generated if the tilt angle is higher than the threshold angle for a period of time equal to or greater than the latency period. the awt function is based on the accelerometer sensor only and works at 26 hz, so the accelerometer odr must be set at a value of 26 hz or higher. by default, the awt algorithm is applied to the positive x-axis. in order to enable the awt function it is necessary to set to 1 both the func_en bit and the wrist_tilt_en bit of ctrl10_c (19h) . the awt interrupt signal can be driven to the int2 interrupt pin by setting to 1 the int2_wrist_tilt bit of the drdy_pulse_cfg_g (0bh) register; it can also be checked by reading the wrist_tilt_ia bit of the func_src2 (54h) register (it will also clear the interrupt signal if latched). wrist_tilt_ia (55h) is the status register to be used to detect which axis has triggered the awt event (not applicable when using one axis side only). the full description and an example is given in the dedicated application note.
pin description lsm6dsl 18/113 docid028475 rev 5 3 pin description figure 1. pin connections 1. leave pin electrically unconnected and soldered to pcb. y z y x nc nc (1) (1)
docid028475 rev 5 19/113 lsm6dsl pin description 113 3.1 pin connections the lsm6dsl offers flexibility to connect the pins in order to have two different mode connections and functionalities. in detail: ? mode 1 : i 2 c slave interface or spi (3- and 4-wire) serial interface is available; ? mode 2 : i 2 c slave interface or spi (3- and 4-wire) serial interface and i 2 c interface master for external sensor connections are available; figure 2. lsm6dsl connection modes in the following table each mode is described for the pin connection and function. +267 /60'6/ +267 /60'6/ /60'60 /60'60 ([whuqdo vhqvruv ,  &63, z ,  &63, z 0dvwhu,  & 0rgh 0rgh
pin description lsm6dsl 20/113 docid028475 rev 5 table 2. pin description pin# name mode 1 function mode 2 function 1 sdo/sa0 spi 4-wire interface serial data output (sdo) i 2 c least significant bit of the device address (sa0) spi 4-wire interface serial data output (sdo) i 2 c least significant bit of the device address (sa0) 2 sdx connect to vddio or gnd i 2 c serial data master (msda) 3 scx connect to vddio or gnd i 2 c serial clock master (mscl) 4 int1 programmable interrupt 1 5 vddio (1) 1. recommended 100 nf filter capacitor. power supply for i/o pins 6 gnd 0 v supply 7 gnd 0 v supply 8 vdd (1) power supply 9 int2 programmable interrupt 2 (int2) / data enable (den) programmable interrupt 2 (int2)/ data enable (den)/ i 2 c master external synchronization signal (mdrdy) 10 nc (2) 2. leave pin electrically unconnected and soldered to pcb. leave unconnected 11 nc (2) leave unconnected 12 cs i 2 c/spi mode selection (1: spi idle mode / i 2 c communication enabled; 0: spi communication mode / i 2 c disabled) i 2 c/spi mode selection (1: spi idle mode / i 2 c communication enabled; 0: spi communication mode / i 2 c disabled) 13 scl i 2 c serial clock (scl) spi serial port clock (spc) i 2 c serial clock (scl) spi serial port clock (spc) 14 sda i 2 c serial data (sda) spi serial data input (sdi) 3-wire interface serial data output (sdo) i 2 c serial data (sda) spi serial data input (sdi) 3-wire interface serial data output (sdo)
docid028475 rev 5 21/113 lsm6dsl module specifications 113 4 module specifications 4.1 mechanical characteristics @ vdd = 1.8 v, t = 25 c unless otherwise noted. table 3. mechanical characteristics symbol parameter test conditions min. typ. (1) max. unit la_fs linear acceleration measurement range 2 g 4 8 16 g_fs angular rate measurement range 125 dps 245 500 1000 2000 la_so linear acceleration sensitivity (2) fs = 2 0.061 m g /lsb fs = 4 0.122 fs = 8 0.244 fs = 16 0.488 g_so angular rate sensitivity (2) fs = 125 4.375 mdps/lsb fs = 245 8.75 fs = 500 17.50 fs = 1000 35 fs = 2000 70 g_so% sensitivity tolerance (3) at component level 1 % la_sodr linear acceleration sensitivity change vs. temperature (4) from -40 to +85 0.01 %/c g_sodr angular rate sensitivity change vs. temperature (4) from -40 to +85 0.007 %/c la_tyoff linear acceleration zero- g level offset accuracy (5) 40 m g g_tyoff angular rate zero-rate level (4) 3 dps la_offdr linear acceleration zero- g level change vs. temperature (4) 0.1 m g/ c g_offdr angular rate typical zero-rate level change vs. temperature (4) 0.015 dps/c rn rate noise density in high- performance mode (6) 4 mdps/ ? hz
module specifications lsm6dsl 22/113 docid028475 rev 5 rnrms gyroscope rms noise in normal/low-power mode (7) 75 mdps an acceleration noise density in high-performance mode (8) fs = 2 g 90 g / hz fs = 4 g 90 fs = 8 g 90 fs = 16 g 130 rms acceleration rms noise in normal/low-power mode (9)(10) fs = 2 g 1.8 m g (rms) fs = 4 g 2.0 fs = 8 g 2.4 fs = 16 g 3.0 la_odr linear acceleration output data rate 1.6 (11) 12.5 26 52 104 208 416 833 1666 3332 6664 hz g_odr angular rate output data rate 12.5 26 52 104 208 416 833 1666 3332 6664 vst linear acceleration self-test output change (12)(13)(14) 90 1700 m g angular rate self-test output change (15)(16) fs = 245 dps 20 80 dps fs = 2000 dps 150 700 dps top operating temperature range -40 +85 c 1. typical specifications are not guaranteed. 2. sensitivity values after factory calibration test and trimming 3. subject to change. 4. measurements are performed in a uniform temperature setup and they are based on characterization data in a limited number of samples. not measured during final test for production. 5. values after factory calibration test and trimming. table 3. mechanical characteristics (continued) symbol parameter test conditions min. typ. (1) max. unit
docid028475 rev 5 23/113 lsm6dsl module specifications 113 6. gyroscope rate noise density in high-performance mode is independent of the odr and fs setting. 7. gyroscope rms noise in normal/low-power mode is independent of the odr and fs setting. 8. accelerometer noise density in high-performance mode is independent of the odr. 9. accelerometer rms noise in normal/low-power mode is independent of the odr. 10. noise rms related to bw = odr /2 (for odr /9, typ value can be calculated by typ *0.6). 11. this odr is available when accelerometer is in low-power mode. 12. the sign of the linear acceleration self-test output change is defined by the stx_xl bits in ctrl5_c (14h) , table 63 for all axes. 13. the linear acceleration self-test output change is defined with the device in stationary condition as the absolute value of: output[lsb] (self-test enabled) - output[lsb] (self-test disabled). 1lsb = 0.061 m g at 2 g full scale. 14. accelerometer self-test limits are full-scale independent. 15. the sign of the angular rate self-test output change is defined by the stx_g bits in ctrl5_c (14h) , table 62 for all axes. 16. the angular rate self-test output change is defined with the device in stationary condition as the absolute value of: output[lsb] (self-test enabled) - output[lsb] (self-test disabled). 1lsb = 70 mdps at 2000 dps full scale.
module specifications lsm6dsl 24/113 docid028475 rev 5 4.2 electrical characteristics @ vdd = 1.8 v, t = 25 c unless otherwise noted. table 4. electrical characteristics symbol parameter test conditions min. typ. (1) 1. t ypical specifications are not guaranteed. max. unit vdd supply voltage 1.71 1.8 3.6 v vdd_io power supply for i/o 1.62 3.6 v iddhp gyroscope and accelerometer current consumption in high-performance mode odr = 1.6 khz 0.65 ma iddnm gyroscope and accelerometer current consumption in normal mode odr = 208 hz 0.45 ma iddlp gyroscope and accelerometer current consumption in low-power mode odr = 52 hz 0.29 ma la_iddhp accelerometer current consumption in high-performance mode odr < 1.6 khz odr 1.6 khz 150 160 a la_iddnm accelerometer current consumption in normal mode odr = 208 hz 85 a la_iddlm accelerometer current consumption in low-power mode odr = 52 hz odr = 12.5 hz odr = 1.6 hz 25 9 4.5 a iddpd gyroscope and accelerometer current consumption during power-down 3 a ton turn-on time 35 ms v ih digital high-level input voltage 0.7 *vdd_io v v il digital low-level input voltage 0.3 *vdd_io v v oh high-level output voltage i oh = 4 ma (2) 2. 4 ma is the maximum driving capability, i.e. the maximum dc current that can be sourced/sunk by the digital pad in order to guarantee the correct digital output voltage levels v oh and v ol . vdd_io - 0.2 v v ol low-level output voltage i ol = 4 ma (2) 0.2 v top operating temperature range -40 +85 c
docid028475 rev 5 25/113 lsm6dsl module specifications 113 4.3 temperature sensor characteristics @ vdd = 1.8 v, t = 25 c unless otherwise noted. table 5. temperature sensor characteristics symbol parameter test condition min. typ. (1) 1. typical specifications are not guaranteed. max. unit todr (2) 2. when the accelerometer is in low-power mode and the gyroscope part is turned off, the todr value is equal to the accelerometer odr. temperature refresh rate 52 hz toff temperature offset (3) 3. the output of the temperature sensor is 0 lsb (typ.) at 25 c. -15 +15 c tsen temperature sensitivity 256 lsb/c tst temperature stabilization time (4) 4. time from power on bit to valid data based on characterization data. 500 s t_adc_res temperature adc resolution 16 bit top operating temperature range -40 +85 c
module specifications lsm6dsl 26/113 docid028475 rev 5 4.4 communication interface characteristics 4.4.1 spi - serial peripheral interface subject to general operating conditions for vdd and top. figure 3. spi slave timing diagram note: measurement points are done at 0.2vdd_io and 0.8vdd_io, for both input and output ports. table 6. spi slave timing values symbol parameter value (1) unit min max t c(spc) spi clock cycle 100 ns f c(spc) spi clock frequency 10 mhz t su(cs) cs setup time 5 ns t h(cs) cs hold time 20 t su(si) sdi input setup time 5 t h(si) sdi input hold time 15 t v(so) sdo valid output time 50 t h(so) sdo output hold time 5 t dis(so) sdo output disable time 50 1. values are guaranteed at 10 mhz clock frequency for spi with both 4 and 3 wires, based on characterization results, not tested in production
docid028475 rev 5 27/113 lsm6dsl module specifications 113 4.4.2 i 2 c - inter-ic control interface subject to general operating conditions for vdd and top. figure 4. i 2 c slave timing diagram note: measurement points are done at 0.2vdd_io and 0.8vdd_io, for both ports. table 7. i 2 c slave timing values symbol parameter i 2 c standard mode (1) i 2 c fast mode (1) unit min max min max f (scl) scl clock frequency 0 100 0 400 khz t w(scll) scl clock low time 4.7 1.3 s t w(sclh) scl clock high time 4.0 0.6 t su(sda) sda setup time 250 100 ns t h(sda) sda data hold time 0 3.45 0 0.9 s t h(st) start condition hold time 4 0.6 s t su(sr) repeated start condition setup time 4.7 0.6 t su(sp) stop condition setup time 4 0.6 t w(sp:sr) bus free time between stop and start condition 4.7 1.3 1. data based on standard i 2 c protocol requirement, not tested in production. 6' $ 6&/ w vx 63 w z 6&// w vx 6'$ w vx 65 w k 67 w z 6&/+ w k 6'$ w z 6365 67$57 5(3($ 7(' 67$ 57 6723 67$ 57
module specifications lsm6dsl 28/113 docid028475 rev 5 4.5 absolute maximum ratings stresses above those listed as ?absolute maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device under these conditions is not implied. exposure to maximum rating conditions for extended periods may affect device reliability. note: supply voltage on any pin should never exceed 4.8 v. table 8. absolute maximum ratings symbol ratings maximum value unit vdd supply voltage -0.3 to 4.8 v t stg storage temperature range -40 to +125 c sg acceleration g for 0.2 ms 10,000 g esd electrostatic discharge protection (hbm) 2 kv vin input voltage on any control pin (including cs, scl/spc, sda/sdi/sdo, sdo/sa0) 0.3 to vdd_io +0.3 v this device is sensitive to mechanical shock, improper handling can cause permanent damage to the part. this device is sensitive to electrostatic discharge (esd), improper handling can cause permanent damage to the part.
docid028475 rev 5 29/113 lsm6dsl module specifications 113 4.6 terminology 4.6.1 sensitivity linear acceleration sensitivity can be determined, for example, by applying 1 g acceleration to the device. because the sensor can measure dc accelerations, this can be done easily by pointing the selected axis towards the ground, noting the output value, rotating the sensor 180 degrees (pointing towards the sky) and noting the output value again. by doing so, 1 g acceleration is applied to the sensor. subtracting the larger output value from the smaller one, and dividing the result by 2, leads to the actual sensitivity of the sensor. this value changes very little over temperature and over time. the sensitivity tolerance describes the range of sensitivities of a large number of sensors (see table 3 ). an angular rate gyroscope is a device that produces a positive-going digital output for counterclockwise rotation around the axis considered. sensitivity describes the gain of the sensor and can be determined by applying a defined angular velocity to it. this value changes very little over temperature and time (see table 3 ). 4.6.2 zero- g and zero-rate level linear acceleration zero- g level offset (tyoff) describes the deviation of an actual output signal from the ideal output signal if no acceleration is present. a sensor in a steady state on a horizontal surface will measure 0 g on both the x-axis and y-axis, whereas the z-axis will measure 1 g . ideally, the output is in the middle of the dynamic range of the sensor (content of out registers 00h, data expressed as 2?s complement number). a deviation from the ideal value in this case is called zero- g offset. offset is to some extent a result of stress to mems sensor and therefore the offset can slightly change after mounting the sensor onto a printed circuit board or exposing it to extensive mechanical stress. offset changes little over temperature, see ?linear acceleration zero- g level change vs. temperature? in table 3 . the zero- g level tolerance (tyoff) describes the standard deviation of the range of zero- g levels of a group of sensors. zero-rate level describes the actual output signal if there is no angular rate present. the zero-rate level of precise mems sensors is, to some extent, a result of stress to the sensor and therefore the zero-rate level can slightly change after mounting the sensor onto a printed circuit board or after exposing it to extensive mechanical stress. this value changes very little over temperature and time (see table 3 ).
functionality lsm6dsl 30/113 docid028475 rev 5 5 functionality 5.1 operating modes in the lsm6dsl, the accelerometer and the gyroscope can be turned on/off independently of each other and are allowed to have different odrs and power modes. the lsm6dsl has three operating modes available: ? only accelerometer active and gyroscope in power-down ? only gyroscope active and accelerometer in power-down ? both accelerometer and gyroscope sensors active with independent odr the accelerometer is activated from power-down by writing odr_xl[3:0] in ctrl1_xl (10h) while the gyroscope is activated from power-down by writing odr_g[3:0] in ctrl2_g (11h) . for combo-mode the odrs are totally independent. 5.2 gyroscope power modes in the lsm6dsl, the gyroscope can be configured in four different operating modes: power- down, low-power, normal mode and high-performance mode. the operating mode selected depends on the value of the g_hm_mode bit in ctrl7_g (16h) . if g_hm_mode is set to '0', high-performance mode is valid for all odrs (from 12.5 hz up to 6.66 khz). to enable the low-power and normal mode, the g_hm_mode bit has to be set to '1'. low- power mode is available for lower odrs (12.5, 26, 52 hz) while normal mode is available for odrs equal to 104 and 208 hz. 5.3 accelerometer power modes in the lsm6dsl, the accelerometer can be configured in four different operating modes: power-down, low-power, normal mode and high-performance mode. the operating mode selected depends on the value of the xl_hm_mode bit in ctrl6_c (15h) . if xl_hm_mode is set to '0', high-performance mode is valid for all odrs (from 12.5 hz up to 6.66 khz). to enable the low-power and normal mode, the xl_hm_mode bit has to be set to '1'. low- power mode is available for lower odrs (1.6, 12.5, 26, 52 hz) while normal mode is available for odrs equal to 104 and 208 hz.
docid028475 rev 5 31/113 lsm6dsl functionality 113 5.4 block diagram of filters figure 5. block diagram of filters 5.4.1 block diagrams of the gyroscope filters the gyroscope filtering configuration for both mode 1 (for user interface (ui) and electronic image stabilization (eis) functionality) and mode 2 is shown in figure 6 . figure 6. gyroscope digital chain - mode 1 (ui/eis) and mode 2 the gyroscope odr is selectable from 12.5 hz up to 6.66 khz. a low-pass filter (lpf1) is available, for more details about the filter characteristics see table 67: gyroscope lpf1 bandwidth selection . data can be acquired from the output registers and fifo over the i 2 c/spi interface. $'& +3) +3b(1b* /3) /3) /3)b6(/b* 63,,  & ),)2 )7<3( >@     2'5b*
functionality lsm6dsl 32/113 docid028475 rev 5 5.4.2 block diagrams of the accelerometer filters in the lsm6dsl, the filtering chain for the accelerometer part is composed of the following: ? analog filter (anti-aliasing) ? digital filter (lpf1) ? composite filter details of the block diagram appear in the following figure. figure 7. accelerometer chain the configuration of the digital filter can be set using the lpf1_bw_sel bit in ctrl1_xl (10h) and the input_composite bit in ctrl8_xl (17h) . figure 8. accelerometer composite filter 1. pedometer, step detector and step counter, significant motion and tilt functions. $'& 'ljlwdo /3)lowhu $qdorj $qwldoldvlqj /3)lowhu /3)b%:b6(/ ,1387b&20326,7( &rpsrvlwh )lowhu /3) /3)b%:b6(/   2'5 2'5 )uhhidoo 6pduw ixqfwlrqv ,1387b&20326,7(   2'5 2'5 /3)b;/b(1   /3) +3&)b;/>@ +3) +3&)b;/>@ 2'5 6/23( ),/7(5 +3&)b;/>@     /2:b3$66b21b'   6'7ds '' +3b6/23(b;/b(1   ;/rxwsxw uhj ),)2 6/23(b)'6   :dnhxs $fwlylw\ ,qdfwlylw\ 
docid028475 rev 5 33/113 lsm6dsl functionality 113 5.5 fifo the presence of a fifo allows consistent power saving for the system since the host processor does not need continuously poll data from the sensor, but it can wake up only when needed and burst the significant data out from the fifo. the lsm6dsl embeds 4 kbytes data fifo to store the following data: ? gyroscope ? accelerometer ? external sensors ? step counter and timestamp ? temperature writing data in the fifo can be configured to be triggered by the: ? accelerometer/gyroscope data-ready signal; in which case the odr must be lower than or equal to both the accelerometer and gyroscope odrs; ? sensor hub data-ready signal; ? step detection signal. in addition, each data can be stored at a decimated data rate compared to fifo odr and it is configurable by the user, setting the fifo_ctrl3 (08h) and fifo_ctrl4 (09h) registers. the available decimation factors are 2, 3, 4, 8, 16, 32. the programmable fifo threshold can be set in fifo_ctrl1 (06h) and fifo_ctrl2 (07h) using the fth [11:0] bits. to monitor the fifo status, dedicated registers fifo_status1 (3ah) , fifo_status2 (3bh) , fifo_status3 (3ch) , fifo_status4 (3dh) ) can be read to detect fifo overrun events, fifo full status, fifo empty status, fifo threshold status and the number of unread samples stored in the fifo. to generate dedicated interrupts on the int1 and int2 pads of these status events, the configuration can be set in int1_ctrl (0dh) and int2_ctrl (0eh) . the fifo buffer can be configured according to five different modes: ? bypass mode ? fifo mode ? continuous mode ? continuous-to-fifo mode ? bypass-to-continuous mode each mode is selected by the fifo_mode_[2:0] bits in the fifo_ctrl5 (0ah) register. to guarantee the correct acquisition of data during the switching into and out of fifo mode, the first sample acquired must be discarded. 5.5.1 bypass mode in bypass mode ( fifo_ctrl5 (0ah) (fifo_mode_[2:0] = 000), the fifo is not operational and it remains empty. bypass mode is also used to reset the fifo when in fifo mode.
functionality lsm6dsl 34/113 docid028475 rev 5 5.5.2 fifo mode in fifo mode ( fifo_ctrl5 (0ah) (fifo_mode_[2:0] = 001) data from the output channels are stored in the fifo until it is full. to reset fifo content, bypass mode should be selected by writing fifo_ctrl5 (0ah) (fifo_mode_[2:0]) to '000' after this reset command, it is possible to restart fifo mode by writing fifo_ctrl5 (0ah) (fifo_mode_[2:0]) to '001'. fifo buffer memorizes up to 4096 samples of 16 bits each but the depth of the fifo can be resized by setting the fth [11:0] bits in fifo_ctrl1 (06h) and fifo_ctrl2 (07h) . if the stop_on_fth bit in ctrl4_c (13h) is set to '1', fifo depth is limited up to fth [11:0] bits in fifo_ctrl1 (06h) and fifo_ctrl2 (07h) . 5.5.3 continuous mode continuous mode ( fifo_ctrl5 (0ah) (fifo_mode_[2:0] = 110) provides a continuous fifo update: as new data arrives, the older data is discarded. a fifo threshold flag fifo_status2 (3bh) (fth) is asserted when the number of unread samples in fifo is greater than or equal to fifo_ctrl1 (06h) and fifo_ctrl2 (07h) (fth [11:0]). it is possible to route fifo_status2 (3bh) (fth) to the int1 pin by writing in register int1_ctrl (0dh) (int1_fth) = ?1? or to the int2 pin by writing in register int2_ctrl (0eh) (int2_fth) = ?1?. a full-flag interrupt can be enabled, int1_ctrl (0dh) (int_ full_flag) = '1', in order to indicate fifo saturation and eventually read its content all at once. if an overrun occurs, at least one of the oldest samples in fifo has been overwritten and the over_run flag in fifo_status2 (3bh) is asserted. in order to empty the fifo before it is full, it is also possible to pull from fifo the number of unread samples available in fifo_status1 (3ah) and fifo_status2 (3bh) (diff_fifo[11:0]). 5.5.4 continuous-to-fifo mode in continuous-to-fifo mode fifo_ctrl5 (0ah) (fifo_mode_[2:0] = 011), fifo behavior changes according to the trigger event detected in one of the following interrupt registers func_src1 (53h) , tap_src (1ch) , wake_up_src (1bh) and d6d_src (1dh) . when the selected trigger bit is equal to '1', fifo operates in fifo mode. when the selected trigger bit is equal to '0', fifo operates in continuous mode. 5.5.5 bypass-to-continuous mode in bypass-to-continuous mode ( fifo_ctrl5 (0ah) (fifo_mode_[2:0] = '100'), data measurement storage inside fifo operates in continuous mode when selected triggers in one of the following interrupt registers func_src1 (53h) , tap_src (1ch) , wake_up_src (1bh) and d6d_src (1dh) are equal to '1', otherwise fifo content is reset (bypass mode).
docid028475 rev 5 35/113 lsm6dsl functionality 113 5.5.6 fifo reading procedure the data stored in fifo are accessible from dedicated registers ( fifo_data_out_l (3eh) and fifo_data_out_h (3fh) ) and each fifo sample is composed of 16 bits. all fifo status registers ( fifo_status1 (3ah) , fifo_status2 (3bh) , fifo_status3 (3ch) , fifo_status4 (3dh) ) can be read at the start of a reading operation, minimizing the intervention of the application processor. saving data in the fifo buffer is organized in four fifo data sets consisting of 6 bytes each: the 1 st fifo data set is reserved for gyroscope data; the 2 nd fifo data set is reserved for accelerometer data; the 3 rd fifo data set is reserved for the external sensor data stored in the registers from sensorhub1_reg (2eh) to sensorhub6_reg (33h) ; the 4 th fifo data set can be alternately associated to the external sensor data stored in the registers from sensorhub7_reg (34h) to sensorhub12_reg (39h) , to the step counter and timestamp info, or to the temperature sensor data.
digital interfaces lsm6dsl 36/113 docid028475 rev 5 6 digital interfaces 6.1 i 2 c/spi interface the registers embedded inside the lsm6dsl may be accessed through both the i 2 c and spi serial interfaces. the latter may be sw configured to operate either in 3-wire or 4-wire interface mode. the serial interfaces are mapped onto the same pins. to select/exploit the i 2 c interface, the cs line must be tied high (i.e connected to vdd_io). 6.2 master i 2 c if the lsm6dsl is configured in mode2, a master i 2 c line is available. the master serial interface is mapped in the following dedicated pins. table 9. serial interface pin description pin name pin description cs spi enable i 2 c/spi mode selection (1: spi idle mode / i 2 c communication enabled; 0: spi communication mode / i 2 c disabled) scl/spc i 2 c serial clock (scl) spi serial port clock (spc) sda/sdi/sdo i 2 c serial data (sda) spi serial data input (sdi) 3-wire interface serial data output (sdo) sdo/sa0 spi serial data output (sdo) i 2 c less significant bit of the device address table 10. master i 2 c pin details pin name pin description mscl i 2 c serial clock master msda i 2 c serial data master mdrdy i 2 c master external synchronization signal
docid028475 rev 5 37/113 lsm6dsl digital interfaces 113 6.3 i 2 c serial interface the lsm6dsl i 2 c is a bus slave. the i 2 c is employed to write the data to the registers, whose content can also be read back. the relevant i 2 c terminology is provided in the table below. there are two signals associated with the i 2 c bus: the serial clock line (scl) and the serial data line (sda). the latter is a bidirectional line used for sending and receiving the data to/from the interface. both the lines must be connected to vdd_io through external pull-up resistors. when the bus is free, both the lines are high. the i 2 c interface is implemeted with fast mode (400 khz) i 2 c standards as well as with the standard mode. in order to disable the i 2 c block, (i2c_disable) = 1 must be written in ctrl4_c (13h) . 6.3.1 i 2 c operation the transaction on the bus is started through a start (st) signal. a start condition is defined as a high to low transition on the data line while the scl line is held high. after this has been transmitted by the master, the bus is considered busy. the next byte of data transmitted after the start condition contains the address of the slave in the first 7 bits and the eighth bit tells whether the master is receiving data from the slave or transmitting data to the slave. when an address is sent, each device in the system compares the first seven bits after a start condition with its address. if they match, the device considers itself addressed by the master. the slave address (sad) associated to the lsm6dsl is 110101xb. the sdo/sa0 pin can be used to modify the less significant bit of the device address. if the sdo/sa0 pin is connected to the supply voltage, lsb is ?1? (address 1101011b); else if the sdo/sa0 pin is connected to ground, the lsb value is ?0? (address 1101010b). this solution permits to connect and address two different inertial modules to the same i 2 c bus. data transfer with acknowledge is mandatory. the transmitter must release the sda line during the acknowledge pulse. the receiver must then pull the data line low so that it remains stable low during the high period of the acknowledge clock pulse. a receiver which has been addressed is obliged to generate an acknowledge after each byte of data received. the i 2 c embedded inside the lsm6dsl behaves like a slave device and the following protocol must be adhered to. after the start condition (st) a slave address is sent, once a slave acknowledge (sak) has been returned, an 8-bit sub-address (sub) is transmitted. the increment of the address is configured by the ctrl3_c (12h) (if_inc). table 11. i 2 c terminology term description transmitter the device which sends data to the bus receiver the device which receives data from the bus master the device which initiates a transfer, generates clock signals and terminates a transfer slave the device addressed by the master
digital interfaces lsm6dsl 38/113 docid028475 rev 5 the slave address is completed with a read/write bit. if the bit is ?1? (read), a repeated start (sr) condition must be issued after the two sub-address bytes; if the bit is ?0? (write) the master will transmit to the slave with direction unchanged. table 12 explains how the sad+read/write bit pattern is composed, listing all the possible configurations. table 12. sad+read/write patterns data are transmitted in byte format (data). each data transfer contains 8 bits. the number of bytes transferred per transfer is unlimited. data is transferred with the most significant bit (msb) first. if a receiver can?t receive another complete byte of data until it has performed some other function, it can hold the clock line, scl low to force the transmitter into a wait state. data transfer only continues when the receiver is ready for another byte and releases the data line. if a slave receiver doesn?t acknowledge the slave address (i.e. it is not able to receive because it is performing some real-time function) the data line must be left high by the slave. the master can then abort the transfer. a low to high transition on the sda line while the scl line is high is defined as a stop condition. each data transfer must be terminated by the generation of a stop (sp) condition. in the presented communication format mak is master acknowledge and nmak is no master acknowledge. command sad[6:1] sad[0] = sa0 r/w sad+r/w read 110101 0 1 11010101 (d5h) write 110101 0 0 11010100 (d4h) read 110101 1 1 11010111 (d7h) write 110101 1 0 11010110 (d6h) table 13. transfer when master is writing one byte to slave master st sad + w sub data sp slave sak sak sak table 14. transfer when master is writing multiple bytes to slave master st sad + w sub data data sp slave sak sak sak sak table 15. transfer when master is receiving (reading) one byte of data from slave master st sad + w sub sr sad + r nmak sp slave sak sak sak data table 16. transfer when master is receiving (reading) multiple bytes of data from slave master st sad+w sub sr sad+r mak mak nmak sp slave sak sak sak data dat a data
docid028475 rev 5 39/113 lsm6dsl digital interfaces 113 6.4 spi bus interface the lsm6dsl spi is a bus slave. the spi allows writing and reading the registers of the device. the serial interface communicates to the application using 4 wires: cs , spc , sdi and sdo . figure 9. read and write protocol cs is the serial port enable and it is controlled by the spi master. it goes low at the start of the transmission and goes back high at the end. spc is the serial port clock and it is controlled by the spi master. it is stopped high when cs is high (no transmission). sdi and sdo are, respectively, the serial port data input and output. those lines are driven at the falling edge of spc and should be captured at the rising edge of spc . both the read register and write register commands are completed in 16 clock pulses or in multiples of 8 in case of multiple read/write bytes. bit duration is the time between two falling edges of spc . the first bit (bit 0) starts at the first falling edge of spc after the falling edge of cs while the last bit (bit 15, bit 23, ...) starts at the last falling edge of spc just before the rising edge of cs . bit 0 : r w bit. when 0, the data di(7:0) is written into the device. when 1, the data do(7:0) from the device is read. in latter case, the chip will drive sdo at the start of bit 8. bit 1-7 : address ad(6:0). this is the address field of the indexed register. bit 8-15 : data di(7:0) (write mode). this is the data that is written into the device (msb first). bit 8-15 : data do(7:0) (read mode). this is the data that is read from the device (msb first). in multiple read/write commands further blocks of 8 clock periods will be added. when the ctrl3_c (12h) (if_inc) bit is ?0?, the address used to read/write data remains the same for every block. when the ctrl3_c (12h) (if_inc) bit is ?1?, the address used to read/write data is increased at every block. the function and the behavior of sdi and sdo remain unchanged. &6 63& 6', 6'2 5: $' $' $' $' $' $' ', ', ', ', ', ', ', ', '2 '2 '2 '2 '2 '2 '2 '2 $'
digital interfaces lsm6dsl 40/113 docid028475 rev 5 6.4.1 spi read figure 10. spi read protocol the spi read command is performed with 16 clock pulses. a multiple byte read command is performed by adding blocks of 8 clock pulses to the previous one. bit 0 : read bit. the value is 1. bit 1-7 : address ad(6:0). this is the address field of the indexed register. bit 8-15 : data do(7:0) (read mode). this is the data that will be read from the device (msb first). bit 16-... : data do(...-8). further data in multiple byte reads. figure 11. multiple byte spi read protocol (2-byte example) &6 63& 6', 6'2 5: '2 '2 '2 '2 '2 '2 '2 '2 $' $' $' $' $' $' $' &6 63& 6', 6'2 5: '2 '2 '2 '2 '2 '2 '2 '2 $' $' $' $' $' $' '2'2 '2 '2'2'2'2 '2 06
docid028475 rev 5 41/113 lsm6dsl digital interfaces 113 6.4.2 spi write figure 12. spi write protocol the spi write command is performed with 16 clock pulses. a multiple byte write command is performed by adding blocks of 8 clock pulses to the previous one. bit 0 : write bit. the value is 0. bit 1 -7 : address ad(6:0). this is the address field of the indexed register. bit 8-15 : data di(7:0) (write mode). this is the data that is written inside the device (msb first). bit 16-... : data di(...-8). further data in multiple byte writes. figure 13. multiple byte spi write protocol (2-byte example) &6 63& 6', 5: ', ', ', ', ', ', ', ', $' $' $' $' $' $' $' &6 63& 6', 5: $' $' $' $' $' $' ', ', ', ', ', ', ', ', ',',',',',',', ', 06
digital interfaces lsm6dsl 42/113 docid028475 rev 5 6.4.3 spi read in 3-wire mode a 3-wire mode is entered by setting the ctrl3_c (12h) (sim) bit equal to ?1? (spi serial interface mode selection). figure 14. spi read protocol in 3-wire mode the spi read command is performed with 16 clock pulses: bit 0 : read bit. the value is 1. bit 1-7 : address ad(6:0). this is the address field of the indexed register. bit 8-15 : data do(7:0) (read mode). this is the data that is read from the device (msb first). a multiple read command is also available in 3-wire mode. &6 63& 6',2 5: '2 '2 '2 '2 '2 '2 '2 '2 $' $' $' $' $' $' $'
docid028475 rev 5 43/113 lsm6dsl application hints 113 7 application hints 7.1 lsm6dsl electrical connections in mode 1 figure 15. lsm6dsl electrical connections in mode 1 1. leave pin electrically unconnected and soldered to pcb. the device core is supplied through the vdd line. power supply decoupling capacitors (c1, c2 = 100 nf ceramic) should be placed as near as possible to the supply pin of the device (common design practice). the functionality of the device and the measured acceleration/angular rate data is selectable and accessible through the spi/i 2 c interface. the functions, the threshold and the timing of the two interrupt pins for each sensor can be completely programmed by the user through the spi/i 2 c interface. *1'ru9'',2 9ggb,2 *1' q) & 6'26$ 6'[ 6&[ ,17 *1' 9'',2 &6 6&/ 6'$     723 9,(: 9'' ,17 1& 1&    9gg *1' q) & *1'  6&/ 6'$ 9ggb,2 5 sx 5 sx 3xooxswrehdgghg 5 sx n2kp ,  &frqiljxudwlrq +267 /60'6/ ,  &63, z 0rgh  
application hints lsm6dsl 44/113 docid028475 rev 5 7.2 lsm6dsl electrical connections in mode 2 figure 16. lsm6dsl electrical connections in mode 2 1. leave pin electrically unconnected and soldered to pcb. the device core is supplied through the vdd line. power supply decoupling capacitors (c1, c2 = 100 nf ceramic) should be placed as near as possible to the supply pin of the device (common design practice). the functionality of the device and the measured acceleration/angular rate data is selectable and accessible through the spi/i 2 c interface. the functions, the threshold and the timing of the two interrupt pins for each sensor can be completely programmed by the user through the spi/i 2 c interface. 9ggb,2 *1' q) & 6'26$ 06'$ 06&/ ,17 *1' 9'',2 &6 6&/ 6'$     723 9,(: 9'' 1& 1&    9gg *1' q) & 0'5'<,17 *1'  +267 /60'6/ /60'60 /60'60 ([whuqdo vhqvruv ,  &63, z 0dvwhu,  & 0rgh 6&/ 6'$ 9ggb,2 5 sx 5 sx 3xooxswrehdgghg 5 sx n2kp ,  &frqiljxudwlrq  
lsm6dsl application hints docid028475 rev 5 45/113 table 17. internal pin status pin# name mode 1 function mode 2 function pin status mode 1 pin status mode 2 1 sdo spi 4-wire interface serial data output (sdo) spi 4-wire interface serial data output (sdo) default: input without pull-up. pull-up is enabled if bit sim = 1 (spi 3-wire) in reg 12h. default: input without pull-up. pull-up is enabled if bit sim = 1 (spi 3-wire) in reg 12h. sa0 i 2 c least significant bit of the device address (sa0) i 2 c least significant bit of the device address (sa0) 2 sdx connect to vddio or gnd i 2 c serial data master (msda) default: input without pull-up. pull-up is enabled if bit pull_up_en = 1 in reg 1ah. default: input without pull-up. pull-up is enabled if bit pull_up_en = 1 in reg 1ah. 3 scx connect to vddio or gnd i 2 c serial clock master (mscl) default: input without pull-up. pull-up is enabled if bit pull_up_en = 1 in reg 1ah. default: input without pull-up. pull-up is enabled if bit pull_up_en = 1 in reg 1ah. 4 int1 programmable interrupt 1 programmable interrupt 1 default: output forced to ground default: output forced to ground 5 vdd_io power supply for i/o pins power supply for i/o pins 6 gnd 0 v supply 0 v supply 7 gnd 0 v supply 0 v supply 8 vdd power supply power supply 9 int2 programmable interrupt 2 (int2) / data enabled (den) programmable interrupt 2 (int2) / data enabled (den) / i 2 c master external synchronization signal (mdrdy) default: output forced to ground default: output forced to ground 10 nc leave unconnected (1) leave unconnected (1) leave unconnected (1) leave unconnected (1) 11 nc leave unconnected (1) leave unconnected (1) leave unconnected (1) leave unconnected (1) 12 cs i 2 c/spi mode selection (1:spi idle mode / i 2 c communication enabled; 0: spi communication mode / i 2 c disabled) i 2 c/spi mode selection (1:spi idle mode / i 2 c communication enabled; 0: spi communication mode / i 2 c disabled) default: input with pull-up. pull-up is disabled if bit i2c_disable = 1 in reg 13h. default: input with pull-up. pull-up is disabled if bit i2c_disable = 1 in reg 13h.
lsm6dsl application hints docid028475 rev 5 46/113 internal pull-up value is from 30 k to 50 k , depending on vddio. 13 scl i 2 c serial clock (scl) / spi serial port clock (spc) i 2 c serial clock (scl) / spi serial port clock (spc) input without pull-up input without pull-up 14 sda i 2 c serial data (sda) / spi serial data input (sdi) / 3-wire interface serial data output (sdo) i 2 c serial data (sda) / spi serial data input (sdi) / 3-wire interface serial data output (sdo) input without pull-up input without pull-up 1. leave pin electrically unconnected and soldered to pcb. table 17. internal pin status (continued) pin# name mode 1 function mode 2 function pin status mode 1 pin status mode 2
docid028475 rev 5 47/113 lsm6dsl register mapping 113 8 register mapping the table given below provides a list of the 8/16-bit registers embedded in the device and the corresponding addresses. table 18. registers address map name type register address default comment hex binary reserved - 00 00000000 - reserved func_cfg_access r/w 01 00000001 00000000 embedded functions configuration register reserved - 02 00000010 - reserved reserved - 03 00000011 - reserved sensor_sync_time_ frame r/w 04 00000100 00000000 sensor sync configuration register sensor_sync_res_ ratio r/w 05 00000101 00000000 fifo_ctrl1 r/w 06 00000110 00000000 fifo configuration registers fifo_ctrl2 r/w 07 00000111 00000000 fifo_ctrl3 r/w 08 00001000 00000000 fifo_ctrl4 r/w 09 00001001 00000000 fifo_ctrl5 r/w 0a 00001010 00000000 drdy_pulse_cfg_g r/w 0b 00001011 00000000 reserved - 0c 00001100 - reserved int1_ctrl r/w 0d 00001101 00000000 int1 pin control int2_ctrl r/w 0e 00001110 00000000 int2 pin control who_am_i r 0f 00001111 01101010 who i am id ctrl1_xl r/w 10 00010000 00000000 accelerometer and gyroscope control registers ctrl2_g r/w 11 00010001 00000000 ctrl3_c r/w 12 00010010 00000100 ctrl4_c r/w 13 00010011 00000000 ctrl5_c r/w 14 00010100 00000000 ctrl6_c r/w 15 00010101 00000000 ctrl7_g r/w 16 00010110 00000000 ctrl8_xl r/w 17 0001 0111 00000000 ctrl9_xl r/w 18 00011000 00000000 ctrl10_c r/w 19 00011001 00000000
register mapping lsm6dsl 48/113 docid028475 rev 5 master_config r/w 1a 00011010 00000000 i 2 c master configuration register wake_up_src r 1b 00011011 output interrupt registers tap_src r 1c 00011100 output d6d_src r 1d 00011101 output status_reg r 1e 00011110 output status data register for user interface reserved - 1f 0001 1111 - out_temp_l r 20 00100000 output temperature output data registers out_temp_h r 21 00100001 output outx_l_g r 22 00100010 output gyroscope output registers for user interface outx_h_g r 23 00100011 output outy_l_g r 24 00100100 output outy_h_g r 25 00100101 output outz_l_g r 26 00100110 output outz_h_g r 27 00100111 output outx_l_xl r 28 00101000 output accelerometer output registers outx_h_xl r 29 00101001 output outy_l_xl r 2a 00101010 output outy_h_xl r 2b 00101011 output outz_l_xl r 2c 00101100 output outz_h_xl r 2d 00101101 output sensorhub1_reg r 2e 00101110 output sensor hub output registers sensorhub2_reg r 2f 00101111 output sensorhub3_reg r 30 00110000 output sensorhub4_reg r 31 00110001 output sensorhub5_reg r 32 00110010 output sensorhub6_reg r 33 00110011 output sensorhub7_reg r 34 00110100 output sensorhub8_reg r 35 00110101 output sensorhub9_reg r 36 00110110 output sensorhub10_reg r 37 00110111 output sensorhub11_reg r 38 00111000 output sensorhub12_reg r 39 00111001 output table 18. registers address map (continued) name type register address default comment hex binary
docid028475 rev 5 49/113 lsm6dsl register mapping 113 fifo_status1 r 3a 00111010 output fifo status registers fifo_status2 r 3b 00111011 output fifo_status3 r 3c 00111100 output fifo_status4 r 3d 00111101 output fifo_data_out_l r 3e 00111110 output fifo data output registers fifo_data_out_h r 3f 0011 1111 output timestamp0_reg r 40 01000000 output timestamp output registers timestamp1_reg r 41 01000001 output timestamp2_reg r/w 42 01000010 output reserved - 43-48 - reserved step_timestamp_l r 49 0100 1001 output step counter timestamp registers step_timestamp_h r 4a 0100 1010 output step_counter_l r 4b 01001011 output step counter output registers step_counter_h r 4c 01001100 output sensorhub13_reg r 4d 01001101 output sensor hub output registers sensorhub14_reg r 4e 01001110 output sensorhub15_reg r 4f 01001111 output sensorhub16_reg r 50 01010000 output sensorhub17_reg r 51 01010001 output sensorhub18_reg r 52 01010010 output func_src1 r 53 01010011 output interrupt registers func_src2 r 54 01010100 output wrist_tilt_ia r 55 01010101 output interrupt register reserved - 56-57 - reserved tap_cfg r/w 58 01011000 00000000 interrupt registers tap_ths_6d r/w 59 01011001 00000000 int_dur2 r/w 5a 01011010 00000000 wake_up_ths r/w 5b 01011011 00000000 wake_up_dur r/w 5c 01011100 00000000 free_fall r/w 5d 01011101 00000000 md1_cfg r/w 5e 01011110 00000000 md2_cfg r/w 5f 0101 1111 00000000 master_cmd_code r/w 60 01100000 00000000 table 18. registers address map (continued) name type register address default comment hex binary
register mapping lsm6dsl 50/113 docid028475 rev 5 sens_sync_spi_ error_code r/w 61 0110 0001 00000000 reserved - 62-65 - reserved out_mag_raw_x_l r 66 01100110 output external magnetometer raw data output registers out_mag_raw_x_h r 67 01100111 output out_mag_raw_y_l r 68 01101000 output out_mag_raw_y_h r 69 01101001 output out_mag_raw_z_l r 6a 01101010 output out_mag_raw_x_h r 6b 01101011 output reserved - 6c-72 - reserved x_ofs_usr r/w 73 01110011 00000000 accelerometer user offset correction y_ofs_usr r/w 74 01110100 00000000 z_ofs_usr r/w 75 01110101 00000000 reserved - 76-7f - reserved table 18. registers address map (continued) name type register address default comment hex binary
docid028475 rev 5 51/113 lsm6dsl register description 113 9 register description the device contains a set of registers which are used to control its behavior and to retrieve linear acceleration, angular rate and temperature data. the register addresses, made up of 7 bits, are used to identify them and to write the data through the serial interface. 9.1 func_cfg_access (01h) enable embedded functions register (r/w). table 20. func_cfg_access register description 9.2 sensor_sync_time_frame (04h) sensor synchronization time frame register (r/w). table 23. sensor_sync_time_frame register description table 19. func_cfg_access register func_ cfg_en 0 (1) 1. this bit must be set to ?0? for the correct operation of the device. func_ cfg_en_b 0 (1) 0 (1) 0 (1) 0 (1) 0 (1) func_cfg_ en enable access to the embedded functions configuration registers bank a and b (1) . default value: 0. refer to table 21 . 1. the embedded functions configuration registers details are available in section 10: embedded functions register mapping , section 11: embedded functions registers description - bank a , and section 12: embedded functions registers description - bank b . func_cfg_ en_b enable access to the embedded functions configuration register bank b (1) . default value: 0. refer to table 21 . table 21. configuration of embedded functions register banks func_cfg_en func_cfg_en_b status of embedded register banks 0 0 bank a and b disabled (default) 0 1 forbidden 1 0 bank a enabled 1 1 bank b enabled table 22. sensor_sync_time_frame register 0 (1) 1. this bit must be set to ?0? for the correct operation of the device. 0 (1) 0 (1) 0 (1) tph_3 tph_2 tph_1 tph_0 tph_ [3:0] sensor synchronization time frame with the step of 500 ms and full range of 5 s. unsigned 8-bit. default value: 0000 0000 (sensor sync disabled)
register description lsm6dsl 52/113 docid028475 rev 5 9.3 sensor_sync_res_ratio (05h) sensor synchronization resolution ratio (r/w) table 25. sensor_sync_res_ratio register description 9.4 fifo_ctrl1 (06h) fifo control register (r/w). table 27. fifo_ctrl1 register description table 24. sensor_sync_res_ratio register 0 (1) 1. this bit must be set to ?0? for the correct operation of the device. 0 (1) 0 (1) 0 (1) 0 (1) 0 (1) rr_1 rr_0 rr_[1:0] resolution ratio of error code for sensor synchronization: 00: sensorsync, res_ratio = 2-11 01: sensorsync, res_ratio = 2-12 10: sensorsync, res_ratio = 2-13 11: sensorsync, res_ratio = 2-14 table 26. fifo_ctrl1 register fth_7 fth_6 fth_5 fth_4 fth_3 fth_2 fth_1 fth_0 fth_[7:0] fifo threshold level setting (1) . default value: 0000 0000. watermark flag rises when the number of bytes written to fifo after the next write is greater than or equal to the threshold level. minimum resolution for the fifo is 1 lsb = 2 bytes (1 word) in fifo 1. for a complete watermark threshold configuration, consider fth_[10:8] in fifo_ctrl2 (07h) .
docid028475 rev 5 53/113 lsm6dsl register description 113 9.5 fifo_ctrl2 (07h) fifo control register (r/w). table 29. fifo_ctrl2 register description table 28. fifo_ctrl2 register timer_pedo _fifo_en timer_pedo _fifo_drdy 0 (1) 1. this bit must be set to ?0? for the correct operation of the device. 0 (1) fifo_ temp_en fth10 fth_9 fth_8 timer_pedo _fifo_en enable pedometer step counter and timestamp as 4 th fifo data set. default: 0 (0: disable step counter and timestamp data as 4 th fifo data set; 1: enable step counter and timestamp data as 4 th fifo data set) timer_pedo _fifo_drdy fifo write mode (1) . default: 0 (0: enable write in fifo based on xl/gyro data-ready; 1: enable write in fifo at every step detected by step counter.) 1. this bit is effective if the data_valid_sel_fifo bit of the master_config (1ah) register is set to 0. fifo_temp_en enable the temperature data storage in fifo. default: 0. (0: temperature not included in fifo; 1: temperature included in fifo) fth_[10:8] fifo threshold level setting (2) . default value: 0000 watermark flag rises when the number of bytes written to fifo after the next write is greater than or equal to the threshold level. minimum resolution for the fifo is 1lsb = 2 bytes (1 word) in fifo 2. for a complete watermark threshold configuration, consider fth_[7:0] in fifo_ctrl1 (06h) .
register description lsm6dsl 54/113 docid028475 rev 5 9.6 fifo_ctrl3 (08h) fifo control register (r/w). table 31. fifo_ctrl3 register description table 30. fifo_ctrl3 register 0 (1) 1. this bit must be set to ?0? for the correct operation of the device. 0 (1) dec_fifo _gyro2 dec_fifo _gyro1 dec_fifo _gyro0 dec_fifo _xl2 dec_fifo _xl1 dec_fifo _xl0 dec_fifo_gyro [2:0] gyro fifo (first data set) decimation setting. default: 000 for the configuration setting, refer to table 32 . dec_fifo_xl [2:0] accelerometer fifo (second data set) decimation setting. default: 000 for the configuration setting, refer to table 33 . table 32. gyro fifo decimation setting dec_fifo_gyro [2:0] configuration 000 gyro sensor not in fifo 001 no decimation 010 decimation with factor 2 011 decimation with factor 3 100 decimation with factor 4 101 decimation with factor 8 110 decimation with factor 16 111 decimation with factor 32 table 33. accelerometer fifo decimation setting dec_fifo_xl [2:0] configuration 000 accelerometer sensor not in fifo 001 no decimation 010 decimation with factor 2 011 decimation with factor 3 100 decimation with factor 4 101 decimation with factor 8 110 decimation with factor 16 111 decimation with factor 32
docid028475 rev 5 55/113 lsm6dsl register description 113 9.7 fifo_ctrl4 (09h) fifo control register (r/w). table 35. fifo_ctrl4 register description table 34. fifo_ctrl4 register stop_ on_ fth only_high _data dec_ds4 _fifo2 dec_ds4 _fifo1 dec_ds4 _fifo0 dec_ds3 _fifo2 dec_ds3 _fifo1 dec_ds3 _fifo0 stop_on_fth enable fifo threshold level use. default value: 0. (0: fifo depth is not limited; 1: fifo depth is limited to threshold level) only_high_data 8-bit data storage in fifo. default: 0 (0: disable msbyte only memorization in fifo for xl and gyro; 1: enable msbyte only memorization in fifo for xl and gyro in fifo) dec_ds4_fifo[2:0] fourth fifo data set decimation setting. default: 000 for the configuration setting, refer to table 36 . dec_ds3_fifo[2:0] third fifo data set decimation setting. default: 000 for the configuration setting, refer to table 37 . table 36. fourth fifo data set decimation setting dec_ds4_fifo[2:0] configuration 000 fourth fifo data set not in fifo 001 no decimation 010 decimation with factor 2 011 decimation with factor 3 100 decimation with factor 4 101 decimation with factor 8 110 decimation with factor 16 111 decimation with factor 32 table 37. third fifo data set decimation setting dec_ds3_fifo[2:0] configuration 000 third fifo data set not in fifo 001 no decimation 010 decimation with factor 2 011 decimation with factor 3 100 decimation with factor 4 101 decimation with factor 8 110 decimation with factor 16 111 decimation with factor 32
register description lsm6dsl 56/113 docid028475 rev 5 9.8 fifo_ctrl5 (0ah) fifo control register (r/w). table 39. fifo_ctrl5 register description table 38. fifo_ctrl5 register 0 (1) 1. this bit must be set to ?0? for the correct operation of the device. odr_ fifo_3 odr_ fifo_2 odr_ fifo_1 odr_ fifo_0 fifo_ mode_2 fifo_ mode_1 fifo_ mode_0 odr_fifo_[3:0] fifo odr selection, setting fifo_mode also. default: 0000 for the configuration setting, refer to table 40. fifo_mode_[2:0] fifo mode selection bits, setting odr_fifo also. default value: 000 for the configuration setting, refer to table 41. table 40. fifo odr selection odr_fifo_[3:0] configuration (1) 1. if the device is working at an odr slower than the one selected, fifo odr is limited to that odr value. moreover, these bits are effective if both the data_valid_sel_fifo bit of master_config (1ah) and the timer_pedo_fifo_drdy bit of fifo_ctrl2 (07h) are set to 0. 0000 fifo disabled 0001 fifo odr is set to 12.5 hz 0010 fifo odr is set to 26 hz 0011 fifo odr is set to 52 hz 0100 fifo odr is set to 104 hz 0101 fifo odr is set to 208 hz 0110 fifo odr is set to 416 hz 0111 fifo odr is set to 833 hz 1000 fifo odr is set to 1.66 khz 1001 fifo odr is set to 3.33 khz 1010 fifo odr is set to 6.66 khz table 41. fifo mode selection fifo_mode_[2:0] configuration mode 000 bypass mode. fifo disabled. 001 fifo mode. stops collecting data when fifo is full. 010 reserved 011 continuous mode until trigger is deasserted, then fifo mode. 100 bypass mode until trigger is deasserted, then continuous mode. 101 reserved 110 continuous mode. if the fifo is full, the new sample overwrites the older one. 111 reserved
docid028475 rev 5 57/113 lsm6dsl register description 113 9.9 drdy_pulse_cfg_g (0bh) dataready configuration register (r/w). table 42. drdy_pulse_cfg_g register table 43. drdy_pulse_cfg_g register description 9.10 int1_ctrl (0dh) int1 pad control register (r/w). each bit in this register enables a signal to be carried through int1. the pad?s output will supply the or combination of the selected signals. table 44. int1_ctrl register table 45. int1_ctrl register description drdy_ pulsed 0 (1) 1. this bit must be set to ?0? for the correct operation of the device. 0 (1) 0 (1) 0 (1) 0 (1) 0 (1) int2_ wrist_tilt drdy_pulsed enable pulsed dataready mode. default value: 0 (0: dataready latched mode. returns to 0 only after output data have been read; 1: dataready pulsed mode. the dataready pulses are 75 s long.) int2_ wrist_tilt wrist tilt interrupt on int2 pad. default value: 0 (0: disabled; 1: enabled) int1_step_ detector int1_sign _mot int1_full _flag int1_ fifo_ovr int1_ fth int1_ boot int1_ drdy_g int1_ drdy_xl int1_ step_ detector pedometer step recognition interrupt enable on int1 pad. default value: 0 (0: disabled; 1: enabled) int1_sign_mot significant motion interrupt enable on int1 pad. default value: 0 (0: disabled; 1: enabled) int1_full_flag fifo full flag interrupt enable on int1 pad. default value: 0 (0: disabled; 1: enabled) int1_fifo_ovr fifo overrun interrupt on int1 pad. default value: 0 (0: disabled; 1: enabled) int1_fth fifo threshold interrupt on int1 pad. default value: 0 (0: disabled; 1: enabled) int1_ boot boot status available on int1 pad. default value: 0 (0: disabled; 1: enabled) int1_drdy_g gyroscope data ready on int1 pad. default value: 0 (0: disabled; 1: enabled) int1_drdy_xl accelerometer data ready on int1 pad. default value: 0 (0: disabled; 1: enabled)
register description lsm6dsl 58/113 docid028475 rev 5 9.11 int2_ctrl (0eh) int2 pad control register (r/w). each bit in this register enables a signal to be carried through int2. the pad?s output will supply the or combination of the selected signals. table 46. int2_ctrl register table 47. int2_ctrl register description 9.12 who_am_i (0fh) who_am_i register (r). this register is a read-only register. its value is fixed at 6ah. int2_step _delta int2_step_ count_ov int2_ full_flag int2_ fifo_ovr int2_ fth int2_ drdy _temp int2_ drdy_g int2_ drdy_xl int2_step_delta pedometer step recognition interrupt on delta time (1) enable on int2 pad. default value: 0 (0: disabled; 1: enabled) 1. delta time value is defined in register step_count_delta (15h) . int2_step_count_ov step counter overflow interrupt enable on int2 pad. default value: 0 (0: disabled; 1: enabled) int2_ full_flag fifo full flag interrupt enable on int2 pad. default value: 0 (0: disabled; 1: enabled) int2_fifo_ovr fifo overrun interrupt on int2 pad. default value: 0 (0: disabled; 1: enabled) int2_fth fifo threshold interrupt on int2 pad. default value: 0 (0: disabled; 1: enabled) int2_drdy_temp temperature data ready in int2 pad. default value: 0 (0: disabled; 1: enabled) int2_drdy_g gyroscope data ready on int2 pad. default value: 0 (0: disabled; 1: enabled) int2_drdy_xl accelerometer data ready on int2 pad. default value: 0 (0: disabled; 1: enabled) table 48. who_am_i register 01101010
docid028475 rev 5 59/113 lsm6dsl register description 113 9.13 ctrl1_xl (10h) linear acceleration sensor control register 1 (r/w). table 49. ctrl1_xl register table 50. ctrl1_xl register description odr_xl3 odr_xl2 odr_xl1 odr_xl0 fs_xl1 fs_xl0 lpf1_bw_ sel 0 (1) 1. this bit must be set to ?0? for the correct operation of the device. odr_xl [3:0] output data rate and power mode selection . default value: 0000 (see table 51 ). fs_xl [1:0] accelerometer full-scale selection. default value: 00. (00: 2 g ; 01: 16 g ; 10: 4 g ; 11: 8 g ) lpf1_bw_sel accelerometer digital lpf (lpf1) bandwidth selection. for bandwidth selection refer to ctrl8_xl (17h) . table 51. accelerometer odr register setting odr_ xl3 odr_ xl2 odr_ xl1 odr_ xl0 odr selection [hz] when xl_hm_mode = 1 odr selection [hz] when xl_hm_mode = 0 0 0 0 0 power-down power-down 1 0 1 1 1.6 hz (low power only) 12.5 hz (high performance) 0 0 0 1 12.5 hz (low power) 12.5 hz (high performance) 0 0 1 0 26 hz (low power) 26 hz (high performance) 0 0 1 1 52 hz (low power) 52 hz (high performance) 0 1 0 0 104 hz (normal mode) 104 hz (high performance) 0 1 0 1 208 hz (normal mode) 208 hz (high performance) 0 1 1 0 416 hz (high performance) 416 hz (high performance) 0 1 1 1 833 hz (high performance) 833 hz (high performance) 1 0 0 0 1.66 khz (high performance) 1.66 khz (high performance) 1 0 0 1 3.33 khz (high performance) 3.33 khz (high performance) 1 0 1 0 6.66 khz (high performance) 6.66 khz (high performance) 1 1 x x not allowed not allowed
register description lsm6dsl 60/113 docid028475 rev 5 9.14 ctrl2_g (11h) angular rate sensor control register 2 (r/w). table 52. ctrl2_g register table 53. ctrl2_g register description odr_g3 odr_g2 odr_g1 odr_g0 fs_g1 fs_g0 fs_125 0 (1) 1. this bit must be set to ?0? for the correct operation of the device. odr_g [3:0] gyroscope output data rate selection . default value: 0000 (refer to table 54 ) fs_g [1:0] gyroscope full-scale selection. default value: 00 (00: 245 dps; 01: 500 dps; 10: 1000 dps; 11: 2000 dps) fs_125 gyroscope full-scale at 125 dps. default value: 0 (0: disabled; 1: enabled) table 54. gyroscope odr configuration setting odr_g3 odr_g2 odr_g1 odr_g0 odr [hz] when g_hm_mode = 1 odr [hz] when g_hm_mode = 0 0 0 0 0 power down power down 0 0 0 1 12.5 hz (low power) 12.5 hz (high performance) 0 0 1 0 26 hz (low power) 26 hz (high performance) 0 0 1 1 52 hz (low power) 52 hz (high performance) 0 1 0 0 104 hz (normal mode) 104 hz (high performance) 0 1 0 1 208 hz (normal mode) 208 hz (high performance) 0 1 1 0 416 hz (high performance) 416 hz (high performance) 0 1 1 1 833 hz (high performance) 833 hz (high performance) 1 0 0 0 1.66 khz (high performance) 1.66 khz (high performance) 1 0 0 1 3.33 khz (high performance 3.33 khz (high performance) 1 0 1 0 6.66 khz (high performance 6.66 khz (high performance) 1 0 1 1 not available not available
docid028475 rev 5 61/113 lsm6dsl register description 113 9.15 ctrl3_c (12h) control register 3 (r/w). table 55. ctrl3_c register boot bdu h_lactive pp_od sim if_inc ble sw_reset table 56. ctrl3_c register description boot reboot memory content. default value: 0 (0: normal mode; 1: reboot memory content) bdu block data update. default value: 0 (0: continuous update; 1: output registers not updated until msb and lsb have been read) h_lactive interrupt activation level. default value: 0 (0: interrupt output pads active high; 1: interrupt output pads active low) pp_od push-pull/open-drain selection on int1 and int2 pads. default value: 0 (0: push-pull mode; 1: open-drain mode) sim spi serial interface mode selection. default value: 0 (0: 4-wire interface; 1: 3-wire interface). if_inc register address automatically incremented during a multiple byte access with a serial interface (i 2 c or spi). default value: 1 (0: disabled; 1: enabled) ble big/little endian data selection. default value 0 (0: data lsb @ lower address; 1: data msb @ lower address) sw_reset software reset. default value: 0 (0: normal mode; 1: reset device) this bit is cleared by hardware after next flash boot.
register description lsm6dsl 62/113 docid028475 rev 5 9.16 ctrl4_c (13h) control register 4 (r/w). 9.17 ctrl5_c (14h) control register 5 (r/w). table 59. ctrl5_c register table 57. ctrl4_c register den_ xl_en sleep int2_on_ int1 den_drdy _int1 drdy_ mask i2c_disable lpf1_sel_g 0 (1) 1. this bit must be set to ?0? for the correct operation of the device. table 58. ctrl4_c register description den_xl_en extend den functionality to accelerometer sensor. default value: 0 (0: disabled; 1: enabled) sleep gyroscope sleep mode enable. default value: 0 (0: disabled; 1: enabled) den_drdy _int1 den drdy signal on int1 pad. default value: 0 (0: disabled; 1: enabled) int2_on_int1 all interrupt signals available on int1 pad enable. default value: 0 (0: interrupt signals divided between int1 and int2 pads; 1: all interrupt signals in logic or on int1 pad) drdy_mask configuration 1 data available enable bit. default value: 0 (0: da timer disabled; 1: da timer enabled) i2c_disable disable i 2 c interface. default value: 0 (0: both i 2 c and spi enabled; 1: i 2 c disabled, spi only enabled) lpf1_sel_g enable gyroscope digital lpf1. the bandwidth can be selected through ftype[1:0] in ctrl6_c (15h) . (0: disabled; 1: enabled) rounding2 rounding1 rounding0 den _lh st1_g st0_g st1_xl st0_xl table 60. ctrl5_c register description rounding[2:0] circular burst-mode (rounding) read from the output registers. default value: 000 (000: no rounding; others: refer to table 61 den_lh den active level configuration. default value: 0 (0: active low; 1: active high) st_g [1:0] angular rate sensor self-test enable. default value: 00 (00: self-test disabled; other: refer to table 62) st_xl [1:0] linear acceleration sensor self-test enable. default value: 00 (00: self-test disabled; other: refer to table 63 )
docid028475 rev 5 63/113 lsm6dsl register description 113 table 61. output registers rounding pattern rounding[2:0] rounding pattern 000 no rounding 001 accelerometer only 010 gyroscope only 011 gyroscope + accelerometer 100 registers from sensorhub1_reg (2eh) to sensorhub6_reg (33h) only 101 accelerometer + registers from sensorhub1_reg (2eh) to sensorhub6_reg (33h) 110 gyroscope + accelerometer + registers from sensorhub1_reg (2eh) to sensorhub6_reg (33h) and registers from sensorhub7_reg (34h) to sensorhub12_reg (39h) 111 gyroscope + accelerometer + registers from sensorhub1_reg (2eh) to sensorhub6_reg (33h) table 62. angular rate sensor self-test mode selection st1_g st0_g self-test mode 0 0 normal mode 0 1 positive sign self-test 1 0 not allowed 1 1 negative sign self-test table 63. linear acceleration sensor self-test mode selection st1_xl st0_xl self-test mode 0 0 normal mode 0 1 positive sign self-test 1 0 negative sign self-test 1 1 not allowed
register description lsm6dsl 64/113 docid028475 rev 5 9.18 ctrl6_c (15h) angular rate sensor control register 6 (r/w). table 64. ctrl6_c register trig_en lvl_en lvl2_en xl_hm_mode usr_ off_w 0 (1) 1. this bit must be set to ?0? for the correct operation of the device. ftype_1 ftype_0 table 65. ctrl6_c register description trig_en den data edge-sensitive trigger enable. refer to table 66 . lvl_en den data level-sensitive trigger enable. refer to table 66 . lvl2_en den level-sensitive latched enable. refer to table 66 . xl_hm_mode high-performance operating mode disable for accelerometer. default value: 0 (0: high-performance operating mode enabled; 1: high-performance operating mode disabled) usr_off_w weight of xl user offset bits of registers x_ofs_usr (73h) , y_ofs_usr (74h) , z_ofs_usr (75h) 0 = 2 -10 g /lsb 1 = 2 -6 g /lsb ftype[1:0] gyroscope's low-pass filter (lpf1) bandwidth selection table 67 shows the selectable bandwidth values. table 66. trigger mode selection trig_en, lvl1_en, lvl2_en trigger mode 100 edge-sensitive trigger mode is selected 010 level-sensitive trigger mode is selected 011 level-sensitive latched mode is selected 110 level-sensitive fifo enable mode is selected table 67. gyroscope lpf1 bandwidth selection ftype[1:0] bandwidth odr = 800 hz odr = 1.6 khz odr = 3.3 khz odr = 6.6 khz 00 245 hz 315 hz 343 hz 351 hz 01 195 hz 224 hz 234 hz 237 hz 10 155 hz 168 hz 172 hz 173 hz 11 293 hz 505 hz 925 hz 937 hz
docid028475 rev 5 65/113 lsm6dsl register description 113 9.19 ctrl7_g (16h) angular rate sensor control register 7 (r/w). 9.20 ctrl8_xl (17h) linear acceleration sensor control register 8 (r/w). table 68. ctrl7_g register g_hm_mode hp_en_g hpm1_g hpm0_g 0 (1) 1. this bit must be set to ?0? for the correct operation of the device. rounding_ status 0 (1) 0 (1) table 69. ctrl7_g register description g_hm_mode high-performance operating mode disable for gyroscope(1). default: 0 (0: high-performance operating mode enabled; 1: high-performance operating mode disabled) hp_en_g gyroscope digital high-pass filter enable. the filter is enabled only if the gyro is in hp mode. default value: 0 (0: hpf disabled; 1: hpf enabled) hpm_g[1:0] gyroscope digital hp filter cutoff selection. default: 00 (00 = 16 mhz 01 = 65 mhz 10 = 260 mhz 11 = 1.04 hz) rounding_ status source register rounding function on wake_up_src (1bh), tap_src (1ch), d6d_src (1dh), status_reg (1eh), and func_src (53h). default value: 0 (0: rounding disabled; 1: rounding enabled) table 70. ctrl8_xl register lpf2_xl_ en hpcf_ xl1 hpcf_ xl0 hp_ref _mode input_ compo site hp_slope_x l_en 0 (1) 1. this bit must be set to ?0? for the correct operation of the device. low_pass _on_6d table 71. ctrl8_xl register description lpf2_xl_en accelerometer low-pass filter lpf2 selection. refer to figure 8 . hpcf_xl[1:0] accelerometer lpf2 and high-pass filter configuration and cutoff setting. refer to table 72 . hp_ref_mode enable hp filter reference mode. default value: 0 (0: disabled; 1: enabled) input_composite composite filter input selection. default: 0 (0: odr/2 low pass filtered sent to composite filter (default) 1: odr/4 low pass filtered sent to composite filter) hp_slope_xl_en accelerometer slope filter / high-pass filter selection. refer to figure 8 . low_pass_on_6d lpf2 on 6d function selection. refer to figure 8 .
register description lsm6dsl 66/113 docid028475 rev 5 9.21 ctrl9_xl (18h) linear acceleration sensor control register 9 (r/w). table 72. accelerometer bandwidth selection hp_slope_ xl_en lpf2_xl_en lpf1_bw_sel hpcf_xl[1:0] input_ composite bandwidth 0 (low-pass path) (1) 1. the bandwidth column is related to lpf1 if lpf2_xl_en = 0 or to lpf2 if lpf2_xl_en = 1. 0 0 - - odr/2 1 - - odr/4 1- 00 1 (low noise) 0 (low latency) odr/50 01 odr/100 10 odr/9 11 odr/400 1 (high-pass path) (2) 2. the bandwidth column is related to the slope filter if hpcf_xl[1:0] = 00 or to the hp filter if hpcf_xl[1:0] = 01/10/11. -- 00 0 odr/4 01 odr/100 10 odr/9 11 odr/400 table 73. ctrl9_xl register den_x den_y den_z den_xl_g 0 (1) 1. this bit must be set to ?0? for the correct operation of the device. soft_en 0 (1) 0 (1) table 74. ctrl9_xl register description den_x den value stored in lsb of x-axis. default value: 1 (0: den not stored in x-axis lsb; 1: den stored in x-axis lsb) den_y den value stored in lsb of y-axis. default value: 1 (0: den not stored in y-axis lsb; 1: den stored in y-axis lsb) den_z den value stored in lsb of z-axis. default value: 1 (0: den not stored in z-axis lsb; 1: den stored in z-axis lsb) den_xl_g den stamping sensor selection. default value: 0 (0: den pin info stamped in the gyroscope axis selected by bits [7:5]; 1: den pin info stamped in the accelerometer axis selected by bits [7:5]) soft_en enable soft-iron correction algorithm for magnetometer (1) . default value: 0 (0: soft-iron correction algorithm disabled; 1: soft-iron correction algorithm enabled) 1. this bit is effective if the iron_en bit of master_config (1ah) and the func_en bit of ctrl10_c (19h) are set to 1.
docid028475 rev 5 67/113 lsm6dsl register description 113 9.22 ctrl10_c (19h) control register 10 (r/w). 9.23 master_config (1ah) master configuration register (r/w). table 75. ctrl10_c register wrist_ tilt_en 0 (1) 1. this bit must be set to ?0? for the correct operation of the device. timer_ en pedo_ en tilt_ en func_en pedo_rst _step sign_ motion_en table 76. ctrl10_c register description wrist_tilt_en enable wrist tilt algorithm (1)(2) . default value: 0 (0: wrist tilt algorithm disabled; 1: wrist tilt algorithm enabled) 1. this is effective if the func_en bit is set to '1'. 2. by default, the wrist tilt algorithm is applied to the positive x-axis. timer_en enable timestamp count. the count is saved in timestamp0_reg (40h) , timestamp1_reg (41h) and timestamp2_reg (42h) . default: 0 (0: timestamp count disabled; 1: timestamp count enabled) pedo_en enable pedometer algorithm (1) . default value: 0 (0: pedometer algorithm disabled; 1: pedometer algorithm enabled) tilt_en enable tilt calculation (1) . func_en enable embedded functionalities (pedometer, tilt, significant motion detection, sensor hub and ironing). default value: 0 (0: disable functionalities of embedded functions and accelerometer filters; 1: enable functionalities of embedded functions and accelerometer filters) pedo_rst_ step reset pedometer step counter. default value: 0 (0: disabled; 1: enabled) sign_motion_en enable significant motion detection function (1) . default value: 0 (0: disabled; 1: enabled) table 77. master_config register drdy_on _int1 data_valid _sel_fifo 0 (1) 1. this bit must be set to ?0? for the correct operation of the device. start_ config pull_up _en pass_ through _mode iron_en master_ on
register description lsm6dsl 68/113 docid028475 rev 5 9.24 wake_up_src (1bh) wake up interrupt source register (r). table 78. master_config register description drdy_on_ int1 manage the master drdy signal on int1 pad. default: 0 (0: disable master drdy on int1; 1: enable master drdy on int1) data_valid_ sel_fifo selection of fifo data-valid signal. default value: 0 (0: data-valid signal used to write data in fifo is the xl/gyro data-ready or step detection (1) ; 1: data-valid signal used to write data in fifo is the sensor hub data-ready) 1. if the timer_pedo_fifo_drdy bit in fifo_ctrl2 (07h) is set to 0, the trigger for writing data in fifo is xl/gyro data-ready, otherwise it's the step detection. start_ config sensor hub trigger signal selection. default value: 0 (0: sensor hub signal is the xl/gyro data-ready; 1: sensor hub signal external from int2 pad.) pull_up_en auxiliary i 2 c pull-up. default value: 0 (0: internal pull-up on auxiliary i 2 c line disabled; 1: internal pull-up on auxiliary i 2 c line enabled) pass_through _mode i 2 c interface pass-through. default value: 0 (0: pass-through disabled; 1: pass-through enabled) iron_en enable hard-iron correction algorithm for magnetometer (2) . default value: 0 (0:hard-iron correction algorithm disabled; 1: hard-iron correction algorithm enabled) 2. this is effective if the func_en bit is set to '1'. master_on sensor hub i 2 c master enable (2) . default: 0 (0: master i 2 c of sensor hub disabled; 1: master i 2 c of sensor hub enabled) table 79. wake_up_src register 0 0 ff_ia sleep_ state_ia wu_ia x_wu y_wu z_wu table 80. wake_up_src register description ff_ia free-fall event detection status. default: 0 (0: free-fall event not detected; 1: free-fall event detected) sleep_ state_ia sleep event status. default value: 0 (0: sleep event not detected; 1: sleep event detected) wu_ia wakeup event detection status. default value: 0 (0: wakeup event not detected; 1: wakeup event detected.) x_wu wakeup event detection status on x-axis. default value: 0 (0: wakeup event on x-axis not detected; 1: wakeup event on x-axis detected) y_wu wakeup event detection status on y-axis. default value: 0 (0: wakeup event on y-axis not detected; 1: wakeup event on y-axis detected) z_wu wakeup event detection status on z-axis. default value: 0 (0: wakeup event on z-axis not detected; 1: wakeup event on z-axis detected)
docid028475 rev 5 69/113 lsm6dsl register description 113 9.25 tap_src (1ch) tap source register (r). table 81. tap_src register 0 tap_ia single_ tap double_ tap tap_sign x_tap y_tap z_tap table 82. tap_src register description tap_ia tap event detection status. default: 0 (0: tap event not detected; 1: tap event detected) single_tap single-tap event status. default value: 0 (0: single tap event not detected; 1: single tap event detected) double_tap double-tap event detection status. default value: 0 (0: double-tap event not detected; 1: double-tap event detected.) tap_sign sign of acceleration detected by tap event. default: 0 (0: positive sign of acceleration detected by tap event; 1: negative sign of acceleration detected by tap event) x_tap tap event detection status on x-axis. default value: 0 (0: tap event on x-axis not detected; 1: tap event on x-axis detected) y_tap tap event detection status on y-axis. default value: 0 (0: tap event on y-axis not detected; 1: tap event on y-axis detected) z_tap tap event detection status on z-axis. default value: 0 (0: tap event on z-axis not detected; 1: tap event on z-axis detected)
register description lsm6dsl 70/113 docid028475 rev 5 9.26 d6d_src (1dh) portrait, landscape, face-up and face-down source register (r) 9.27 status_reg (1eh) the status_reg register is read by the spi/i 2 c interface (r). table 83. d6d_src register den_ drdy d6d_ia zh zl yh yl xh xl table 84. d6d_src register description den_ drdy den data-ready signal. it is set high when data output is related to the data coming from a den active condition. (1) 1. the den data-ready signal can be latched or pulsed depending on the value of the dataready_pulsed bit of the drdy_pulse_cfg_g (0bh) register. d6d_ ia interrupt active for change position portrait, landscape, face-up, face-down. default value: 0 (0: change position not detected; 1: change position detected) zh z-axis high event (over threshold). default value: 0 (0: event not detected; 1: event (over threshold) detected) zl z-axis low event (under threshold). default value: 0 (0: event not detected; 1: event (under threshold) detected) yh y-axis high event (over threshold). default value: 0 (0: event not detected; 1: event (over-threshold) detected) yl y-axis low event (under threshold). default value: 0 (0: event not detected; 1: event (under threshold) detected) xh x-axis high event (over threshold). default value: 0 (0: event not detected; 1: event (over threshold) detected) xl x-axis low event (under threshold). default value: 0 (0: event not detected; 1: event (under threshold) detected) table 85. status_reg register 0 0 0 0 0 tda gda xlda table 86. status_reg register description tda temperature new data available. default: 0 (0: no set of data is available at temperature sensor output; 1: a new set of data is available at temperature sensor output) gda gyroscope new data available. default value: 0 (0: no set of data available at gyroscope output; 1: a new set of data is available at gyroscope output) xlda accelerometer new data available. default value: 0 (0: no set of data available at accelerometer output; 1: a new set of data is available at accelerometer output)
docid028475 rev 5 71/113 lsm6dsl register description 113 9.28 out_temp_l (20h), out_temp_h (21h) temperature data output register (r). l and h registers together express a 16-bit word in two?s complement. 9.29 outx_l_g (22h) angular rate sensor pitch axis (x) angular rate output register (r). the value is expressed as a 16-bit word in two?s complement. data are according to the full scale and odr settings ( ctrl2_g (11h) ) of the gyro user interface. 9.30 outx_h_g (23h) angular rate sensor pitch axis (x) angular rate output register (r). the value is expressed as a 16-bit word in two?s complement. data are according to the full scale and odr settings ( ctrl2_g (11h) ) of the gyro user interface. table 87. out_temp_l register temp7 temp6 temp5 temp4 temp3 temp2 temp1 temp0 table 88. out_temp_h register temp15 temp14 temp13 temp12 temp11 temp10 temp9 temp8 table 89. out_temp register description temp[15:0] temperature sensor output data the value is expressed as two?s complement sign extended on the msb. table 90. outx_l_g register d7 d6 d5 d4 d3 d2 d1 d0 table 91. outx_l_g register description d[7:0] pitch axis (x) angular rate value (lsbyte) d[15:0] expressed in two?s complement and its value depends on the interface used: spi1/i 2 c: gyro ui chain pitch axis output table 92. outx_h_g register d15 d14 d13 d12 d11 d10 d9 d8 table 93. outx_h_g register description d[15:8] pitch axis (x) angular rate value (msbyte) d[15:0] expressed in two?s complement and its value depends on the interface used: spi1/i 2 c: gyro ui chain pitch axis output
register description lsm6dsl 72/113 docid028475 rev 5 9.31 outy_l_g (24h) angular rate sensor roll axis (y) angular rate output register (r). the value is expressed as a 16-bit word in two?s complement. data are according to the full scale and odr settings ( ctrl2_g (11h) ) of the gyro user interface. 9.32 outy_h_g (25h) angular rate sensor roll axis (y) angular rate output register (r). the value is expressed as a 16-bit word in two?s complement. data are according to the full scale and odr settings ( ctrl2_g (11h) ) of the gyro user interface. 9.33 outz_l_g (26h) angular rate sensor yaw axis (z) angular rate output register (r). the value is expressed as a 16-bit word in two?s complement. data are according to the full scale and odr settings ( ctrl2_g (11h) ) of the gyro user interface. table 94. outy_l_g register d7 d6 d5 d4 d3 d2 d1 d0 table 95. outy_l_g register description d[7:0] roll axis (y) angular rate value (lsbyte) d[15:0] expressed in two?s complement and its value depends on the interface used: spi1/i 2 c: gyro ui chain roll axis output table 96. outy_h_g register d15 d14 d13 d12 d11 d10 d9 d8 table 97. outy_h_g register description d[15:8] roll axis (y) angular rate value (msbyte) d[15:0] expressed in two?s complement and its value depends on the interface used: spi1/i 2 c: gyro ui chain roll axis output table 98. outz_l_g register d7 d6 d5 d4 d3 d2 d1 d0 table 99. outz_l_g register description d[7:0] yaw axis (z) angular rate value (lsbyte) d[15:0] expressed in two?s complement and its value depends on the interface used: spi1/i 2 c: gyro ui chain yaw axis output
docid028475 rev 5 73/113 lsm6dsl register description 113 9.34 outz_h_g (27h) angular rate sensor yaw axis (z) angular rate output register (r). the value is expressed as a 16-bit word in two?s complement. data are according to the full scale and odr settings ( ctrl2_g (11h) ) of the gyro user interface. 9.35 outx_l_xl (28h) linear acceleration sensor x-axis output register (r). the value is expressed as a 16-bit word in two?s complement. 9.36 outx_h_xl (29h) linear acceleration sensor x-axis output register (r). the value is expressed as a 16-bit word in two?s complement. 9.37 outy_l_xl (2ah) linear acceleration sensor y-axis output register (r). the value is expressed as a 16-bit word in two?s complement. table 100. outz_h_g register d15 d14 d13 d12 d11 d10 d9 d8 table 101. outz_h_g register description d[15:8] yaw axis (z) angular rate value (msbyte) d[15:0] expressed in two?s complement and its value depends on the interface used: spi1/i 2 c: gyro ui chain yaw axis output table 102. outx_l_xl register d7 d6 d5 d4 d3 d2 d1 d0 table 103. outx_l_xl register description d[7:0] x-axis linear acceleration value (lsbyte) table 104. outx_h_xl register d15 d14 d13 d12 d11 d10 d9 d8 table 105. outx_h_xl register description d[15:8] x-axis linear acceleration value (msbyte) table 106. outy_l_xl register d7 d6 d5 d4 d3 d2 d1 d0 table 107. outy_l_xl register description d[7:0] y-axis linear acceleration value (lsbyte)
register description lsm6dsl 74/113 docid028475 rev 5 9.38 outy_h_xl (2bh) linear acceleration sensor y-axis output register (r). the value is expressed as a 16-bit word in two?s complement. 9.39 outz_l_xl (2ch) linear acceleration sensor z-axis output register (r). the value is expressed as a 16-bit word in two?s complement. 9.40 outz_h_xl (2dh) linear acceleration sensor z-axis output register (r). the value is expressed as a 16-bit word in two?s complement. 9.41 sensorhub1_reg (2eh) first byte associated to external sensors. the content of the register is consistent with the slavex_config number of read operation configurations (for external sensors from x = 0 to x = 3). table 108. outy_h_g register d15 d14 d13 d12 d11 d10 d9 d8 table 109. outy_h_g register description d[15:8] y-axis linear acceleration value (msbyte) table 110. outz_l_xl register d7 d6 d5 d4 d3 d2 d1 d0 table 111. outz_l_xl register description d[7:0] z-axis linear acceleration value (lsbyte) table 112. outz_h_xl register d15 d14 d13 d12 d11 d10 d9 d8 table 113. outz_h_xl register description d[15:8] z-axis linear acceleration value (msbyte) table 114. sensorhub1_reg register shub1_7 shub1_6 shub1_5 shub1_4 shub1_3 shub1_2 shub1_1 shub1_0 table 115. sensorhub1_reg register description shub1_[7:0] first byte associated to external sensors
docid028475 rev 5 75/113 lsm6dsl register description 113 9.42 sensorhub2_reg (2fh) second byte associated to external sensors. the content of the register is consistent with the slavex_config number of read operations configurations (for external sensors from x = 0 to x = 3). 9.43 sensorhub3_reg (30h) third byte associated to external sensors. the content of the register is consistent with the slavex_config number of read operations configurations (for external sensors from x = 0 to x = 3). 9.44 sensorhub4_reg (31h) fourth byte associated to external sensors. the content of the register is consistent with the slavex_config number of read operation configurations (for external sensors from x = 0 to x = 3). 9.45 sensorhub5_reg (32h) fifth byte associated to external sensors. the content of the register is consistent with the slavex_config number of read operation configurations (for external sensors from x = 0 to x = 3). table 116. sensorhub2_reg register shub2_7 shub2_6 shub2_5 shub2_4 shub2_3 shub2_2 shub2_1 shub2_0 table 117. sensorhub2_reg register description shub2_[7:0] second byte associated to external sensors table 118. sensorhub3_reg register shub3_7 shub3_6 shub3_5 shub3_4 shub3_3 shub3_2 shub3_1 shub3_0 table 119. sensorhub3_reg register description shub3_[7:0] third byte associated to external sensors table 120. sensorhub4_reg register shub4_7 shub4_6 shub4_5 shub4_4 shub4_3 shub4_2 shub4_1 shub4_0 table 121. sensorhub4_reg register description shub4_[7:0] fourth byte associated to external sensors table 122. sensorhub5_reg register shub5_7 shub5_6 shub5_5 shub5_4 shub5_3 shub5_2 shub5_1 shub5_0 table 123. sensorhub5_reg register description shub5_[7:0] fifth byte associated to external sensors
register description lsm6dsl 76/113 docid028475 rev 5 9.46 sensorhub6_reg (33h) sixth byte associated to external sensors. the content of the register is consistent with the slavex_config number of read operation configurations (for external sensors from x = 0 to x = 3). 9.47 sensorhub7_reg (34h) seventh byte associated to external sensors. the content of the register is consistent with the slavex_config number of read operation configurations (for external sensors from x = 0 to x = 3). 9.48 sensorhub8_reg(35h) eighth byte associated to external sensors. the content of the register is consistent with the slavex_config number of read operation configurations (for external sensors from x = 0 to x = 3). 9.49 sensorhub9_reg (36h) ninth byte associated to external sensors. the content of the register is consistent with the slavex_config number of read operation configurations (for external sensors from x = 0 to x = 3). table 124. sensorhub6_reg register shub6_7 shub6_6 shub6_5 shub6_4 shub6_3 shub6_2 shub6_1 shub6_0 table 125. sensorhub6_reg register description shub6_[7:0] sixth byte associated to external sensors table 126. sensorhub7_reg register shub7_7 shub7_6 shub7_5 shub7_4 shub7_3 shub7_2 shub7_1 shub7_0 table 127. sensorhub7_reg register description shub7_[7:0] seventh byte associated to external sensors table 128. sensorhub8_reg register shub8_7 shub8_6 shub8_5 shub8_4 shub8_3 shub8_2 shub8_1 shub8_0 table 129. sensorhub8_reg register description shub8_[7:0] eighth byte associated to external sensors table 130. sensorhub9_reg register shub9_7 shub9_6 shub9_5 shub9_4 shub9_3 shub9_2 shub9_1 shub9_0 table 131. sensorhub9_reg register description shub9_[7:0] ninth byte associated to external sensors
docid028475 rev 5 77/113 lsm6dsl register description 113 9.50 sensorhub10_reg (37h) tenth byte associated to external sensors. the content of the register is consistent with the slavex_config number of read operation configurations (for external sensors from x = 0 to x = 3). 9.51 sensorhub11_reg (38h) eleventh byte associated to external sensors. the content of the register is consistent with the slavex_config number of read operation configurations (for external sensors from x = 0 to x = 3). 9.52 sensorhub12_reg (39h) twelfth byte associated to external sensors. the content of the register is consistent with the slavex_config number of read operation configurations (for external sensors from x = 0 to x = 3). 9.53 fifo_status1 (3ah) fifo status control register (r). for a proper reading of the register, it is recommended to set the bdu bit in ctrl3_c (12h) to 1. table 138. fifo_status1 register table 139. fifo_status1 register description table 132. sensorhub10_reg register shub10_7 shub10_6 shub10_5 shub10_4 shub10_3 shub10_2 shub10_1 shub10_0 table 133. sensorhub10_reg register description shub10_[7:0] tenth byte associated to external sensors table 134. sensorhub11_reg register shub11_7 shub11_6 shub11_5 shub11_4 shub11_3 shub11_2 shub11_1 shub11_0 table 135. sensorhub11_reg register description shub11_[7:0] eleventh byte associated to external sensors table 136. sensorhub12_reg register shub12_7 shub12_6 shub12_5 shub12_4 shub12_3 shub12_2 shub12_1 shub12_0 table 137. sensorhub12_reg register description shub12[7:0] twelfth byte associated to external sensors diff_ fifo_7 diff_ fifo_6 diff_ fifo_5 diff_ fifo_4 diff_ fifo_3 diff_ fifo_2 diff_ fifo_1 diff_ fifo_0 diff_fifo_[7:0] number of unread words (16-bit axes) stored in fifo (1) . 1. for a complete number of unread samples, consider diff_fifo [10:8] in fifo_status2 (3bh) .
register description lsm6dsl 78/113 docid028475 rev 5 9.54 fifo_status2 (3bh) fifo status control register (r). for a proper reading of the register, it is recommended to set the bdu bit in ctrl3_c (12h) to 1. table 140. fifo_status2 register table 141. fifo_status2 register description 9.55 fifo_status3 (3ch) fifo status control register (r). for a proper reading of the register, it is recommended to set the bdu bit in ctrl3_c (12h) to 1. table 142. fifo_status3 register table 143. fifo_status3 register description waterm over_run fifo_ full_ smart fifo_ empty 0 diff_ fifo_10 diff_ fifo_9 diff_ fifo_8 waterm fifo watermark status. the watermark is set through bits fth_[7:0] in fifo_ctrl1 (06h) . default value: 0 (0: fifo filling is lower than watermark level (1) ; 1: fifo filling is equal to or higher than the watermark level) 1. fifo watermark level is set in fth_[11:0] in fifo_ctrl1 (06h) and fifo_ctrl2 (07h) . over_run fifo overrun status. default value: 0 (0: fifo is not completely filled; 1: fifo is completely filled) fifo_full_ smart smart fifo full status. default value: 0 (0: fifo is not full; 1: fifo will be full at the next odr) fifo_empty fifo empty bit. default value: 0 (0: fifo contains data; 1: fifo is empty) diff_fifo_[10:8] number of unread words (16-bit axes) stored in fifo (2) . 2. for a complete number of unread samples, consider diff_fifo [7:0] in fifo_status1 (3ah) . fifo_ pattern _7 fifo_ pattern _6 fifo_ pattern _5 fifo_ pattern _4 fifo_ pattern _3 fifo_ pattern _2 fifo_ pattern _1 fifo_ pattern _0 fifo_ pattern_[7:0] word of recursive pattern read at the next reading.
docid028475 rev 5 79/113 lsm6dsl register description 113 9.56 fifo_status4 (3dh) fifo status control register (r). for a proper reading of the register, it is recommended to set the bdu bit in ctrl3_c (12h) to 1. table 144. fifo_status4 register table 145. fifo_status4 register description 9.57 fifo_data_out_l (3eh) fifo data output register (r). for a proper reading of the register, it is recommended to set the bdu bit in ctrl3_c (12h) to 1. 9.58 fifo_data_out_h (3fh) fifo data output register (r). for a proper reading of the register, it is recommended to set the bdu bit in ctrl3_c (12h) to 1. 000000 fifo_ pattern_9 fifo_ pattern_8 fifo_ pattern_[9:8] word of recursive pattern read at the next reading. table 146. fifo_data_out_l register data_ out_ fifo_l_7 data_ out_ fifo_l_6 data_ out_ fifo_l_5 data_ out_ fifo_l_4 data_ out_ fifo_l_3 data_ out_ fifo_l_2 data_ out_ fifo_l_1 data_ out_ fifo_l_0 table 147. fifo_data_out_l register description data_out_fifo_l_[7:0] fifo data output (first byte) table 148. fifo_data_out_h register data_ out_ fifo_h_7 data_ out_ fifo_h_6 data_ out_ fifo_h_5 data_ out_ fifo_h_4 data_ out_ fifo_h_3 data_ out_ fifo_h_2 data_ out_ fifo_h_1 data_ out_ fifo_h_0 table 149. fifo_data_out_h register description data_out_fifo_h_[7:0] fifo data output (second byte)
register description lsm6dsl 80/113 docid028475 rev 5 9.59 timestamp0_reg (40h) timestamp first byte data output register (r). the value is expressed as a 24-bit word and the bit resolution is defined by setting the value in wake_up_dur (5ch) . 9.60 timestamp1_reg (41h) timestamp second byte data output register (r). the value is expressed as a 24-bit word and the bit resolution is defined by setting value in wake_up_dur (5ch) . 9.61 timestamp2_reg (42h) timestamp third byte data output register (r/w). the value is expressed as a 24-bit word and the bit resolution is defined by setting the value in wake_up_dur (5ch) . to reset the timer, the aah value has to be stored in this register. table 150. timestamp0_reg register timesta mp0_7 timesta mp0_6 timesta mp0_5 timesta mp0_4 timesta mp0_3 timesta mp0_2 timesta mp0_1 timesta mp0_0 table 151. timestamp0_reg register description timestamp0_[7:0] timestamp first byte data output table 152. timestamp1_reg register timesta mp1_7 timesta mp1_6 timesta mp1_5 timesta mp1_4 timesta mp1_3 timesta mp1_2 timesta mp1_1 timesta mp1_0 table 153. timestamp1_reg register description timestamp1_[7:0] timestamp second byte data output table 154. timestamp2_reg register timesta mp2_7 timesta mp2_6 timesta mp2_5 timesta mp2_4 timesta mp2_3 timesta mp2_2 timesta mp2_1 timesta mp2_0 table 155. timestamp2_reg register description timestamp2_[7:0] timestamp third byte data output
docid028475 rev 5 81/113 lsm6dsl register description 113 9.62 step_timestamp_l (49h) step counter timestamp information register (r). when a step is detected, the value of timestamp_reg1 register is copied in step_timestamp_l. 9.63 step_timestamp_h (4ah) step counter timestamp information register (r). when a step is detected, the value of timestamp_reg2 register is copied in step_timestamp_h. 9.64 step_counter_l (4bh) step counter output register (r). table 156. step_timestamp_l register step_ timesta mp_l_7 step_ timesta mp_l_6 step_ timesta mp_l_5 step_ timesta mp_l_4 step_ timesta mp_l_3 step_ timesta mp_l_2 step_ timesta mp_l_1 step_ timesta mp_l_0 table 157. step_timestamp_l register description step_timestamp_l[7:0] timestamp of last step detected. table 158. step_timestamp_h register step_ timesta mp_h_7 step_ timesta mp_h_6 step_ timesta mp_h_5 step_ timesta mp_h_4 step_ timesta mp_h_3 step_ timesta mp_h_2 step_ timesta mp_h_1 step_ timesta mp_h_0 table 159. step_timestamp_h register description step_timestamp_h[7:0] timestamp of last step detected. table 160. step_counter_l register step_co unter_l _7 step_co unter_l _6 step_co unter_l _5 step_co unter_l _4 step_co unter_l _3 step_co unter_l _2 step_co unter_l _1 step_co unter_l _0 table 161. step_counter_l register description step_counter_l_[7:0] step counter output (lsbyte)
register description lsm6dsl 82/113 docid028475 rev 5 9.65 step_counter_h (4ch) step counter output register (r). 9.66 sensorhub13_reg (4dh) thirteenth byte associated to external sensors. the content of the register is consistent with the slavex_config number of read operation configurations (for external sensors from x = 0 to x = 3). 9.67 sensorhub14_reg (4eh) fourteenth byte associated to external sensors. the content of the register is consistent with the slavex_config number of read operation configurations (for external sensors from x = 0 to x = 3). 9.68 sensorhub15_reg (4fh) fifteenth byte associated to external sensors. the content of the register is consistent with the slavex_config number of read operation configurations (for external sensors from x = 0 to x = 3). table 162. step_counter_h register step_co unter_h _7 step_co unter_h _6 step_co unter_h _5 step_co unter_h _4 step_co unter_h _3 step_co unter_h _2 step_co unter_h _1 step_co unter_h _0 table 163. step_counter_h register description step_counter_h_[7:0] step counter output (msbyte) table 164. sensorhub13_reg register shub13_7 shub13_6 shub13_5 shub13_4 shub13_3 shub13_2 shub13_1 shub13_0 table 165. sensorhub13_reg register description shub13_[7:0] thirteenth byte associated to external sensors table 166. sensorhub14_reg register shub14_7 shub14_6 shub14_5 shub14_4 shub14_3 shub14_2 shub14_1 shub14_0 table 167. sensorhub14_reg register description shub14_[7:0] fourteenth byte associated to external sensors table 168. sensorhub15_reg register shub15_7 shub15_6 shub15_5 shub15_4 shub15_3 shub15_2 shub15_1 shub15_0 table 169. sensorhub15_reg register description shub15_[7:0] fifteenth byte associated to external sensors
docid028475 rev 5 83/113 lsm6dsl register description 113 9.69 sensorhub16_reg (50h) sixteenth byte associated to external sensors. the content of the register is consistent with the slavex_config number of read operation configurations (for external sensors from x = 0 to x = 3). 9.70 sensorhub17_reg (51h) seventeenth byte associated to external sensors. the content of the register is consistent with the slavex_config number of read operation configurations (for external sensors from x = 0 to x = 3). 9.71 sensorhub18_reg (52h) eighteenth byte associated to external sensors. the content of the register is consistent with the slavex_config number of read operation configurations (for external sensors from x = 0 to x = 3). table 170. sensorhub16_reg register shub16_7 shub16_6 shub16_5 shub16_4 shub16_3 shub16_2 shub16_1 shub16_0 table 171. sensorhub16_reg register description shub16_[7:0] sixteenth byte associated to external sensors table 172. sensorhub17_reg register shub17_7 shub17_6 shub17_5 shub17_4 shub17_3 shub17_2 shub17_1 shub17_0 table 173. sensorhub17_reg register description shub17_[7:0] seventeenth byte associated to external sensors table 174. sensorhub18_reg register shub18_7 shub18_6 shub18_5 shub18_4 shub18_3 shub18_2 shub18_1 shub18_0 table 175. sensorhub18_reg register description shub18_[7:0] eighteenth byte associated to external sensors
register description lsm6dsl 84/113 docid028475 rev 5 9.72 func_src1 (53h) significant motion, tilt, step detector, hard/soft-iron and sensor hub interrupt source register (r). 9.73 func_src2 (54h) wrist tilt interrupt source register (r). table 176. func_src1 register step_ count _delta _ia sign_ motion_ia tilt_ia step_ detected step_ overflow hi_ fail si_end_ op sensor hub_ end_op table 177. func_src1 register description step_count _delta_ia pedometer step recognition on delta time status. default value: 0 (0: no step recognized during delta time; 1: at least one step recognized during delta time) sign_ motion_ia significant motion event detection status. default value: 0 (0: significant motion event not detected; 1: significant motion event detected) tilt_ia tilt event detection status. default value: 0 (0: tilt event not detected; 1: tilt event detected) step_ detected step detector event detection status. default value: 0 (0: step detector event not detected; 1: step detector event detected) step_ overflow step counter overflow status. default value: 0 (0: step counter value < 2 16 ; 1: step counter value reached 2 16 ) hi_fail fail in hard/soft-ironing algorithm. si_end_op hard/soft-iron calculation status. default value: 0 (0: hard/soft-iron calculation not concluded; 1: hard/soft-iron calculation concluded) sensorhub _end_op sensor hub communication status. default value: 0 (0: sensor hub communication not concluded; 1: sensor hub communication concluded) table 178. func_src2 register 0 slave3_ nack slave2_ nack slave1_ nack slave0_ nack 00 wrist_ tilt_ia table 179. func_src2 register description slave3_nack this bit is set to 1 if not acknowledge occurs on slave 3 communication. default value: 0 slave2_nack this bit is set to 1 if not acknowledge occurs on slave 2 communication. default value: 0 slave1_nack this bit is set to 1 if not acknowledge occurs on slave 1 communication. default value: 0 slave0_nack this bit is set to 1 if not acknowledge occurs on slave 0 communication. default value: 0 wrist_tilt_ia wrist tilt event detection status. default value: 0 (0: wrist tilt event not detected; 1: wrist tilt event detected)
docid028475 rev 5 85/113 lsm6dsl register description 113 9.74 wrist_tilt_ia (55h) wrist tilt interrupt source register (r). table 180. wrist_tilt_ia register wrist_ tilt_ia_ xpos wrist_ tilt_ia_ xneg wrist_ tilt_ia_ ypos wrist_ tilt_ia_ yneg wrist_ tilt_ia_ zpos wrist_ tilt_ia_ zneg 00 table 181. wrist_tilt_ia register description wrist_ tilt_ia_ xpos absolute wrist tilt event detection status on x-positive axis. default value: 0 (0: absolute wrist tilt event on x-positive axis not detected; 1: absolute wrist tilt event on x-positive axis detected) wrist_ tilt_ia_ xneg absolute wrist tilt event detection status on x-negative axis. default value: 0 (0: absolute wrist tilt event on x-negative axis not detected; 1: absolute wrist tilt event on x-negative axis detected) wrist_ tilt_ia_ ypos absolute wrist tilt event detection status on y-positive axis. default value: 0 (0: absolute wrist tilt event on y-positive axis not detected; 1: absolute wrist tilt event on y-positive axis detected) wrist_ tilt_ia_ yneg absolute wrist tilt event detection status on y-negative axis. default value: 0 (0: absolute wrist tilt event on y-negative axis not detected; 1: absolute wrist tilt event on y-negative axis detected) wrist_ tilt_ia_ zpos absolute wrist tilt event detection status on z-positive axis. default value: 0 (0: absolute wrist tilt event on z-positive axis not detected; 1: absolute wrist tilt event on z-positive axis detected) wrist_ tilt_ia_ zneg absolute wrist tilt event detection status on z-negative axis. default value: 0 (0: absolute wrist tilt event on z-negative axis not detected; 1: absolute wrist tilt event on z-negative axis detected)
register description lsm6dsl 86/113 docid028475 rev 5 9.75 tap_cfg (58h) enables interrupt and inactivity functions, configuration of filtering and tap recognition functions (r/w). table 182. tap_cfg register interrupts _enable inact_en1 inact_en0 slope _fds tap_x_en tap_y_en tap_z_en lir table 183. tap_cfg register description interrupts _enable enable basic interrupts (6d/4d, free-fall, wake-up, tap, inactivity). default 0. (0: interrupt disabled; 1: interrupt enabled) inact_en[1:0] enable inactivity function. default value: 00 (00: disabled 01: sets accelerometer odr to 12.5 hz (low-power mode), gyro does not change; 10: sets accelerometer odr to 12.5 hz (low-power mode), gyro to sleep mode; 11: sets accelerometer odr to 12.5 hz (low-power mode), gyro to power-down mode) slope_fds hpf or slope filter selection on wake-up and activity/inactivity functions. refer to figure 8 . default value: 0 (0: slope filter applied; 1: hpf applied) tap_x_en enable x direction in tap recognition. default value: 0 (0: x direction disabled; 1: x direction enabled) tap_y_en enable y direction in tap recognition. default value: 0 (0: y direction disabled; 1: y direction enabled) tap_z_en enable z direction in tap recognition. default value: 0 (0: z direction disabled; 1: z direction enabled) lir latched interrupt. default value: 0 (0: interrupt request not latched; 1: interrupt request latched)
docid028475 rev 5 87/113 lsm6dsl register description 113 9.76 tap_ths_6d (59h) portrait/landscape position and tap function threshold register (r/w). 9.77 int_dur2 (5ah) tap recognition function setting register (r/w). table 184. tap_ths_6d register d4d_en sixd_ths 1 sixd_ths 0 tap_ths 4 tap_ths 3 tap_ths 2 tap_ths 1 tap_ths 0 table 185. tap_ths_6d register description d4d_en 4d orientation detection enable. z-axis position detection is disabled. default value: 0 (0: enabled; 1: disabled) sixd_ths[1:0] threshold for 4d/6d function. default value: 00 for details, refer to table 186 . tap_ths[4:0] threshold for tap recognition. default value: 00000 1 lsb corresponds to fs_xl/2 5 table 186. threshold for d4d/d6d function sixd_ths[1:0] threshold value 00 80 degrees 01 70 degrees 10 60 degrees 11 50 degrees table 187. int_dur2 register dur3 dur2 dur1 dur0 quiet1 quiet0 shock1 shock0 table 188. int_dur2 register description dur[3:0] duration of maximum time gap for double tap recognition. default: 0000 when double tap recognition is enabled, this register expresses the maximum time between two consecutive detected taps to determine a double tap event. the default value of these bits is 0000b which corresponds to 16*odr_xl time. if the dur[3:0] bits are set to a different value, 1lsb corresponds to 32*odr_xl time. quiet[1:0] expected quiet time after a tap detection. default value: 00 quiet time is the time after the first detected tap in which there must not be any overthreshold event. the default value of these bits is 00b which corresponds to 2*odr_xl time. if the quiet[1:0] bits are set to a different value, 1lsb corresponds to 4*odr_xl time. shock[1:0] maximum duration of overthreshold event. default value: 00 maximum duration is the maximum time of an overthreshold signal detection to be recognized as a tap event. the default value of these bits is 00b which corresponds to 4*odr_xl time. if the shock[1:0] bits are set to a different value, 1lsb corresponds to 8*odr_xl time.
register description lsm6dsl 88/113 docid028475 rev 5 9.78 wake_up_ths (5bh) single and double-tap function threshold register (r/w). 9.79 wake_up_dur (5ch) free-fall, wakeup, timestamp and sleep mode functions duration setting register (r/w). table 189. wake_up_ths register single_ double _tap 0 wk_ths5 wk_ths4 wk_ths3 wk_ths2 wk_ths1 wk_ths0 table 190. wake_up_ths register description single_double_tap single/double-tap event enable. default: 0 (0: only single-tap event enabled; 1: both single and double-tap events enabled) wk_ths[5:0] threshold for wakeup. default value: 000000 1 lsb corresponds to fs_xl/2 6 table 191. wake_up_dur register ff_dur5 wake_ dur1 wake_ dur0 timer_ hr sleep_ dur3 sleep_ dur2 sleep_ dur1 sleep_ dur0 table 192. wake_up_dur register description ff_dur5 free fall duration event. default: 0 for the complete configuration of the free-fall duration, refer to ff_dur[4:0] in free_fall (5dh) configuration. 1 lsb = 1 odr_time wake_dur[1:0] wake up duration event. default: 00 1lsb = 1 odr_time timer_hr timestamp register resolution setting (1) . default value: 0 (0: 1lsb = 6.4 ms; 1: 1lsb = 25 s) 1. configuration of this bit affects timestamp0_reg (40h) , timestamp1_reg (41h) , timestamp2_reg (42h) , step_timestamp_l (49h) , step_timestamp_h (4ah) , and ctrl6_c (15h) registers. sleep_dur[3:0] duration to go in sleep mode. default value: 0000 (this corresponds to 16 odr) 1 lsb = 512 odr
docid028475 rev 5 89/113 lsm6dsl register description 113 9.80 free_fall (5dh) free-fall function duration setting register (r/w). table 193. free_fall register ff_dur4 ff_dur3 ff_dur2 ff_dur1 ff_dur0 ff_ths2 ff_ths1 ff_ths0 table 194. free_fall register description ff_dur[4:0] free-fall duration event. default: 0 for the complete configuration of the free fall duration, refer to ff_dur5 in wake_up_dur (5ch) configuration ff_ths[2:0] free fall threshold setting. default: 000 for details refer to table 195 . table 195. threshold for free-fall function ff_ths[2:0] threshold value 000 156 m g 001 219 m g 010 250 m g 011 312 m g 100 344 m g 101 406 m g 110 469 m g 111 500 m g
register description lsm6dsl 90/113 docid028475 rev 5 9.81 md1_cfg (5eh) functions routing on int1 register (r/w). table 196. md1_cfg register int1_ inact_ state int1_ single_ tap int1_wu int1_ff int1_ double_ tap int1_6d int1_tilt int1_ timer table 197. md1_cfg register description int1_inact_ state routing on int1 of inactivity mode. default: 0 (0: routing on int1 of inactivity disabled; 1: routing on int1 of inactivity enabled) int1_single_ tap single-tap recognition routing on int1. default: 0 (0: routing of single-tap event on int1 disabled; 1: routing of single-tap event on int1 enabled) int1_wu routing of wakeup event on int1. default value: 0 (0: routing of wakeup event on int1 disabled; 1: routing of wakeup event on int1 enabled) int1_ff routing of free-fall event on int1. default value: 0 (0: routing of free-fall event on int1 disabled; 1: routing of free-fall event on int1 enabled) int1_double _tap routing of tap event on int1. default value: 0 (0: routing of double-tap event on int1 disabled; 1: routing of double-tap event on int1 enabled) int1_6d routing of 6d event on int1. default value: 0 (0: routing of 6d event on int1 disabled; 1: routing of 6d event on int1 enabled) int1_tilt routing of tilt event on int1. default value: 0 (0: routing of tilt event on int1 disabled; 1: routing of tilt event on int1 enabled) int1_timer routing of end counter event of timer on int1. default value: 0 (0: routing of end counter event of timer on int1 disabled; 1: routing of end counter event of timer event on int1 enabled)
docid028475 rev 5 91/113 lsm6dsl register description 113 9.82 md2_cfg (5fh) functions routing on int2 register (r/w). table 198. md2_cfg register int2_ inact_ state int2_ single_ tap int2_wu int2_ff int2_ double_ tap int2_6d int2_tilt int2_ iron table 199. md2_cfg register description int2_inact_ state routing on int2 of inactivity mode. default: 0 (0: routing on int2 of inactivity disabled; 1: routing on int2 of inactivity enabled) int2_single_ tap single-tap recognition routing on int2. default: 0 (0: routing of single-tap event on int2 disabled; 1: routing of single-tap event on int2 enabled) int2_wu routing of wakeup event on int2. default value: 0 (0: routing of wakeup event on int2 disabled; 1: routing of wake-up event on int2 enabled) int2_ff routing of free-fall event on int2. default value: 0 (0: routing of free-fall event on int2 disabled; 1: routing of free-fall event on int2 enabled) int2_double _tap routing of tap event on int2. default value: 0 (0: routing of double-tap event on int2 disabled; 1: routing of double-tap event on int2 enabled) int2_6d routing of 6d event on int2. default value: 0 (0: routing of 6d event on int2 disabled; 1: routing of 6d event on int2 enabled) int2_tilt routing of tilt event on int2. default value: 0 (0: routing of tilt event on int2 disabled; 1: routing of tilt event on int2 enabled) int2_iron routing of soft-iron/hard-iron algorithm end event on int2. default value: 0 (0: routing of soft-iron/hard-iron algorithm end event on int2 disabled; 1: routing of soft-iron/hard-iron algorithm end event on int2 enabled)
register description lsm6dsl 92/113 docid028475 rev 5 9.83 master_cmd_code (60h) 9.84 sens_sync_spi_error_code (61h) 9.85 out_mag_raw_x_l (66h) external magnetometer raw data (r). 9.86 out_mag_raw_x_h (67h) external magnetometer raw data (r). table 200. master_cmd_code register master_ cmd_ code7 master_ cmd_ code6 master_ cmd_ code5 master_ cmd_ code4 master_ cmd_ code3 master_ cmd_ code2 master_ cmd_ code1 master_ cmd_ code0 table 201. master_cmd_code register description master_cmd_ code[7:0] master command code used for stamping for sensor sync. default: 0 table 202. sens_sync_spi_error_code register error_ code7 error_ code6 error_ code5 error_ code4 error_ code3 error_ code2 error_ code1 error_ code0 table 203. sens_sync_spi_error_code register description error_code[7:0] error code used for sensor synchronization. default: 0) table 204. out_mag_raw_x_l register d7 d6 d5 d4 d3 d2 d1 d0 table 205. out_mag_raw_x_l register description d[7:0] x-axis external magnetometer value (lsbyte) table 206. out_mag_raw_x_h register d15 d14 d13 d12 d11 d10 d9 d8 table 207. out_mag_raw_x_h register description d[15:8] x-axis external magnetometer value (msbyte)
docid028475 rev 5 93/113 lsm6dsl register description 113 9.87 out_mag_raw_y_l (68h) external magnetometer raw data (r). 9.88 out_mag_raw_y_h (69h) external magnetometer raw data (r). 9.89 out_mag_raw_z_l (6ah) external magnetometer raw data (r). 9.90 out_mag_raw_z_h (6bh) external magnetometer raw data (r). table 208. out_mag_raw_y_l register d7 d6 d5 d4 d3 d2 d1 d0 table 209. out_mag_raw_y_l register description d[7:0] y-axis external magnetometer value (lsbyte) table 210. out_mag_raw_y_h register d15 d14 d13 d12 d11 d10 d9 d8 table 211. out_mag_raw_y_h register description d[15:8] y-axis external magnetometer value (msbyte) table 212. out_mag_raw_z_l register d7 d6 d5 d4 d3 d2 d1 d0 table 213. out_mag_raw_z_l register description d[7:0] z-axis external magnetometer value (lsbyte) table 214. out_mag_raw_z_h register d15 d14 d13 d12 d11 d10 d9 d8 table 215. out_mag_raw_z_h register description d[15:8] z-axis external magnetometer value (msbyte)
register description lsm6dsl 94/113 docid028475 rev 5 9.91 x_ofs_usr (73h) accelerometer x-axis user offset correction (r/w) 9.92 y_ofs_usr (74h) accelerometer y-axis user offset correction (r/w) 9.93 z_ofs_usr (75h) accelerometer z-axis user offset correction (r/w) table 216. x_ofs_usr register x_ofs_ usr_7 x_ofs_ usr_6 x_ofs_ usr_5 x_ofs_ usr_4 x_ofs_ usr_3 x_ofs_ usr_2 x_ofs_ usr_1 x_ofs_ usr_0 table 217. x_ofs_usr register description x_ofs_usr_ [7:0] accelerometer x-axis user offset correction expressed in two?s complement, weight depends on ctrl6_c(4) bit. the value must be in the range [-127 127]. table 218. y_ofs_usr register y_ofs_ usr_7 y_ofs_ usr_6 y_ofs_ usr_5 y_ofs_ usr_4 y_ofs_ usr_3 y_ofs_ usr_2 y_ofs_ usr_1 y_ofs_ usr_0 table 219. y_ofs_usr register description y_ofs_usr_ [7:0] accelerometer y-axis user offset correction expressed in two?s complement, weight depends on ctrl6_c(4) bit. the value must be in the range [-127 127]. table 220. z_ofs_usr register z_ofs_ usr_7 z_ofs_ usr_6 z_ofs_ usr_5 z_ofs_ usr_4 z_ofs_ usr_3 z_ofs_ usr_2 z_ofs_ usr_1 z_ofs_ usr_0 table 221. z_ofs_usr register description z_ofs_usr_ [7:0] accelerometer z-axis user offset correction expressed in two?s complement, weight depends on ctrl6_c(4) bit. the value must be in the range [-127 127].
docid028475 rev 5 95/113 lsm6dsl embedded functions register mapping 113 10 embedded functions register mapping the tables given below provide a list of the first (a) and second (b) bank registers related to the embedded functions available in the device and the corresponding addresses. the embedded functions registers of bank a are accessible when func_cfg_en is set to ?1? in func_cfg_access (01h) . the embedded functions registers of bank b are accessible when both func_cfg_en and func_cfg_en_b set to ?1? in func_cfg_access (01h) . note: all modifications of the content of the embedded functions registers have to be performed with the device in power-down mode. table 222. register address map - bank a - embedded functions name type register address default comment hex binary slv0_add r/w 02 00000010 00000000 slv0_subadd r/w 03 00000011 00000000 slave0_config r/w 04 00000100 00000000 slv1_add r/w 05 00000101 00000000 slv1_subadd r/w 06 00000110 00000000 slave1_config r/w 07 00000111 00000000 slv2_add r/w 08 00001000 00000000 slv2_subadd r/w 09 00001001 00000000 slave2_config r/w 0a 00001010 00000000 slv3_add r/w 0b 00001011 00000000 slv3_subadd r/w 0c 00001100 00000000 slave3_config r/w 0d 00001101 00000000 datawrite_src_ mode_sub_slv0 r/w 0e 00001110 00000000 config_pedo_ths_min r/w 0f 00001111 00010000 reserved - 10-12 reserved sm_ths r/w 13 00010011 00000110 pedo_deb_reg r/w 14 00010100 01101110 step_count_delta r/w 15 0001 0101 00000000 mag_si_xx r/w 24 00100100 00001000 mag_si_xy r/w 25 00100101 00000000 mag_si_xz r/w 26 00100110 00000000 mag_si_yx r/w 27 00100111 00000000 mag_si_yy r/w 28 00101000 00001000
embedded functions register mapping lsm6dsl 96/113 docid028475 rev 5 registers marked as reserved must not be changed. writing to those registers may cause permanent damage to the device. the content of the registers that are loaded at boot should not be changed. they contain the factory calibration values. their content is automatically restored when the device is powered up. mag_si_yz r/w 29 00101001 00000000 mag_si_zx r/w 2a 00101010 00000000 mag_si_zy r/w 2b 00101011 00000000 mag_si_zz r/w 2c 00101100 00001000 mag_offx_l r/w 2d 00101101 00000000 mag_offx_h r/w 2e 00101110 00000000 mag_offy_l r/w 2f 00101111 00000000 mag_offy_h r/w 30 00110000 00000000 mag_offz_l r/w 31 00110001 00000000 mag_offz_h r/w 32 00110010 00000000 table 223. register address map - bank b - embedded functions name type register address default comment hex binary a_wrist_tilt_lat r/w 50 01010000 00001111 reserved - 51-53 reserved a_wrist_tilt_ths r/w 54 01010100 00100000 reserved - 55-58 reserved a_wrist_tilt_mask r/w 59 01011001 11000000 table 222. register address map - bank a - embedded functions (continued) name type register address default comment hex binary
docid028475 rev 5 97/113 lsm6dsl embedded functions registers description - bank a 113 11 embedded functions registers description - bank a note: all modifications of the content of the embedded functions registers have to be performed with the device in power-down mode. 11.1 slv0_add (02h) i 2 c slave address of the first external sensor (sensor1) register (r/w). 11.2 slv0_subadd (03h) address of register on the first external sensor (sensor1) register (r/w). 11.3 slave0_config (04h) first external sensor (sensor1) configuration and sensor hub settings register (r/w). table 224. slv0_add register slave0_ add6 slave0_ add5 slave0_ add4 slave0_ add3 slave0_ add2 slave0_ add1 slave0_ add0 rw_0 table 225. slv0_add register description slave0_add[6:0] i 2 c slave address of sensor1 that can be read by sensor hub. default value: 0000000 rw_0 read/write operation on sensor1. default value: 0 (0: write operation; 1: read operation) table 226. slv0_subadd register slave0_ reg7 slave0_ reg6 slave0_ reg5 slave0_ reg4 slave0_ reg3 slave0_ reg2 slave0_ reg1 slave0_ reg0 table 227. slv0_subadd register description slave0_reg[7:0] address of register on sensor1 that has to be read/write according to the rw_0 bit value in slv0_add (02h) . default value: 00000000 table 228. slave0_config register slave0_ rate1 slave0_ rate0 aux_sens _on1 aux_sens _on0 src_mode slave0_ numop2 slave0_ numop1 slave0_ numop0
embedded functions registers description - bank a lsm6dsl 98/113 docid028475 rev 5 11.4 slv1_add (05h) i 2 c slave address of the second external sensor (sensor2) register (r/w). 11.5 slv1_subadd (06h) address of register on the second external sensor (sensor2) register (r/w). table 229. slave0_config register description slave0_rate[1:0] decimation of read operation on sensor1 starting from the sensor hub trigger. default value: 00 (00: no decimation 01: update every 2 samples 10: update every 4 samples 11: update every 8 samples) aux_sens_on[1:0] number of external sensors to be read by sensor hub. default value: 00 (00: one sensor 01: two sensors 10: three sensors 11: four sensors) src_mode source mode conditioned read (1) . default value: 0 (0: source mode read disabled; 1: source mode read enabled) slave0_numop[2:0] number of read operations on sensor1. 1. read conditioned by the content of the register at address specified in the datawrite_src_mode_sub_slv0 (0eh) register. if the content is non-zero, the operation continues with the reading of the address specified in the slv0_subadd (03h) register, else the operation is interrupted. table 230. slv1_add register slave1_ add6 slave1_ add5 slave1_ add4 slave1_ add3 slave1_ add2 slave1_ add1 slave1_ add0 r_1 table 231. slv1_add register description slave1_add[6:0] i 2 c slave address of sensor2 that can be read by sensor hub. default value: 0000000 r_1 read operation on sensor2 enable. default value: 0 (0: read operation disabled; 1: read operation enabled) table 232. slv1_subadd register slave1_ reg7 slave1_ reg6 slave1_ reg5 slave1_ reg4 slave1_ reg3 slave1_ reg2 slave1_ reg1 slave1_ reg0 table 233. slv1_subadd register description slave1_reg[7:0] address of register on sensor2 that has to be read according to the r_1 bit value in slv1_add (05h) . default value: 00000000
docid028475 rev 5 99/113 lsm6dsl embedded functions registers description - bank a 113 11.6 slave1_config (07h) second external sensor (sensor2) configuration register (r/w). 11.7 slv2_add (08h) i 2 c slave address of the third external sensor (sensor3) register (r/w). 11.8 slv2_subadd (09h) address of register on the third external sensor (sensor3) register (r/w). table 234. slave1_config register slave1_ rate1 slave1_ rate0 write_once 0 (1) 1. this bit must be set to ?0? for the correct operation of the device. 0 (1) slave1_ numop2 slave1_ numop1 slave1_ numop0 table 235. slave1_config register description slave1_rate[1:0] decimation of read operation on sensor2 starting from the sensor hub trigger. default value: 00 (00: no decimation 01: update every 2 samples 10: update every 4 samples 11: update every 8 samples) write_once slave 0 write operation is performed only at the first sensor hub cycle. (1) default value: 0 0: write operation for each sensor hub cycle 1: write operation only for the first sensor hub cycle 1. this is effective if the aux_sens_on[1:0] field in slave0_config (04h) is set to a value other than 00. slave1_numop[2:0] number of read operations on sensor2. table 236. slv2_add register slave2_ add6 slave2_ add5 slave2_ add4 slave2_ add3 slave2_ add2 slave2_ add1 slave2_ add0 r_2 table 237. slv2_add register description slave2_add[6:0] i 2 c slave address of sensor3 that can be read by sensor hub. default value: 0000000 r_2 read operation on sensor3 enable. default value: 0 (0: read operation disabled; 1: read operation enabled) table 238. slv2_subadd register slave2_ reg7 slave2_ reg6 slave2_ reg5 slave2_ reg4 slave2_ reg3 slave2_ reg2 slave2_ reg1 slave2_ reg0 table 239. slv2_subadd register description slave2_reg[7:0] address of register on sensor3 that has to be read according to the r_2 bit value in slv2_add (08h) . default value: 00000000
embedded functions registers description - bank a lsm6dsl 100/113 docid028475 rev 5 11.9 slave2_config (0ah) third external sensor (sensor3) configuration register (r/w). 11.10 slv3_add (0bh) i 2 c slave address of the fourth external sensor (sensor4) register (r/w). 11.11 slv3_subadd (0ch) address of register on the fourth external sensor (sensor4) register (r/w). table 240. slave2_config register slave2_ rate1 slave2_ rate0 0 (1) 1. this bit must be set to ?0? for the correct operation of the device. 0 (1) 0 (1) slave2_ numop2 slave2_ numop1 slave2_ numop0 table 241. slave2_config register description slave2_rate[1:0] decimation of read operation on sensor3 starting from the sensor hub trigger. default value: 00 (00: no decimation 01: update every 2 samples 10: update every 4 samples 11: update every 8 samples) slave2_numop[2:0] number of read operations on sensor3. table 242. slv3_add register slave3_ add6 slave3_ add5 slave3_ add4 slave3_ add3 slave3_ add2 slave3_ add1 slave3_ add0 r_3 table 243. slv3_add register description slave3_add[6:0] i 2 c slave address of sensor4 that can be read by the sensor hub. default value: 0000000 r_3 read operation on sensor4 enable. default value: 0 (0: read operation disabled; 1: read operation enabled) table 244. slv3_subadd register slave3_ reg7 slave3_ reg6 slave3_ reg5 slave3_ reg4 slave3_ reg3 slave3_ reg2 slave3_ reg1 slave3_ reg0 table 245. slv3_subadd register description slave3_reg[7:0] address of register on sensor4 that has to be read according to the r_3 bit value in slv3_add (0bh) . default value: 00000000
docid028475 rev 5 101/113 lsm6dsl embedded functions registers description - bank a 113 11.12 slave3_config (0dh) fourth external sensor (sensor4) configuration register (r/w). 11.13 datawrite_src_mode_sub_slv0 (0eh) data to be written into the slave device register (r/w). 11.14 config_pedo_ths_min (0fh) table 246. slave3_config register slave3_ rate1 slave3_ rate0 0 (1) 1. this bit must be set to ?0? for the correct operation of the device. 0 (1) 0 (1) slave3_ numop2 slave3_ numop1 slave3_ numop0 table 247. slave3_config register description slave3_rate[1:0] decimation of read operation on sensor4 starting from the sensor hub trigger. default value: 00 (00: no decimation 01: update every 2 samples 10: update every 4 samples 11: update every 8 samples) slave3_numop[2:0] number of read operations on sensor4. table 248. datawrite_src_mode_sub_slv0 register slave_ dataw7 slave_ dataw6 slave_ dataw5 slave_ dataw4 slave_ dataw3 slave_ dataw2 slave_ dataw1 slave_ dataw0 table 249. datawrite_src_mode_sub_slv0 register description slave_dataw[7:0] data to be written into the slave device according to the rw_0 bit in slv0_add (02h) register or address to be read in source mode. default value: 00000000 table 250. config_pedo_ths_min register pedo_fs 0 0 ths_min_4 ths_min_3 ths_min_2 ths_min_1 ths_min_0 table 251. config_pedo_ths_min register description pedo_fs pedometer data elaboration at 4 g. (0: elaboration of 2 g data; 1: elaboration of 4 g data) ths_min_[4:0] minimum threshold to detect a peak. default is 10h.
embedded functions registers description - bank a lsm6dsl 102/113 docid028475 rev 5 11.15 sm_ths (13h) significant motion configuration register (r/w). 11.16 pedo_deb_reg (14h) 11.17 step_count_delta (15h) time period register for step detection on delta time (r/w). table 252. sm_ths register sm_ths_ 7 sm_ths_ 6 sm_ths_ 5 sm_ths_ 4 sm_ths_ 3 sm_ths_ 2 sm_ths_ 1 sm_ths_ 0 table 253. sm_ths register description sm_ths[7:0] significant motion threshold. default value: 00000110 table 254. pedo_deb_reg register default values deb_ time4 deb_ time3 deb_ time2 deb_ time1 deb_ time0 deb_ step2 deb_ step1 deb_ step0 01101110 table 255. pedo_deb_reg register description deb_ time[4:0] debounce time. if the time between two consecutive steps is greater than deb_time*80ms, the debouncer is reactivated. default value: 01101 deb_ step[2:0] debounce threshold. minimum number of steps to increment step counter (debounce). default value: 110 table 256. step_count_delta register sc_ delta_7 sc_ delta_6 sc_ delta_5 sc_ delta_4 sc_ delta_3 sc_ delta_2 sc_ delta_1 sc_ delta_0 table 257. step_count_delta register description sc_delta[7:0] time period value (1) (1lsb = 1.6384 s) 1. this value is effective if the timer_en bit of ctrl10_c (19h) is set to 1 and the timer_hr bit of wake_up_dur (5ch) register is set to 0.
docid028475 rev 5 103/113 lsm6dsl embedded functions registers description - bank a 113 11.18 mag_si_xx (24h) soft-iron matrix correction register (r/w). 11.19 mag_si_xy (25h) soft-iron matrix correction register (r/w). 11.20 mag_si_xz (26h) soft-iron matrix correction register (r/w). 11.21 mag_si_yx (27h) soft-iron matrix correction register (r/w). table 258. mag_si_xx register mag_si_ xx_7 mag_si_ xx_6 mag_si_ xx_5 mag_si_ xx_4 mag_si_ xx_3 mag_si_ xx_2 mag_si_ xx_1 mag_si_ xx_0 table 259. mag_si_xx register description mag_si_xx_[7:0] soft-iron correction row1 col1 coefficient (1) . default value: 00001000 1. value is expressed in sign-module format. table 260. mag_si_xy register mag_si_ xy_7 mag_si_ xy_6 mag_si_ xy_5 mag_si_ xy_4 mag_si_ xy_3 mag_si_ xy_2 mag_si_ xy_1 mag_si_ xy_0 table 261. mag_si_xy register description mag_si_xy_[7:0] soft-iron correction row1 col2 coefficient (1) . default value: 00000000 1. value is expressed in sign-module format. table 262. mag_si_xz register mag_si_ xz_7 mag_si_ xz_6 mag_si_ xz_5 mag_si_ xz_4 mag_si_ xz_3 mag_si_ xz_2 mag_si_ xz_1 mag_si_ xz_0 table 263. mag_si_xz register description mag_si_xz_[7:0] soft-iron correction row1 col3 coefficient (1) . default value: 00000000 1. value is expressed in sign-module format. table 264. mag_si_yx register mag_si_ yx_7 mag_si_ yx_6 mag_si_ yx_5 mag_si_ yx_4 mag_si_ yx_3 mag_si_ yx_2 mag_si_ yx_1 mag_si_ yx_0 table 265. mag_si_yx register description mag_si_yx_[7:0] soft-iron correction row2 col1 coefficient (1) . default value: 00000000 1. value is expressed in sign-module format.
embedded functions registers description - bank a lsm6dsl 104/113 docid028475 rev 5 11.22 mag_si_yy (28h) soft-iron matrix correction register (r/w). 11.23 mag_si_yz (29h) soft-iron matrix correction register (r/w). 11.24 mag_si_zx (2ah) soft-iron matrix correction register (r/w). 11.25 mag_si_zy (2bh) soft-iron matrix correction register (r/w). table 266. mag_si_yy register mag_si_ yy_7 mag_si_ yy_6 mag_si_ yy_5 mag_si_ yy_4 mag_si_ yy_3 mag_si_ yy_2 mag_si_ yy_1 mag_si_ yy_0 table 267. mag_si_yy register description mag_si_yy_[7:0] soft-iron correction row2 col2 coefficient (1) . default value: 00001000 1. value is expressed in sign-module format. table 268. mag_si_yz register mag_si_ yz_7 mag_si_ yz_6 mag_si_ yz_5 mag_si_ yz_4 mag_si_ yz_3 mag_si_ yz_2 mag_si_ yz_1 mag_si_ yz_0 table 269. mag_si_yz register description mag_si_yz_[7:0] soft-iron correction row2 col3 coefficient (1) . default value: 00000000 1. value is expressed in sign-module format. table 270. mag_si_zx register mag_si_ zx_7 mag_si_ zx_6 mag_si_ zx_5 mag_si_ zx_4 mag_si_ zx_3 mag_si_ zx_2 mag_si_ zx_1 mag_si_ zx_0 table 271. mag_si_zx register description mag_si_zx_[7:0] soft-iron correction row3 col1 coefficient (1) . default value: 00000000 1. value is expressed in sign-module format. table 272. mag_si_zy register mag_si_ zy_7 mag_si_ zy_6 mag_si_ zy_5 mag_si_ zy_4 mag_si_ zy_3 mag_si_ zy_2 mag_si_ zy_1 mag_si_ zy_0 table 273. mag_si_zy register description mag_si_zy_[7:0] soft-iron correction row3 col2 coefficient (1) . default value: 00000000 1. value is expressed in sign-module format.
docid028475 rev 5 105/113 lsm6dsl embedded functions registers description - bank a 113 11.26 mag_si_zz (2ch) soft-iron matrix correction register (r/w). 11.27 mag_offx_l (2dh) offset for x-axis hard-iron compensation register (r/w). the value is expressed as a 16-bit word in two?s complement. 11.28 mag_offx_h (2eh) offset for x-axis hard-iron compensation register (r/w).the value is expressed as a 16-bit word in two?s complement. 11.29 mag_offy_l (2fh) offset for y-axis hard-iron compensation register (r/w). the value is expressed as a 16-bit word in two?s complement. table 274. mag_si_zz register mag_si_ zz_7 mag_si_ zz_6 mag_si_ zz_5 mag_si_ zz_4 mag_si_ zz_3 mag_si_ zz_2 mag_si_ zz_1 mag_si_ zz_0 table 275. mag_si_zz register description mag_si_zz_[7:0] soft-iron correction row3 col3 coefficient (1) . default value: 00001000 1. value is expressed in sign-module format. table 276. mag_offx_l register mag_off x_l_7 mag_off x_l_6 mag_off x_l_5 mag_off x_l_4 mag_off x_l_3 mag_off x_l_2 mag_off x_l_1 mag_off x_l_0 table 277. mag_offx_l register description mag_offx_l_[7:0] offset for x-axis hard-iron compensation. default value: 00000000 table 278. mag_offx_h register mag_off x_h_7 mag_off x_h_6 mag_off x_h_5 mag_off x_h_4 mag_off x_h_3 mag_off x_h_2 mag_off x_h_1 mag_off x_h_0 table 279. mag_offx_h register description mag_offx_h_[7:0] offset for x-axis hard-iron compensation. default value: 00000000 table 280. mag_offy_l register mag_off y_l_7 mag_off y_l_6 mag_off y_l_5 mag_off y_l_4 mag_off y_l_3 mag_off y_l_2 mag_off y_l_1 mag_off y_l_0 table 281. mag_offy_l register description mag_offy_l_[7:0] offset for y-axis hard-iron compensation. default value: 00000000
embedded functions registers description - bank a lsm6dsl 106/113 docid028475 rev 5 11.30 mag_offy_h (30h) offset for y-axis hard-iron compensation register (r/w). the value is expressed as a 16-bit word in two?s complement. 11.31 mag_offz_l (31h) offset for z-axis hard-iron compensation register (r/w). the value is expressed as a 16-bit word in two?s complement. 11.32 mag_offz_h (32h) offset for z-axis hard-iron compensation register (r/w). the value is expressed as a 16-bit word in two?s complement. table 282. mag_offy_h register mag_off y_h_7 mag_off y_h_6 mag_off y_h_5 mag_off y_h_4 mag_off y_h_3 mag_off y_h_2 mag_off y_h_1 mag_off y_h_0 table 283. mag_offy_h register description mag_offy_h_[7:0] offset for y-axis hard-iron compensation. default value: 00000000 table 284. mag_offz_l register mag_off z_l_7 mag_off z_l_6 mag_off z_l_5 mag_off z_l_4 mag_off z_l_3 mag_off z_l_2 mag_off z_l_1 mag_off z_l_0 table 285. mag_offz_l register description mag_offz_l_[7:0] offset for z-axis hard-iron compensation. default value: 00000000 table 286. mag_offz_h register mag_off z_h_7 mag_off z_h_6 mag_off z_h_5 mag_off z_h_4 mag_off z_h_3 mag_off z_h_2 mag_off z_h_1 mag_off z_h_0 table 287. mag_offz_h register description mag_offz_h_[7:0] offset for z-axis hard-iron compensation. default value: 00000000
docid028475 rev 5 107/113 lsm6dsl embedded functions registers description - bank b 113 12 embedded functions registers description - bank b 12.1 a_wrist_tilt_lat (50h) absolute wrist tilt latency register (r/w). 12.2 a_wrist_tilt_ths (54h) absolute wrist tilt threshold register (r/w). 12.3 a_wrist_tilt_mask (59h) absolute wrist tilt mask register (r/w). table 288. a_wrist_tilt_lat register wrist_tilt _ timer7 wrist_tilt _ timer6 wrist_tilt _ timer5 wrist_tilt _ timer4 wrist_tilt _ timer3 wrist_tilt _ timer2 wrist_tilt _ timer1 wrist_tilt _ timer0 table 289. a_wrist_tilt_lat register description wrist_tilt_timer[7:0] absolute wrist tilt latency parameters. 1 lsb = 40 ms. default value: 0fh (600 ms) table 290. a_wrist_tilt_ths register wrist_ tilt_ ths7 wrist_ tilt_ ths6 wrist_ tilt_ ths5 wrist_ tilt_ ths4 wrist_ tilt_ ths3 wrist_ tilt_ ths2 wrist_ tilt_ ths1 wrist_ tilt_ ths0 table 291. a_wrist_tilt_ths register description wrist_tilt_ths[7:0] absolute wrist tilt threshold parameters. 1 lsb = 15.625 m g . default value: 20h (500 m g ) table 292. a_wrist_tilt_mask register wrist_tilt_ mask_ xpos wrist_tilt_ mask_ xneg wrist_tilt_ mask_ ypos wrist_tilt_ mask_yneg wrist_tilt_ mask_ zpos wrist_tilt_ mask_ zneg 00 table 293. a_wrist_tilt_mask register description wrist_tilt_mask_ xpos absolute wrist tilt positive x-axis enable. default value: 1 (0: disable; 1: enable) wrist_tilt_mask_ xneg absolute wrist tilt negative x-axis enable. default value: 1 (0: disable; 1: enable) wrist_tilt_mask_ ypos absolute wrist tilt positive y-axis enable. default value: 0 (0: disable; 1: enable) wrist_tilt_mask_ yneg absolute wrist tilt negative y-axis enable. default value: 0 (0: disable; 1: enable) wrist_tilt_mask_ zpos absolute wrist tilt positive z-axis enable. default value: 0 (0: disable; 1: enable) wrist_tilt_mask_ zneg absolute wrist tilt negative z-axis enable. default value:0 (0: disable; 1: enable)
soldering information lsm6dsl 108/113 docid028475 rev 5 13 soldering information the lga package is compliant with the ecopack ? , rohs and "green" standard. it is qualified for soldering heat resistance according to jedec j-std-020. land pattern and soldering recommendations are available at www .st.com/mems .
docid028475 rev 5 109/113 lsm6dsl package information 113 14 package information in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com. ecopack is an st trademark. 14.1 lga-14 package information figure 17. lga-14 2.5x3x0.86 mm package outline and mechanical data : / + [   [ ? [ ?   3lqlqglfdwru 3lqlqglfdwru %277209,(: 7239,(:   'lphqvlrqvduhlqploolphwhuxqohvvrwkhuzlvhvshflilhg *hqhudowrohudqfhlvppxqohvvrwkhuzlvhvshflilhg 287(5',0(16,216 ,7(0 ',0(16,21>pp@ 72/(5$1&(>pp@     ?       @ / >  k w j q h /     ?       @ : >  k w g l :  ; $ 0       @ + >  w k j l h + '0b
package information lsm6dsl 110/113 docid028475 rev 5 14.2 lga-14 packing information figure 18. carrier tape information for lga-14 package figure 19. lga-14 package orientation in carrier tape
docid028475 rev 5 111/113 lsm6dsl package information 113 figure 20. reel information for carrier tape of lga-14 package table 294. reel dimensions for carrier tape of lga-14 package reel dimensions (mm) a (max) 330 b (min) 1.5 c 13 0.25 d (min) 20.2 n (min) 60 g 12.4 +2/-0 t (max) 18.4 $ ' % )x o o u dg l x v 7dshvorw lqfruhiru wdshvwduw ppplqzlgwk *phdvxuhgdwkxe  & 1 ppplq $ffhvvkrohdw vorworfdwlrq 7
revision history lsm6dsl 112/113 docid028475 rev 5 15 revision history table 295. document revision history date revision changes 10-dec-2015 1 initial release 01-feb-2016 2 updated table 3: mechanical characteristics updated table 4: electrical characteristics updated figure 7: accelerometer chain updated section 9: register description 12-feb-2016 3 updated table 3: mechanical characteristics 29-jun-2016 4 document status promoted to production data updated table 3: mechanical characteristics added table 17: internal pin status updated drdy_pulse_cfg_g (0bh) updated bit 6 in ctrl4_c (13h) added wrist_tilt_en bit to ctrl10_c (19h) added func_src2 (54h) 28-oct-2016 5 updated features concerning android updated section 2: embedded low-power features added section 2.2: absolute wrist tilt added footnote 14 concerning accelerometer self-test to table 3 updated vdd_io in section table 4.: electrical characteristics updated figure 8: accelerometer composite filter updated figure 11 and figure 13 updated pin 12 (pin status modes) in table 17: internal pin status updated func_cfg_access (01h) updated ctrl4_c (13h) updated ctrl6_c (15h) updated ctrl9_xl (18h) updated d6d_src (1dh) added wrist_tilt_ia (55h) separated embedded registers into section 11: embedded functions registers description - bank a (02h through 32h) and section 12: embedded functions registers description - bank b (50h through 59h) updated slave1_config (07h) added a_wrist_tilt_lat (50h) , a_wrist_tilt_ths (54h) , and a_wrist_tilt_mask (59h) minor textual updates
docid028475 rev 5 113/113 lsm6dsl 113 important notice ? please read carefully stmicroelectronics nv and its subsidiaries (?st?) reserve the right to make changes, corrections, enhancements, modifications, and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant in formation on st products before placing orders. st products are sold pursuant to st?s terms and conditions of sale in place at the time of o rder acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and st assumes no liability for application assistance or the design of purchasers? products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information set forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2016 stmicroelectronics ? all rights reserved


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