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rt4805a copyright ? 2017 richtek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation. ds4805a - 0 2 april 201 7 www.richtek.com 1 2.5mhz, synchronous boost regulator with bypass mode general description the rt 4805a allows systems to take advantage of new battery chemistries that can supply significant energy when the battery voltage is lower than the required voltage for system power ics. by combining built - in power transistors, synchronous rectification, and low su pply current; this ic provides a compact solution for systems using advanced li - ion battery chemistries. the rt 4805a is a boost regulator designed to provide a minimum output voltage from a single - cell li - ion battery, even when the battery voltage is below system minimum. in boost mode, output voltage regulation is guaranteed to a maximum load current of 2 a. quiescent current in shutdown mode is less than 1 ? a, which maximizes battery life. the regulator transitions smoothly between bypass and normal boost m ode. the device can be forced into bypass mode to reduce quiescent current. the rt 4805a is available in the wl - csp - 16b 1.67x1.67 (bsc) package. features ? 4 few external components : 0.47 ? ? input volta ge range : 1.8v to 5v ? output range from 2.85v to 4.4v ? vsel = l 3. 6 v ? vsel = h 3. 7 v ? maximum continuous load current : 2a at v in > 2.65v boosting v out to 3.35v ? up to 96% efficient ? true bypass operation when v in > target v out ? internal synchronous rectifier ? true load disconnect when shut down ? forced bypass mode ? v sel control to optimize target v out ? short - circuit protection ? i 2 c controlled interface ? ultra low operating quiescent current ? small wl - csp 16b package applications ? single - cell li - ion, lifepo4 smart - phones or tablet ? 2.5g/3g/4g mini - module data cards simplified application circuit v i n r t 4 8 0 5 a v o u t l x v s e l e n a g n d p g n d c i n + - n b y p c o u t s c l s d a l 1 p g o o d t o p u l l h i g h v o l t a g e
rt4805a copyright ? 201 7 richtek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation. www.richtek.com ds4805a - 02 april 2017 2 ordering information note : richtek products are : ? rohs compliant and compatible with the current requirements of ipc/jedec j - std - 020. ? suitable for use in snpb or pb - free soldering processes . marking information pin configuration (top view) wl - csp - 16b 1.6 7 x1.6 7 (bsc) functional pin description pin no. pin name pin function a1 en enable. when this pin is high, the circuit is enabled. a2 pgood power g ood. it is a open - drain output. pgood pin pulls low automatically if the overload or otp event occurs. a3, a4 vin input v oltage. connect to li - ion battery input power source. b1 vsel output v oltage s elect. when boost is running, this pin can be used to select output voltage b2 scl serial i nterface c lock. (pull down if i 2 c is non - used) . b3, b4 vout output v oltage. place c out as close as possible to the device. c1 nbyp bypass. this pin can be used to activate forced bypass mode. when this pin is low, the bypass switches are turned on and the ic is otherwise inactive. c2 sda serial i nterface date line. (pull down if i 2 c is non - used). c3, c4 lx switching node. connect to inductor. d1 agnd analog g round. this is the signal ground reference for the ic. all voltage levels are measured with respect to this pin. d2, d3, d4 pgnd power g round. this is the power return for the ic. the c out bypass capacitor should be returned with the shortest path possible to these pins. r t 4 8 0 5 a p a c k a g e t y p e w s c : w l - c s p - 1 6 b 1 . 6 7 x 1 . 6 7 ( b s c ) v i n e n p g o o d v s e l v o u t s c l s d a n b y p l x l x a g n d p g n d p g n d p g n d v i n v o u t a 1 a 2 a 3 a 4 b 1 b 2 b 3 b 4 c 1 c 2 c 3 c 4 d 1 d 2 d 3 d 4 4 d : p r o d u c t c o d e w : d a t e c o d e 4 d w
rt4805a copyright ? 201 7 richtek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation. ds4805a - 02 april 2017 www.richtek.com 3 functional block diagram v o u t p g o o d a g n d l x p o w e r m o s c o n t r o l s t a g e + - e n d i g i t a l s o f t - s t a r t c o n t r o l v s e l n b y p s d a v i n s c l + + p w m l o g i c o s c c u r r e n t s e n s e p s m c o n t r o l z c d v m i n c o n t r o l v m a x c o n t r o l p g n d + -
rt4805a copyright ? 201 7 richtek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation. www.richtek.com ds4805a - 02 april 2017 4 operation the rt 4805a combined built - in power transistors, synchronous rectificatio n, and low supply current , it provides a compact solution for system using advanced li - ion battery chemistries. in boost mode, output voltage regulation is guaranteed to a maximum load current of 2a. quiescent current in shutdown mode is less than 1 ? a, which maximizes battery life. mode d epiction condition lin lin 1 linear startup 1 v in > v out lin 2 linear startup 2 v in > v out soft - start boost soft - start v out < v out ( min ) boost boost mode v out = v out ( min ) bypass bypass mode v in > v out ( min ) lin state when v in is rising, it enters the lin state. there are two parts for the lin state. it provides maximum current for 1a to charge the c out in lin1, and the other one is for 2a in lin2. by the way, the en is pulled high and v in > uvlo. as the figure shown, if the ti meout is over the specification, it will enter the fault mode. fig ure 1 . rt 4805a state chart startup and shutdown state when v in is rising and through the lin state, it will enter the startup state. if en is pulled low, any function is turned - off in shutdown mode. soft - start state it starts to switch in soft - start state. after the lin state, output voltage is rising with the intern al reference voltage. there is a point , it will go to fault condition, if the large output capacitor is used and the timeout is over 2 ms after the soft - start state. fault state as the figure 1 shown, it will enter to the fault state as below, ? the timeout of lin2 is over the 1024 ? s. ? it is over the 2ms when the state changed from soft - start state to boost mode. it will be the high impedance between the input and output when the fault is triggered. a restart will be start after 1ms. boost mode there are two normal operation modes , one is the boost mode, and the other one is bypass mode. in the boost mode, it provides the power to load by internal synchronous switches after the soft - start state. bypass mode in bypass mode, o utput voltage will inc rease with vin when input voltage is rising after the soft - start state. bypass mode operation in automatic mode, it transits from boost mode to bypass mode. as the figure 2 shown, there are three mosfet (q1 to q3). the q1 & q2 is for boost mode, it is used by q3 for bypass mode. v out will be followed the v in when v in is higher than the target output voltage. as the figure 3 shown, it is t ransited by bypass mosfet (q3). v out followed the v in . e n = 1 , v i n > u v l o l i n 1 s o f t - s t a r t l i n 2 f a u l t s t a t e b o o s t m o d e t i m e o u t < 5 1 2 s t i m e o u t > 5 1 2 s t i m e o u t > 1 0 2 4 s t i m e o u t < 1 0 2 4 s t i m e o u t > 2 m s t i m e o u t < 2 m s
rt4805a copyright ? 201 7 richtek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation. ds4805a - 02 april 2017 www.richtek.com 5 fig ure 2 . boost converter with bypass mode fig ure 3 . rt 4805a mode changed force pass - through mode when en pulled high and nbyp pulled low. the device is active in the force pass - through mode. it supplies current is approximately 15 ? a typ. from the battery, the device is short circuit protected by a current limit of 4000ma . vsel it is concern ed the minimum output voltage at the heavy load condition. there are two output voltage levels (3. 6 v & 3. 7 v) in boos t mode and bypass mode. i t can be selected by vset, so it must not be floating. pgood (power good) power good is a open - drain output . if it is 0, it stands for fault occurred. the power good provide the information to show the state of the system, ? pgood pin show high when the sequence of soft - start is completed. ? any fault cause pgood to be pulled low. ? pgood low when pm o s current limit has trigger e d for or the die the temperature exceeds 120 ? c . pgood is re - asserted wh e n the device cools below to 100 ? c . ocp the converter senses the current signal when the high - side p - mosfet turns on. as a result, t he ocp is cycle by - cycle current limitation. if the ocp occurs, the converter holds off the next on pulse until inductor current drops below the ocp limit. otp the converter has an over - temperature protection. when the junction temperature is higher than the thermal shutdown rising threshold, the system will be latched and the output voltage will no longer be regulated until the junction temperature drops under the falling threshold. en & nbyp it is used to select mode. as the table 1 shown , there are four device states. if the en pull low, and nbyp pull high/low, the rt 4805a is forced in shut - down mode and the quiescent is less than 1 ? a. i t works in force pass - through mode, if the e n set high and nbyp set low. when en and nbyp both pull high, the rt4805a is normal operation and enter automatic mode. there should be a delay time (> 60 ? s) from en pull high to nbyp pull high to guarantee normal automatic mode operation. l x g n d q 1 q 2 q 3 v o u t v i n v o u t v i n
rt4805a copyright ? 201 7 richtek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation. www.richtek.com ds4805a - 02 april 2017 6 table 1 en input n byp input device state 0 0/1 the device is shut down mode, and features a shutdown current down to ca. 1 ? a typ. 1 0 the device is active in forced pass - through mode. the device supply current is approximately 15 ? a typ. f rom the battery. the device is short circuit protected by a current limit of ca. 4000 ma. 1 1 the device is active in auto mode (dc/dc boost, pass - through mode) the device supply current is approximately 55 ? a typ. f rom the battery
rt4805a copyright ? 201 7 richtek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation. ds4805a - 02 april 2017 www.richtek.com 7 absolute maximum ratings (note 1 ) ? vin, vout to agnd -------------------------------- -------------------------------- ------------------------ ? ? 0.2v to 6 v ? en, vsel, pgood , n byp to agnd -------------------------------- -------------------------------- -- ? ? 0.2v to 6v ? lx -------------------------------- -------------------------------- -------------------------------- ---------------- ? (pgnd ? 0.2v) to 6 v ? power dissipation, p d @ t a = 25 ? c wl - csp - 16b 1.6 7 x1.6 7 (bsc) -------------------------------- -------------------------------- ----------- ? 2.09 w ? package thermal resistance (note 2 ) wl - csp - 16b 1.6 7 x1.6 7 (bsc) , ? ja -------------------------------- -------------------------------- ----- ? 47.7 ? c/w ? lead temperature (soldering, 10 sec.) -------------------------------- -------------------------------- - ? ? 260 ? c ? junction temperature -------------------------------- -------------------------------- ----------------------- ? ? 150 ? c ? storage temperature range -------------------------------- -------------------------------- -------------- ? ? ? 65 ? c to 150 ? c ? esd susceptibility (note 3 ) hbm (human body model) -------------------------------- -------------------------------- ---------------- ? ? 2 kv mm (machine mode l ) -------------------------------- -------------------------------- ------------------------ ? ? 2 0 0v cdm (charge device mode l ) -------------------------------- -------------------------------- -------------- ?? 1 kv recommended operating conditions (note 4 ) ? input voltage range -------------------------------- -------------------------------- ----------------------- ? 1.8v to 5v ? output voltage range -------------------------------- -------------------------------- --------------------- ? 2.85v to 4.4v ? ambient temperature range -------------------------------- -------------------------------- -------------- ? ? 40 ? c to 85 ? c ? junction temperature range -------------------------------- -------------------------------- ------------- ?? 40 ? c to 125 ? c electrical characteristics ( v in = 3 v, v out = 3 . 4 v , t a = 25 ? c, unless otherwise specified) parameter symbol test conditions min typ max unit vin operation range v in 1.8 -- 5 v vin quiescent current i q auto b ypass mode , v in = 3.8v -- 35 70 ? a vin quiescent current i q boost mode , i load = 0ma, switching , v in = 3v -- 55 100 ? a vin quiescent current i q force by pass without liq , v in = 3.6v -- 15 25 ? a vin shutdown current i shdn en = 0v, v in = 3.6v -- -- 1 ? a vout to vin reverse leakage i lk v out = 5v, en = nbyp = h, v in < v out -- 0.2 1 ? a vout leakage current i lk_out v out = 0v, en = 0v, v in = 4.2v -- 0.1 1 ? a under voltage lock out v uvlo v in rising -- 1.6 1.8 v under voltage lock out hyst eresis v uvlo_hys -- 200 -- mv pgood low v pgood i pgood = 5ma -- -- 0.4 v pgood leakage current i pgood _lk v pgood = 5v -- -- 1 ? a logic level hi gh en, vsel, n byp , scl, sda v ih 1.2 -- -- v
rt4805a copyright ? 201 7 richtek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation. www.richtek.com ds4805a - 02 april 2017 8 parameter symbol test conditions min typ max unit logic level low en, vsel, n byp , scl, sda v il -- -- 0.4 v output voltage accuracy v reg v out ? v in > 100mv , pwm ? 2 -- 2 % minimum on time t on v in = 3v, v out = 3.5v, i load > 1000ma -- 80 -- n s maximum duty cycle d max 40 -- -- % switching frequency f sw v in = 2.65 v, v out = 3.5 v, i load = 1000ma 2 2.5 3 mhz boost valley current limit i cl v in = 2. 9 v 3.5 4 4.5 a soft - start input current limit i ss_pk lin1 -- 1000 -- ma soft - start input current limit i ss_pk lin2 -- 2000 -- ma pass through mode current limit i bpcl v in = 3.2v -- 4 -- a n - c hannel boost switch r ds(on) r dsn v in = 3 .2 v, v out = 3.5v -- 60 95 m ? p - c hannel boost switch r ds(on) r dsp v in = 3. 2 v, v out = 3.5v -- 40 80 m ? n - c hannel bypass switch r ds(on) r dsp_byp v in = 3. 2 v, v out = 3.5v -- 40 60 m ? hot die trigger threshold t hd -- 1 0 0 -- o c hot die release threshold t hdr -- 90 -- o c over temperature protection t otp -- 1 6 0 -- o c over temperature protection hysteresis t otp_hys -- 20 -- o c fault restart time t rst -- 1 -- m s note 1. stresses beyond those listed absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rat ing conditions may affect device reliability. note 2. ? ja is measured at t a = 25 ? c on a high effective thermal conductivity four - l ayer test board per jedec 51 - 7. note 3. devices are esd sensitive. handling precaution recommended. note 4. the device is not guaranteed to function outside its operating conditions.
rt4805a copyright ? 201 7 richtek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation. ds4805a - 02 april 2017 www.richtek.com 9 typical application circuit bom of test board reference description manufacturer package parameter typ. unit c in 10 ? f/16v/x5r taiyo : emk212abj106kg 0805 c 10 ? f c out 22 ? f/10v/x5r taiyo : lmk212bbj226mg 0805 c 22 ? f l1 0.47h, ? 20% toko : dfe2520f - r47m 2520 l 0.47 ? h dcr (series r) 29 m ? v i n r t 4 8 0 5 a v o u t l x v s e l e n a g n d p g n d a 3 c 3 , c 4 1 0 f c i n 0 . 4 7 h + - b 1 a 1 n b y p c 1 b 3 , b 4 2 2 f x 2 c o u t d 1 d 2 , d 3 , d 4 s c l b 2 s d a c 2 l 1 p g o o d a 2 t o p u l l h i g h v o l t a g e t o p u l l h i g h v o l t a g e 1 k ? 1 k ? 1 m ?
rt4805a copyright ? 201 7 richtek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation. www.richtek.com ds4805a - 02 april 2017 10 typical operating characteristics efficiency vs. load current 70 75 80 85 90 95 100 0.001 0.01 0.1 1 10 load current (a) efficiency (%) v in = 2.5v v in = 2.7v v in = 3v v in = 3.3v v out = 3.4v, i load = 1ma to 2a efficiency vs. load current 70 75 80 85 90 95 100 0.1 1 10 load current (a) efficiency (%) v in = 2.5v v in = 2.7v v in = 3v v in = 3.3v v out = 3.4v, i load = 100ma to 2a efficiency vs. load current 70 75 80 85 90 95 100 0.001 0.01 0.1 1 10 load current (a) efficiency (%) v in = 2.5v v in = 2.7v v in = 3v v out = 3.2v, i load = 1ma to 2a efficiency vs. load current 70 75 80 85 90 95 100 0.1 1 10 load current (a) efficiency (%) v in = 2.5v v in = 2.7v v in = 3v v out = 3.2v, i load = 100ma to 2a output regulation vs. load current -0.02 -0.01 0 0.01 0.02 0.03 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 load current (a) output regulation (%) v out = 3.4v, i load = 0a to 2a v in = 2.5v v in = 2.8v v in = 3v v in = 3.3v output regulation vs. load current -0.02 -0.01 0 0.01 0.02 0.03 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 load current (a) output regulation (%) v in = 2.5v v in = 2.8v v in = 3v v out = 3.2v, i load = 0a to 2a
rt4805a copyright ? 201 7 richtek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation. ds4805a - 02 april 2017 www.richtek.com 11 output ripple vs. load current 0 10 20 30 40 50 60 70 0 500 1000 1500 2000 load current (ma) output rippie (mv) v out = 3.4v, i load = 0a to 2a v in = 2.5v v in = 2.7v v in = 3v v in = 3.3v output ripple vs. load current 0 10 20 30 40 50 60 70 0 500 1000 1500 2000 load current (ma) output rippie (mv) v out = 3.2v, i load = 0a to 2a v in = 2.5v v in = 2.7v v in = 3v v in = 3.1v maximum load current vs. input voltage 0.0 1.0 2.0 3.0 4.0 5.0 2.5 2.7 2.9 3.1 3.3 3.5 3.7 input voltage (v) maximum load current (a) 1 v in = 2.5v to 3.7v, v out = 3.4v v in = 3v, v out = 3.4v , load = 50 ? pgood (5v/ div ) en (5v/ div ) i lx (1a/ div ) v out (2v/ div ) time (100 ? s/ div ) startup pgood (5v/ div ) en (5v/ div ) i lx (1a/ div ) v out (2v/ div ) time (100 ? s/ div ) startup v in = 3v, v out = 3.2v , load = 50 ? v out (2v/ div ) i lx (2a/ div ) pgood (5v/ div ) time (1ms/ div ) overload protection v in = 3v, v out = 3.4v
rt4805a copyright ? 201 7 richtek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation. www.richtek.com ds4805a - 02 april 2017 12 v out (2v/ div ) i lx (2a/ div ) pgood (5v/ div ) time (1ms/ div ) overload protection v in = 3v, v out = 3.2v i out ( 200ma/ div ) v out ( 200mv/ div ) time (25 ? s/ div ) load transient v in = 3v, v out = 3.4v , i load = 100ma to 500ma i out (200ma/ div ) v out (200mv/ div ) time (25 ? s/ div ) load transient v in = 3v, v out = 3.2v , i load = 100ma to 500ma v out (500mv/ div ) i out ( 2a/ div ) pgood (5v/ div ) time (50 ? s/ div ) transient overload v in = 3v, v out = 3.4v , i load = 1a to 3.8a v out (500mv/ div ) i out (2a/ div ) pgood (5v/ div ) time (50 ? s/ div ) transient overload v in = 3v, v out = 3.2v , i load = 1a to 3.8a
rt4805a copyright ? 201 7 richtek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation. ds4805a - 02 april 2017 www.richtek.com 13 application information enable the device can be enabled or disabled by the en pin. when the en pin is higher than the threshold of logic - high, the device starts operati ng with soft - start. once the en pin is set at low, the device will be shut down. in shutdown mode, the converter stops switching, internal control circuitry is turned off, and the load is disconnected from the input. this also means that the output voltage c an drop below the input voltage during shutdown. soft - start state after the successful completion of the lin state (v out v in ? 300mv). during soft - start state, v out is ramped up by boost internal loop. if v out fails to reach target value during the soft - start period for more than 2ms, a fault condition is declared. output voltage setting user can select the output voltage level by vsel and i2c. if the vse l pulled low, the default is 3.6 v, and if it pulled high, the default is 3.7 v. the output voltage ran ge is from 2.85v to 4.4v. power save mode psm is the way to improve efficiency at light load. w hen the output voltage is low er than a set threshold voltage , the converter will operate i n psm . it raises the output voltage with several pulses until the loop exits psm. under - voltage lockout the under - voltage lockout circuit prevents the device from operating incorrectly at low input voltages. it prevents the converter from turning on the power switches under undefined conditions and prevents the battery from deep discharge. vin voltage must be greater than 1. 7 v to enable the converter. during operation, if vin voltage drops below 1. 6 v, the converter is disabled until the supply exceeds the uvlo rising threshold. the rt 4805a automatically restarts if the input voltage recovers to the input voltage uvlo high level. thermal shutdown the device has a built - in temperature sensor which monitors the internal junction temperature. if the temperature exceeds the threshold, the device stops operating. as soon as the ic t emperature has decreased below the threshold with a hysteresis, it starts operating again. the built - in hysteresis is designed to avoid unstable operation at ic temperatures near the over temperature threshold. inductor selection the recommended nominal inductance value is 1.5 ? h . it is recommended to use inductor with dc saturation current 3500 ma input capacitor selection at least a 10 ? f input capacitor is recommended to improve transient behavior of the regulator and emi behavio r of the total power supply circuit for lx . and a t least a 1 ? f ceramic capacitor placed as close as possible to the vin and gnd pins of the ic is recommended. output capac i tor selection at least 22 ? f x 2 capacitors is recommended to improve v out ripple. o utput voltage ripple is inversely proportional to c out . output capacitor is selected according to output ripple which is calculated as : load ripple(p p) on out in on sw sw out in load out sw out ripple(p p) sw sw i vt c and v t t d t 1 v therefore : vi c t 1 vv and 1 t f ? ? ?? ?? ? ? ? ? ? ?? ?? ?? ? ? ? ? ?? ?? ?
rt4805a copyright ? 201 7 richtek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation. www.richtek.com ds4805a - 02 april 2017 14 the maximum v ripple occurs when v in is at minimum and i load is at maximum. output discharge function with the en pin set to low, the vout pin is internally connected to gnd by an internal discharge n - mosfet switch. this feature prevents residual charge voltages on capacitor connected to vout pins, which may impact proper power up of the system. current limit the rt 4805a employs a valley - current limit detection scheme to sense inductor current during the off - time. when the loading current is increased such that the loading is above the valley current limit threshold, the off - time is incr eased until the current is decreased to valley - current threshold. next on - time begins after current is decreased to valley - current threshold. on - time is decided by (v out ?? v in ) / v out ratio. the output voltage decreases when further loading current increas e. as the following figure shown, the current limit function is implemented by the scheme. figure 4 . inductor currents in current limit operation protection the rt 4805a features some protections, such as ocp, ovp, uvp and otp. as the table shown, it is described the protection actions. protection type thr eshold refer to electrical spec. protection method shut down delay time reset method ocp il > 4a turn on ug until il < 4a 2ms after fault 1ms ovp vin > 6v turn off ug, lg, byp_mos no delay vin < 5.7v uvp vin <1.6v turn off ug, lg, byp_mos no delay vin> 1.7v otp temp > 160 o c turn off ug, lg, byp_mos no delay otp hysteresis = 20 o c v a l l e y c u r r e n t l i m i t i i n ( d c ) d i l i n d u c t o r c u r r e n t f i i n ( d c ) v d in i = l lf d?
rt4805a copyright ? 201 7 richtek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation. ds4805a - 02 april 2017 www.richtek.com 15 register table lists [ slave address = 1110101 (0x75 ) ] name address description config 0x01 mode control & spread modulation control voutfloor 0x02 output voltage selection vout roof 0x03 output voltage selection ilimset 0x04 set current limit & soft - start current limit status 0x05 read ic status i 2 c interface the rt 4805a i 2 c slave address is 1110101 (7bits). the i 2 c interface supports fast mode (bit rate up to 400kb/s). the write or read bit stream (n ? 1) is shown below : d r i v e n b y m a s t e r , d r i v e n b y s l a v e ( r t 4 8 0 5 a ) , s t a r t , r e p e a t s t a r t s t o p , s s r p w r i t e n b y t e s s s l a v e a d d r e s s 0 a r e g i s t e r a d d r e s s a m s b d a t a 1 l s b a m s b d a t a 2 l s b a d a t a f o r a d d r e s s = m + n - 1 a s s u m e a d d r e s s = m d a t a f o r a d d r e s s = m d a t a f o r a d d r e s s = m + 1 r / w r e a d n b y t e s r / w a s s u m e a d d r e s s = m d a t a f o r a d d r e s s = m d a t a f o r a d d r e s s = m + n - 1 d a t a f o r a d d r e s s = m + 1 s s l a v e a d d r e s s 0 a r e g i s t e r a d d r e s s s r a s l a v e a d d r e s s 1 a a m s b d a t a 1 l s b m s b d a t a 2 l s b a m s b d a t a n l s b a p m s b d a t a n l s b a p
rt4805a copyright ? 201 7 richtek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation. www.richtek.com ds4805a - 02 april 2017 16 offset 0x01 config bits 7 6 5 4 3 2 1 0 name reset enable<1> enable<0> reserved pg config. ssfm mode_ctrl <1> mode_ctrl <0> reset 0 0 0 0 1 0 0 1 type rw rw rw rw rw rw rw rw offset 0x02 voutfloor bits 7 6 5 4 3 2 1 0 name reserved reserved reserved vsel<4> vsel<3> vsel<2> vsel<1> vsel<0> reset 0 0 0 0 1 1 1 1 type rw rw rw rw rw rw rw rw offset 0x03 voutroof bits 7 6 5 4 3 2 1 0 name reserved reserved reserved vsel<4> vsel<3> vsel<2> vsel<1> vsel<0> reset 0 0 0 1 0 0 0 1 type rw rw rw rw rw rw rw rw offset 0x04 ilimset bits 7 6 5 4 3 2 1 0 name reserved reserved ilim_off soft_start ilim<3> ilim<2> ilim<1> ilim<0> reset 0 0 0 1 1 1 0 1 type rw rw rw rw rw rw rw rw offset 0x05 status bits 7 6 5 4 3 2 1 0 name tsd hotdie dcdcmode opmode ilimpt ilimbst fault pgood reset 0 0 0 0 0 0 0 0 type ro ro ro ro ro ro ro ro
rt4805a copyright ? 201 7 richtek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation. ds4805a - 02 april 2017 www.richtek.com 17 name function addr config mode control & spread modulation control 0x0 1 bit mode name reset description 7 r/w reset 0 0 : disable id detection function 1 : enable id detection function [6 : 5] r/w enable[1 : 0] 0 00 : device operation follows hardware control signal (refer to table 1 ) 01 : device operation in auto transition mode (boost/bypass) regardless of the n byp control signal (en = 1) 10 : device is forced in pass - through mode regardless of the nbyp control signal (en = 1) 11 : device is in shutdown mode. the output voltage is reduced to a minimum value (v in ? v out ? 3.6v) regardless of the nbyp control signal (en = 1) 4 r /w reserved 0 3 r /w pg config. 1 0 : pg pin = h, it is not allowed. pg pin = l, it is shut down. 1 : pg pin is for power good indication. 2 r /w ssfm 0 0 : spread spectrum modulation is disabled. 1 : spread spectrum modulation is enabled in pwm mode. [1 : 0] r/w mode_ctrl[1 : 0] 01 00 : not allowed. 01 : pfm with automatic transition into pwm operation. 10 : forced pwm operation. 11 : pfm with automatic transition into pwm operation (vsel = l), forced pwm operation (vsel = h). name function addr voutfloor output voltage selection 0x0 2 bit mode name reset description [7 : 5] r/w reserved 000 [4 : 0] r /w vout[4 : 0] 0 1 111 00000 : v out = 2.85v 00001 : v out = 2.9v 00010 : v out = 2.95v 00011 : v out = 3v 00100 : v out = 3.05v 0 1 111 : v out = 3. 6 v (default) 11111 : v out = 4.4 v
rt4805a copyright ? 201 7 richtek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation. www.richtek.com ds4805a - 02 april 2017 18 name function addr voutroof output voltage selection 0x0 3 bit mode name reset description [7 : 5] r/w reserved 000 [4 : 0] r /w vout[4 : 0] 10001 00000 : v out = 2.85v 00001 : v out = 2.9v 00010 : v out = 2.95v 00011 : v out = 3v 00100 : v out = 3.05v 10 0 0 1 : v out = 3. 7 v (default) 11111 : v out = 4.4 v name function addr ilimset set current limit & softstart current limit 0x0 4 bit mode name reset description [7 : 6] r/w reserved 00 5 r /w ilim_off 0 0 : current limit enabled 1 : current limit disabled 4 r/w soft - start 1 0 : boost soft - start current is limited per ilim bit settings 1 : boost soft - start current is limited to ca. 1250ma inductor valley current [3 : 0] r/w ilim[3 : 0] 1101 1000 : 1500ma 1001 : 2000ma 1010 : 2500ma 1011 : 3000ma 1100 : 3500ma 1101 : 4000ma (default) 1110 : 4500ma 1111 : 5000ma
rt4805a copyright ? 201 7 richtek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation. ds4805a - 02 april 2017 www.richtek.com 19 name function addr status read ic status 0x0 5 bit mode name reset description 7 r tsd 0 0 : normal operation. 1 : thermal shutdown tripped. the flag is reset after readout. 6 r hotdie 0 0 : t j < 115 c. 1 : t j > 115 c. 5 r dcdcmode 0 0 : device operates in pfm mode. 1 : device operates in pwm mode. 4 r opmode 0 0 : device operates in pass - through mode. 1 : device operates in dc/dc mode. 3 r ilimpt 0 0 : normal operation. 1 : i ndicates that the bypass fet current limit has triggered. this flag is reset after readout. 2 r ilimbst 0 0 : normal operation. 1 : i ndicates that the average input current limit has triggered for 1.5ms in dc/dc boost mode. this flag is reset after readout. 1 r fault 0 0 : normal operation. 1 : i ndicates that a fault condition ha s occurred. this flag is reset after readout. 0 r pgood 0 0 : i ndicates the output voltage is out of regulation. 1 : i ndicates the output voltage is within its nominal range. this bit is set if the converter is forced in pass - through mode.
rt4805a copyright ? 201 7 richtek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation. www.richtek.com ds4805a - 02 april 2017 20 thermal considerations for continuous operation, do not exceed absolute maximum junction temperature. the maximum power dissipation depends on the thermal resistance of the ic package, pcb layout, rate of surrounding airflow, and difference between junction and ambient temperatu re. the maximum power dissipation can be calculated by the following formula : p d(max) = (t j(max) ? t a ) / ? ja where t j(max) is the maximum junction temperature, t a is the ambient temperature, and ? ja is the junction to ambient thermal resistance. for recommended operating condition specifications, the maximum junction temperature is 125 ? c. the junction to ambient thermal resistance, ? ja , is layout dependent. for wl - csp - 16b 1.6 7 x1.6 7 (bsc) package, the thermal resistance, ? ja , is 47.7 on a standard jede c 51 - 7 four - layer thermal test board. the maximum power dissipation at t a = 25 ? c can be calculated by the following formula : p d(max) = (125 ? c ? 25 ? c) / ( 47.7 ) = 2.09 w for wl - csp - 16b 1.6 7 x1.6 7 (bsc) package the maximum power dissipation depends on th e operating ambient temperature for fixed t j(max) and thermal resistance, ? ja . the derating curve in figure 5 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation. figure 5 . derating curve of maximum power dissipation layout consideration the pcb layout is an important step to maintain the high performance of the rt 4805a . both the high current and the fast switching nodes demand full attention to the pcb layout to save the robustness of the rt 4805a through the pcb layout. improper layout might show the symptoms of poor line or load regulation, ground and output voltage shifts, stability issues, unsatisfying emi behavior or worsened efficiency. for the best performance of the rt 4805a , the following pcb layout guidelines must be strictly followed. ? place the input and output capacitors as close as possible to the input and output pins respectively for good filtering. ? for thermal consider, it needed to maximize the pure area for the power stage area besides the lx. 0.0 0.5 1.0 1.5 2.0 2.5 0 25 50 75 100 125 ambient temperature (c) maximum power dissipation (w) 1 four-layer pcb
rt4805a copyright ? 201 7 richtek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation. ds4805a - 02 april 2017 www.richtek.com 21 figure 6 . pcb layout guide a 1 a 2 a 3 a 4 b 1 b 2 b 3 b 4 c 1 c 2 c 3 c 4 d 1 d 2 d 3 d 4 c o u t c o u t c i n c o u t v o u t v i n l l x g n d
rt4805a copyright ? 201 7 richtek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation. www.richtek.com ds4805a - 02 april 2017 22 outline dimension symbol dimensions in millimeters dimensions in inches min max min max a 0.500 0.600 0.020 0.024 a1 0.170 0.230 0.007 0.009 b 0.240 0.300 0.009 0.012 d 1.620 1.720 0.064 0.068 d1 1.200 0.047 e 1.620 1.720 0.064 0.068 e1 1.200 0.047 e 0.400 0.016 wl - csp - 16b 1.67x1.67 (bsc) richtek technology corporation 14f, no. 8, tai yuen 1 st street, chupei city hsinchu, taiwan, r.o.c. tel: (8863)5526789 richtek products are sold by description only. richtek reserves the right to change the circuitry and/or specifications without notice at any time. customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is curre nt and complete. ric htek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a richtek product. information furnished by richtek is believed to be accurate and reliable. however, no responsibility is assumed by richtek or its subsid iaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of richtek or its su bsidiaries.

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