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-. the bu5281xx are input ground sense, output full swing, low voltage operation, low input offset volta ge and high speed operational amplifiers. it has a mosfet input with a small input bias current of 1pa(typ), suitable for sensor amplifier applications. /# low operating supply voltage high large signal voltage gain low input offset voltage low input bias current high slew rate . buffer active filter sensor amplifier mobile equipment 01 .. operating supply voltage (single supply): +1.8v to +5.5v slew rate: 2.0v/s temperature range: bu5281g 40c to +85c BU5281SG 40c to +105c input offset voltage: 2.5mv(max) input bias current: 1pa (typ) .2% w(typ) x d(typ) x h(max) ssop5 2.90mm x 2.80mm x 1.25mm & .3. product structure silicon monolithic integrated circuit this product is not designed protection against rad ioactive rays. figure 1. simplified schematic vdd vss in+ v bias in out ' ) . v bias downloaded from: http:///
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'%# bu5281g, BU5281SG : ssop5 pin no. pin name 1 in+ 2 vss 3 in 4 out 5 vdd package ssop5 bu5281g BU5281SG &% " b u 5 2 8 1 x x t r part number bu5281g BU5281SG package g:ssop5 packaging and forming specification tr: embossed tape and reel # .2% &4 5#4 40c to +85c ssop5 reel of 3000 bu5281gtr 40c to +105c ssop5 reel of 3000 BU5281SGtr 1 + 2 3 4 5 vss in in+ vdd out downloaded from: http:///
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4# (6# % (t a =25c) ratings parameter symbol bu5281g BU5281SG unit supply voltage vdd vss +7 v power dissipation p d 0.54 (note 1,2) w differential input voltage (note 3) v id vdd vss v input commonmode voltage range v icm (vss 0.3) to vdd + 0.3 v input current (note 4) i i 10 ma operating supply voltage v opr +1.8 to +5.5 v operating temperature t opr 40 to +85 40 to +105 c storage temperature t stg 55 to +125 c maximum junction temperature t jmax +125 c (note 1) to use at temperature above t a 25 c reduce 5.4mw. (note 2) mounted on a fr4 glass epoxy pcb(70mm70mm1 .6mm). (note 3) the voltage difference between inverting inpu t and noninverting input is the differential input voltage. then input terminal voltage is set to more than vss. (note 4) an excessive input current will flow when inpu t voltages of more than vdd+0.6v or lesser than vss0. 6v are applied. the input current can be set to less than the rated cur rent by adding a limiting resistor. caution: operating the ic over the absolute maximum ratings may damage the ic. the damage can either be a short circuit between pins or an open circuit between pins and the internal circuitry. theref ore, it is important to consider circuit protection meas ures, such as adding a fuse, in case the ic is operated over the absolute maximum ratings. .. '3.. bu5281g, BU5281SG (unless otherwise specified vdd=+3v , vss=0v, t a =25c) limits parameter symbol temperature range min. typ. max. unit condition input offset voltage (note 5) v io 25c 0.1 2.5 mv input offset voltage drift (note 5) v io / t 0.8 v/c input offset current (note 5) i io 25c 1 pa input bias current (note 5) i b 25c 1 pa 25c 750 1000 supply current (note 6) i dd full range 1200 a r l = a v =0db, in+=0.9v maximum output voltage (high) v oh 25c vdd0.1 v r l =10k maximum output voltage (low) v ol 25c vss+0.1 v r l =10k large signal voltage gain a v 25c 70 110 db r l =10k input commonmode voltage range v icm 25c 0 1.8 v vss to vdd 1.2v commonmode rejection ratio cmrr 25c 45 60 db power supply rejection ratio psrr 25c 60 80 db output source current (note 7) i source 25c 5 8 ma out=vdd0.4v output sink current (note 7) i sink 25c 10 16 ma out=vss+0.4v slew rate sr 25c 2.0 v/s c l =25pf unity gain frequency f t 25c 3 mhz c l =25pf, a v =40db phase margin 25c 40 deg c l =25pf, a v =40db 18 hz nv/ a v =40db, f=1khz input referred noise voltage v n 25c 3.2 vrms a v =40db, dinaudio total harmonic distortion + noise thd+n 25c 0.003 % out=0.4v pp , f=1khz (note 5) absolute value (note 6) full range bu5281: t a =40c to +85c bu5281s: t a =40c to +105c (note 7) under the high temperature environment, co nsider the power dissipation of ic when selecting the ou tput current. when the terminal short circuits are continuously outpu t, the output current is reduced to climb to the tempe rature inside ic . downloaded from: http:///
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-. .. '3.. described below are descriptions of the relevant elec trical terms used in this datasheet. items and symbol s used are also shown. note that item name and symbol and their mean ing may differ from those on another manufacturers do cument or general document. 4# 6# % absolute maximum rating items indicate the conditio n which must not be exceeded. application of voltag e in excess of absolute maximum rating or use out of absolute maximum rated temperature environment may cause deterioration of characteristics. (1) supply voltage (vdd/vss) indicates the maximum voltage that can be applied b etween the vdd terminal and vss terminal without deterioration or destruction of characteristics of intern al circuit. (2) differential input voltage (v id ) indicates the maximum voltage that can be applied b etween noninverting and inverting terminals without da maging the ic. (3) input commonmode voltage range (v icm ) indicates the maximum voltage that can be applied t o the noninverting and inverting terminals without de terioration or destruction of electrical characteristics. input commonmode voltage range of the maximum ratings do es not assure normal operation of ic. for normal operation, use t he ic within the input commonmode voltage range ch aracteristics. (4) power dissipation (p d ) indicates the power that can be consumed by the ic when mounted on a specific board at the ambient tem perature 25c (normal temperature). as for package product, p d is determined by the temperature that can be permitte d by the ic in the package (maximum junction temperature) and the therm al resistance of the package. .. .3.. (1) input offset voltage (v io ) indicates the voltage difference between noninverti ng terminal and inverting terminals. it can be transla ted into the input voltage difference required for setting the outp ut voltage at 0 v. (2) input offset voltage drift ( v io / t) denotes the ratio of the input offset voltage fluctu ation to the ambient temperature fluctuation. (3) input offset current (i io ) indicates the difference of input bias current betwee n the noninverting and inverting terminals. (4) input bias current (i b ) indicates the current that flows into or out of the in put terminal. it is defined by the average of input b ias currents at the noninverting and inverting terminals. (5) supply current (i dd ) indicates the current that flows within the ic under s pecified noload conditions. (6) maximum output voltage(high) / maximum output volta ge(low) (voh/vol) indicates the voltage range of the output under speci fied load condition. it is typically divided into m aximum output voltage high and low. maximum output voltage high i ndicates the upper limit of output voltage. maximum output voltage low indicates the lower limit. (7) large signal voltage gain (a v ) indicates the amplifying rate (gain) of output voltag e against the voltage difference between noninvertin g terminal and inverting terminal. it is normally the amplifyin g rate (gain) with reference to dc voltage. a v = (output voltage) / (differential input voltage) (8) input commonmode voltage range (v icm ) indicates the input voltage range where ic normally o perates. (9) commonmode rejection ratio (cmrr) indicates the ratio of fluctuation of input offset v oltage when the input common mode voltage is change d. it is normally the fluctuation of dc. cmrr = (change of input commonmode voltage)/(input of fset fluctuation) (10) power supply rejection ratio (psrr) indicates the ratio of fluctuation of input offset voltage when supply voltage is changed. it is normally the fluctuation of dc. psrr = (change of power supply voltage)/(input offset f luctuation) (11) output source current/ output sink current (i source / i sink ) the maximum current that can be output from the ic un der specific output conditions. the output source cu rrent indicates the current flowing out from the ic, and the output sink current indicates the current flowing int o the ic. (12) slew rate (sr) indicates the ratio of the change in output voltage with time when a step input signal is applied. (13) unity gain frequency (f t ) indicates a frequency where the voltage gain of operat ional amplifier is 1. (14) phase margin () indicates the margin of phase from 180 degree phase la g at unity gain frequency. downloaded from: http:///
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(15) input referred noise voltage (v n ) indicates a noise voltage generated inside the opera tional amplifier equivalent by ideal voltage source c onnected in series with input terminal. (16) total harmonic distortion + noise (thd+n) indicates the fluctuation of input offset voltage o r that of output voltage with reference to the change of output voltage of driven channel. downloaded from: http:///
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1. . '# bu5281g, BU5281SG (*) the above characteristics are measurements of t ypical sample, they are not guaranteed. bu5281g: 40c to +85 c BU5281SG: 40 c to +105 c 0.0 0.2 0.4 0.6 0.8 1.0 1 2 3 4 5 6 supply voltage [v] supply current [a] 0.0 0.2 0.4 0.6 0.8 1.0 0 25 50 75 100 125 ambient temperature [c] power dissipation [w] 0.0 0.2 0.4 0.6 0.8 1.0 0 25 50 75 100 125 ambient temperature [c] power dissipation [w] 85 figure 2. power dissipation vs ambient temperature (derating curve) figure 3. power dissipation vs ambient temperature (derating curve) figure 4. supply current vs supply voltage figure 5. supply current vs ambient temperature 40 c 25 c 85 c 105 c 1.8v 5.5v 3.0v bu5281g BU5281SG 105 0.0 0.2 0.4 0.6 0.8 1.0 50 25 0 25 50 75 100 125 ambient temperature [c] supply current [a] downloaded from: http:///
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1. . '# .#& bu5281g, BU5281SG (*) the above characteristics are measurements of t ypical sample, they are not guaranteed. bu5281g: 40c to +85 c BU5281SG: 40 c to +105 c 0 1 2 3 4 5 6 1 2 3 4 5 6 supply voltage [v] maximum output voltage (high) [v] 0 5 10 15 20 1 2 3 4 5 6 supply voltage [v] maximum output voltage (low) [mv] 0 1 2 3 4 5 6 50 25 0 25 50 75 100 125 ambient temperature [c] maximum output voltage (high) [v] 0 5 10 15 20 50 25 0 25 50 75 100 125 ambient temperature [c] maximum output voltage (low) [mv] figure 8. maximum output voltage (low) vs supply voltage (r l =10k) figure 6. maximum output voltage (high) vs supply voltage (r l =10k) figure 7. maximum output voltage (high) vs ambient temperature (r l =10k) figure 9. maximum output voltage (low) vs ambient temperature (r l =10k) 40 c 25 c 85 c 105 c 1.8v 5.5v 3.0v 40 c 25 c 85 c 105 c 1.8v 5.5v 3.0v downloaded from: http:///
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figure 11. output source current vs ambient temperature (out=vdd0.4v) 1. . '# .#& bu5281g, BU5281SG (*) the above characteristics are measurements of t ypical sample, they are not guaranteed. bu5281g: 40c to +85 c BU5281SG: 40 c to +105 c 0 10 20 30 40 50 25 0 25 50 75 100 125 ambient temperature [c] output source current [ma] 0 10 20 30 40 0.0 0.5 1.0 1.5 2.0 2.5 3.0 output voltage [v] output source current [ma] 0 20 40 60 80 50 25 0 25 50 75 100 125 ambient temperature [c] output sink current [ma] 0 20 40 60 80 0.0 0.5 1.0 1.5 2.0 2.5 3.0 output voltage [v] output sink current [ma] figure 13. output sink current vs ambient temperature (out=vss+0.4v) figure 12. output sink current vs output voltage (vdd=3v) figure 10. output source current vs output voltage (vdd=3v) 40 c 25 c 85 c 105 c 1.8v 5.5v 3.0v 40 c 25 c 85 c 105 c 5.5v 1.8v 3.0v downloaded from: http:///
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1. . '# .#& bu5281g, BU5281SG (*) the above characteristics are measurements of t ypical sample, they are not guaranteed. bu5281g: 40c to +85 c BU5281SG: 40 c to +105 c 5 4 3 2 1 0 1 2 3 4 5 1 2 3 4 5 6 supply voltage [v] input offset voltage [mv] 5 4 3 2 1 0 1 2 3 4 5 50 25 0 25 50 75 100 125 ambient temperature [c] input offset voltage [mv] 5 4 3 2 1 0 1 2 3 4 5 1 0 1 2 3 input voltage [v] input offset voltage [mv] 60 80 100 120 140 160 1 2 3 4 5 6 supply voltage [v] large signal voltage gain [db] figure 14. input offset voltage vs supply voltage (v icm =vdd/2, out=vdd/2) figure 15. input offset voltage vs ambient temperature (v icm =vdd/2, out=vdd/2) figure 16. input offset voltage vs input voltage (vdd=3v) figure 17. large signal voltage gain vs supply voltage 40 c 25 c 85 c 105 c 5.5v 1.8v 3.0v 40 c 25 c 85 c 105 c 40 c 25 c 85 c 105 c downloaded from: http:///
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1. . '# .#& bu5281g, BU5281SG (*) the above characteristics are measurements of t ypical sample, they are not guaranteed. bu5281g: 40c to +85 c BU5281SG: 40 c to +105 c 60 80 100 120 140 160 50 25 0 25 50 75 100 125 ambient temperature [c] large signal voltage gain [db] 0 20 40 60 80 100 120 1 2 3 4 5 6 supply voltage [v] common mode rejection ratio [db] 0 20 40 60 80 100 120 50 25 0 25 50 75 100 125 ambient temperature [c] common mode rejection ratio [db] 0 30 60 90 120 150 50 25 0 25 50 75 100 125 ambient temperature [c] power supply rejection ratio [db] figure 18. large signal voltage gain vs ambient temperature figure 19. common mode rejection ratio vs supply voltage figure 20. common mode rejection ratio vs ambient temperature figure 21. power supply rejection ratio vs ambient temperature 5.5v 1.8v 3.0v 40 c 25 c 85 c 105 c 5.5v 1.8v 3.0v downloaded from: http:///
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1. . '# .#& bu5281g, BU5281SG (*) the above characteristics are measurements of t ypical sample, they are not guaranteed. bu5281g: 40c to +85 c BU5281SG: 40 c to +105 c 0 2 4 6 8 10 50 25 0 25 50 75 100 125 ambient temperature [c] slew rate lh [v/s] 0 2 4 6 8 10 50 25 0 25 50 75 100 125 ambient temperature [c] slew rate hl [v/s] 0 20 40 60 80 100 1.e+00 1.e+01 1.e+02 1.e+03 1.e+04 1.e+05 1.e+06 1.e+07 1.e +08 frequency [hz] voltage gain [db] 0 50 100 150 200 phase [deg] figure 22. slew rate lh vs ambient temperature figure 23. slew rate hl vs ambient temperature figure 24. voltage gain ? phase vs frequency 5.5v 1.8v 3.0v 5.5v 1.8v 3.0v 3
1 10 10 2 10 3 10 4 10 5 10 6 10 7 10 8 downloaded from: http:///
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. " 5* 3& .& ..# vdd, vss, e k , v icm unit:v parameter v f sw1 sw2 sw3 vdd vss e k v icm calculation input offset voltage v f1 on on off 3 0 1.5 1.5 1 v f2 0.5 large signal voltage gain v f3 on on on 3 0 2.5 0.9 2 v f4 0 commonmode rejection ratio (input commonmode voltage range) v f5 on on off 3 0 1.5 1.8 3 v f6 1.8 0 0.9 0 power supply rejection ratio v f7 on on off 5.5 0 0.9 0 4 calculation 1. input offset voltage (v io ) 2. large signal voltage gain (a v ) 3. commonmode rejection ration (cmrr) 4. power supply rejection ratio (psrr) figure 25 . test circuit 1 v icm r s =50 r s =50 r f =50k r i =1m r i =1m 0.015f 0.015f sw1 sw2 50k sw3 r l v rl 0.1f e k 500k 500k 1000pf v f 0.01f 15v 15v vdd vss vo v null dut |v f5 v f4 | cmrr = 20log v icm (1+r f /r s ) [db] av = 20log |v f3 v f2 | e k (1+r f /r s ) [db] psrr = 20log |v f7 v f6 | vdd (1+ r f /r s ) [db] v io = 1 + r f /r s [v] |v f1 | downloaded from: http:///
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. " .#& !.3 '& ..# sw no. sw1 sw2 sw3 sw4 sw5 sw6 sw7 sw8 sw9 sw10 sw11 sw12 supply current off off on off on off off off off off off off maximum output voltage (r l =10k) off on off off on off off on off off on off output current off on off off on off off off off on off off slew rate off off on off off off on off on off off on unity gain frequency on off off on on off off off on off off on figure 26. test circuit 2 figure 27. slew rate input and output wave vl vl vh vl vh input wave t input voltage t v output wave sr= v/ t t output voltage 90% 10% sw3 sw1 sw2 sw9 sw10 sw11 sw8 sw5 sw6 sw7 c l sw12 sw4 r1=1k r2=100k r l vss vdd out v in v in+ downloaded from: http:///
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6 '.# voltage follower inverting amplifier noninverting amplifier figure 29. inverting amplifier circuit figure 30. noninverting amplifier circuit figure 28. voltage follower circuit voltage gain is 0db. using this circuit, the output voltage (out) is confi gured to be equal to the input voltage (in). this circuit a lso stabilizes the output voltage (out) due to high inpu t impedance and low output impedance. computation for output voltage (out) is shown below. out=in for inverting amplifier, input voltage (in) is amplifi ed by a voltage gain and depends on the ratio of r1 and r2. the outofphase output voltage is shown in the next expression out=(r2/r1) ? in this circuit has input impedance equal to r1. for noninverting amplifier, input voltage (in) is ampl ified by a voltage gain, which depends on the ratio of r1 and r2. the output voltage (out) is inphase with the inpu t voltage (in) and is shown in the next expression. out=(1 + r2/r1) ? in effectively, this circuit has high input impedance s ince its input side is the same as that of the operational amplifier. out vss in vdd vss r2 vdd in out r1 r2 r1 out vss in vdd downloaded from: http:///
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! - power dissipation (total loss) indicates the power that the ic can consume at t a =25c (normal temperature). as the ic consumes power, it heats up, causing its temperature to be higher than the ambient temperature. the allowa ble temperature that the ic can accept is limited. this depends on the circuit configuration, manufacturing process, and consumable power. power dissipation is determined by the allowable temp erature within the ic (maximum junction temperature) and the thermal resistance of the package used (heat dissipat ion capability). maximum junction temperature is typi cally equal to the maximum storage temperature. the heat generated throug h the consumption of power by the ic radiates from th e mold resin or lead frame of the package. thermal resistance, represented by the symbol ja c/w, indicates this heat dissipation capability. similarly, the temperature of an ic inside its package can be estimated by thermal resistance. figure 31(a) shows the model of the thermal resistance of a package. the equation below shows how to compu te for the thermal resistance ( ja ), given the ambient temperature (t a ), maximum junction temperature (t jmax ), and power dissipation (p d ). ja = (t jmax t a ) / p d c/w ????? ( ) the derating curve in figure 31(b) indicates the power th at the ic can consume with reference to ambient tempe rature. power consumption of the ic begins to attenuate at ce rtain temperatures. this gradient is determined by th ermal resistance ( ja ), which depends on the chip size, power consumption, package, ambient temperature, package condition, wind velocity, etc. this may also vary even when the same of package is used. thermal reduction curve ind icates a reference value measured at a specified condition. fi gure 31(c) and (d) shows an example of the derating curve for bu5281g and BU5281SG. when using the unit above t a =25c, subtract the value above per c. permissible dissip ation is the value when fr4 glass epoxy board 70mm 70mm 1.6mm (copper foil area below 3%) is mounted 5.4 mw/c figure 31. thermal resistance and derating curve 0.0 0.2 0.4 0.6 0.8 1.0 0 25 50 75 100 125 ambient temperature [c] power dissipation [w] 0.0 0.2 0.4 0.6 0.8 1.0 0 25 50 75 100 125 ambient temperature [c] power dissipation [w] bu5281g BU5281SG (c) bu5281g (d) BU5281SG 85 105 ambient temperature t a [ c] chip surface temperature t j [ c] (a) thermal resistance ja =(t jmax t a )/p d c/w (b) derating curve 0 ambient temperature t a [ c] p2 p1 25 125 75 100 50 power dissipation of lsi [w] p d max t j max ja2 ja1 ja2 < ja1 power dissipation of ic downloaded from: http:///
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5 '. ! #1 connecting the power supply in reverse polarity can da mage the ic. take precautions against reverse polarity when connecting the power supply, such as mounting an ext ernal diode between the power supply and the ics pow er supply pins. ! #1 design the pcb layout pattern to provide low impedance supply lines. separate the ground and supply lines o f the digital and analog blocks to prevent noise in the g round and supply lines of the digital block from affe cting the analog block. furthermore, connect a capacitor to ground at al l power supply pins. consider the effect of temperatu re and aging on the capacitance value when using electrolyt ic capacitors.
#& $% ensure that no pins are at a voltage below that of t he ground pin at any time, even during transient cond ition.
#& 7% when using both smallsignal and largecurrent ground t races, the two ground traces should be routed separat ely but connected to a single ground at the reference point o f the application board to avoid fluctuations in the smallsignal ground caused by large currents. also ensure that the grou nd traces of external components do not cause variati ons on the ground voltage. the ground lines must be as s hort and thick as possible to reduce line impedance. + 3 '& should by any chance the power dissipation rating be exceeded the rise in temperature of the chip may res ult in deterioration of the properties of the chip. the absolu te maximum rating of the p d stated in this specification is when the ic is mounted on a 70mm x 70mm x 1.6mm glass ep oxy board. in case of exceeding this absolute maximu m rating, increase the board size and copper area to prev ent exceeding the p d rating. .&& % '& these conditions represent a range within which the e xpected characteristics of the ic can be approximately obtained. the electrical characteristics are guaranteed under th e conditions of each parameter. 8 "#3 '# when power is first supplied to the ic, it is possib le that the internal logic may be unstable and inru sh current may flow instantaneously due to the internal powering seq uence and delays, especially if the ic has more tha n one power supply. therefore, give special consideration to power coupling capacitance, power wiring, width of ground w iring, and routing of connections. , *& % .%. /& operating the ic in the presence of a strong electroma gnetic field may cause the ic to malfunction. 9 % . )& when testing the ic on an application board, connect ing a capacitor directly to a lowimpedance output pin may subject the ic to stress. always discharge capacitor s completely after each process or step. the ics po wer supply should always be turned off completely before connec ting or removing it from the test setup during the ins pection process. to prevent damage from static discharge, groun d the ic during assembly and use similar precautions during transport and storage. " 3 & (#% ensure that the direction and position are correct when mounting the ic on the pcb. incorrect mounting may resu lt in damaging the ic. avoid nearby pins being shorted to each other especially to ground, power supply and out put pin. interpin shorts could be due to many reasons such as m etal particles, water droplets (in very humid environme nt) and unintentional solder bridge deposited in between pins during assembly to name a few. *#& "# input pins of an ic are often connected to the gate of a mos transistor. the gate has extremely high impe dance and extremely low capacitance. if left unconnected, the electric field from the outside can easily charge it. the small charge acquired in this way is enough to produce a sig nificant effect on the conduction through the transi stor and cause unexpected operation of the ic. so unless otherw ise specified, unused input pins should be connecte d to the power supply or ground line. downloaded from: http:///
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5 : .#& %&% 3 "# 3 "' in the construction of this ic, pn junctions are ine vitably formed creating parasitic diodes or transistors. the operation of these parasitic elements can result in mu tual interference among circuits, operational faults, or physical damage. therefore, conditions which cause these paras itic elements to operate, such as applying a voltage to an input pin lower than the ground voltage should be av oided. furthermore, do not apply a voltage to the inp ut pins when no power supply voltage is applied to the ic. even if the power supply voltage is applied, make sure that the input pins have voltages within the values specified in the el ectrical characteristics of this ic. "# $% applying vdd+0.3v to the input terminal is possible wi thout causing deterioration of the electrical characte ristics or destruction, regardless of the supply voltage. howeve r, this does not ensure normal circuit operation. ple ase note that the circuit operates normally only when the inpu t voltage is within the common mode input voltage ra nge of the electric characteristics. ! #1;%<&#= the operational amplifiers operate when the voltage su pplied is between vdd and vss. therefore, the single supp ly operational amplifiers can be used as dual supply ope rational amplifiers as well. + ## .. if a large capacitor is connected between the output pin and vss pin, current from the charged capacitor will flow into the output pin and may destroy the ic when the vdd p in is shorted to ground or pulled down to 0v. use a ca pacitor smaller than 0.1f between output pin and vss pin. . 41 ## .. please pay attention to the oscillation by output c apacitor and in designing an application of negativ e feedback loop circuit with these ics. 8 .3 * be careful of input voltage that exceed the vdd and vss. when cmos device have sometimes occur latch up and protect the ic from abnormaly noise. downloaded from: http:///
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31. -> & " package name ssop5 downloaded from: http:///
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e mie ? 2 b2 e (2% -% product name package type marking bu5281g d4 BU5281SG ssop5 e9 & - all dimensions in mm pkg land pitch e land space mie land length R? 2 land width b2 ssop5 0.95 2.4 1.0 0.6 ?1 date revision changes 4.sep.2013 001 new release part number marking ssop5(top view) lot number ssop5 downloaded from: http:///
datasheet d a t a s h e e t notice - ge rev.002 ? 2014 rohm co., ltd. all rights reserved. notice precaution on using rohm products 1. our products are designed and manufac tured for application in ordinary elec tronic equipments (such as av equipment, oa equipment, telecommunication equipment, home electroni c appliances, amusement equipment, etc.). if you intend to use our products in devices requiring ex tremely high reliability (such as medical equipment (note 1) , transport equipment, traffic equipment, aircraft/spacecra ft, nuclear power controllers, fuel c ontrollers, car equipment including car accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or serious damage to property (specific applications), please consult with the rohm sale s representative in advance. unless otherwise agreed in writing by rohm in advance, rohm shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any ro hms products for specific applications. (note1) medical equipment classification of the specific applications japan usa eu china class class class b class class | class 2. rohm designs and manufactures its products subject to strict quality control system. however, semiconductor products can fail or malfunction at a certain rate. please be sure to implement, at your own responsibilities, adequate safety measures including but not limited to fail-safe desi gn against the physical injury, damage to any property, which a failure or malfunction of our products may cause. the following are examples of safety measures: [a] installation of protection circuits or other protective devices to improve system safety [b] installation of redundant circuits to reduce the impact of single or multiple circuit failure 3. our products are designed and manufactured for use under standard conditions and not under any special or extraordinary environments or conditio ns, as exemplified below. accordin gly, rohm shall not be in any way responsible or liable for any damages, expenses or losses arising from the use of an y rohms products under any special or extraordinary environments or conditions. if you intend to use our products under any special or extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of product performance, reliability, etc, prior to use, must be necessary: [a] use of our products in any types of liquid, incl uding water, oils, chemicals, and organic solvents [b] use of our products outdoors or in places where the products are exposed to direct sunlight or dust [c] use of our products in places where the products ar e exposed to sea wind or corrosive gases, including cl 2 , h 2 s, nh 3 , so 2 , and no 2 [d] use of our products in places where the products are exposed to static electricity or electromagnetic waves [e] use of our products in proximity to heat-producing components, plastic cords, or other flammable items [f] sealing or coating our products with resin or other coating materials [g] use of our products without cleaning residue of flux (ev en if you use no-clean type fluxes, cleaning residue of flux is recommended); or washing our products by using water or water-soluble cleaning agents for cleaning residue after soldering [h] use of the products in places subject to dew condensation 4. the products are not subjec t to radiation-proof design. 5. please verify and confirm characteristics of the final or mounted products in using the products. 6. in particular, if a transient load (a large amount of load applied in a short per iod of time, such as pulse. is applied, confirmation of performance characteristics after on-boar d mounting is strongly recomm ended. avoid applying power exceeding normal rated power; exceeding the power rating under steady-state loading c ondition may negatively affect product performance and reliability. 7. de-rate power dissipation (pd) depending on ambient temper ature (ta). when used in seal ed area, confirm the actual ambient temperature. 8. confirm that operation temperat ure is within the specified range described in the product specification. 9. rohm shall not be in any way responsible or liable for fa ilure induced under deviant condi tion from what is defined in this document. precaution for mounting / circuit board design 1. when a highly active halogenous (chlori ne, bromine, etc.) flux is used, the resi due of flux may negatively affect product performance and reliability. 2. in principle, the reflow soldering method must be used; if flow soldering met hod is preferred, please consult with the rohm representative in advance. for details, please refer to rohm mounting specification downloaded from: http:///
datasheet d a t a s h e e t notice - ge rev.002 ? 2014 rohm co., ltd. all rights reserved. precautions regarding application examples and external circuits 1. if change is made to the constant of an external circuit, pl ease allow a sufficient margin considering variations of the characteristics of the products and external components, including transient characteri stics, as well as static characteristics. 2. you agree that application notes, re ference designs, and associated data and in formation contained in this document are presented only as guidance for products use. theref ore, in case you use such information, you are solely responsible for it and you must exercise your own independent verification and judgment in the use of such information contained in this document. rohm shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of such information. precaution for electrostatic this product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. please take proper caution in your manufacturing process and storage so that voltage exceeding t he products maximum rating will not be applied to products. please take special care under dry condit ion (e.g. grounding of human body / equipment / solder iron, isolation from charged objects, se tting of ionizer, friction prevention and temperature / humidity control). precaution for storage / transportation 1. product performance and soldered connections may deteriora te if the products are stor ed in the places where: [a] the products are exposed to sea winds or corros ive gases, including cl2, h2s, nh3, so2, and no2 [b] the temperature or humidity exceeds those recommended by rohm [c] the products are exposed to di rect sunshine or condensation [d] the products are exposed to high electrostatic 2. even under rohm recommended storage c ondition, solderability of products out of recommended storage time period may be degraded. it is strongly recommended to confirm sol derability before using products of which storage time is exceeding the recommended storage time period. 3. store / transport cartons in the co rrect direction, which is indicated on a carton with a symbol. otherwise bent leads may occur due to excessive stress applied when dropping of a carton. 4. use products within the specified time after opening a humidity barrier bag. baking is required before using products of which storage time is exceeding the recommended storage time period. precaution for product label qr code printed on rohm products label is for rohms internal use only. precaution for disposition when disposing products please dispose them proper ly using an authorized industry waste company. precaution for foreign exchange and foreign trade act since our products might fall under cont rolled goods prescribed by the applicable foreign exchange and foreign trade act, please consult with rohm representative in case of export. precaution regarding intellectual property rights 1. all information and data including but not limited to application example contained in this document is for reference only. rohm does not warrant that foregoi ng information or data will not infringe any intellectual property rights or any other rights of any third party regarding such information or data. rohm shall not be in any way responsible or liable for infringement of any intellectual property rights or ot her damages arising from use of such information or data.: 2. no license, expressly or implied, is granted hereby under any intellectual property rights or other rights of rohm or any third parties with respect to the information contained in this document. other precaution 1. this document may not be reprinted or reproduced, in whol e or in part, without prior written consent of rohm. 2. the products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written consent of rohm. 3. in no event shall you use in any wa y whatsoever the products and the related technical information contained in the products or this document for any military purposes, incl uding but not limited to, the development of mass-destruction weapons. 4. the proper names of companies or products described in this document are trademarks or registered trademarks of rohm, its affiliated companies or third parties. downloaded from: http:///
datasheet datasheet notice C we rev.001 ? 2014 rohm co., ltd. all rights reserved. general precaution 1. before you use our pro ducts, you are requested to care fully read this document and fully understand its contents. rohm shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny rohms products against warning, caution or note contained in this document. 2. all information contained in this docume nt is current as of the issuing date and subj ec t to change without any prior notice. before purchasing or using rohms products, please confirm the la test information with a rohm sale s representative. 3. the information contained in this doc ument is provi ded on an as is basis and rohm does not warrant that all information contained in this document is accurate an d/or error-free. rohm shall not be in an y way responsible or liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or concerning such information. downloaded from: http:///

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