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llc current - resonant off - line switching controller SSC3S931 data sheet SSC3S931 - dse rev. 1. 2 sanken electric co., ltd. 1 aug . 31 , 2 01 8 https://www.sanken - ele.co.jp/en ? s anken e lectric c o ., l td 2017 description the SSC3S931 is a controller with smz* method for llc current resonant switch ing power supplies , incorporating a floating drive circuit for a high - side power mosfet. the product includes useful functions such as the a utomatic d ead t ime a djustment and the c apacitive m ode d etection. the product achieves high efficiency , low noise , and high cost - effec tive power supply systems with few external components. *smz is the s oft - switched m ulti - resonant z ero c urrent switch, and is achieved soft switching operation during all switching periods . features soft s tart function capacitive mode detection function reset detection function automatic dead time adjustment function protection s - high - side driver uvlo: auto - restart - vcc pin output overvoltage protection ( vcc_ ovp ) : latched shut down - input overvoltage protection (hvp): latched shut down - input undervoltage prote ction (uvp): auto - restart - overcurrent protection (ocp) : auto - restart, p eak drain current detection, 2 - step detection - overload protection (olp) : latched shut down - optocoupler open protection (oop): latched shut down - thermal shutdown (tsd) : latched shut down typical application package sop18 not to scale application s switching power supplies for electronic devices such as: audio visual (av) e quipment office a utomation (oa) e quipment industrial a pparatus communication f acilities dts vsen vcc fb nc vgh vs vb reg css cl cd vgl gnd rc nc vout 2 (+) vout ( - ) vout 1 (+) 1 15 16 17 18 4 3 2 u 1 ssc 3 s 931 7 6 5 12 13 14 9 8 10 11 tc _ ssc 3 s 931 _ 1 _ r 1 pfc out gnd external power supply
SSC3S931 SSC3S931 - dse rev. 1. 2 sanken electric co., ltd. 2 aug . 31 , 2 01 8 https://www.sanken - ele.co.jp/en ? s anken e lectric c o ., l td 2017 c ontents description -------------------------------- -------------------------------- -------------------------------- ------ 1 contents -------------------------------- -------------------------------- -------------------------------- --------- 2 1. absolute maximum ratings -------------------------------- -------------------------------- ------------- 3 2. electrical characteristics -------------------------------- -------------------------------- ---------------- 4 3. b lock diagram -------------------------------- -------------------------------- ----------------------------- 6 4. pin configuration definitions -------------------------------- -------------------------------- ----------- 7 5. typical application -------------------------------- -------------------------------- ----------------------- 7 6. physical dimensions -------------------------------- -------------------------------- ---------------------- 8 7. marking diagram -------------------------------- -------------------------------- ------------------------- 8 8. operational description -------------------------------- -------------------------------- ----------------- 9 8.1 resonant circuit operation -------------------------------- -------------------------------- ------- 9 8.2 startup operation -------------------------------- -------------------------------- ----------------- 12 8.3 soft s tart function -------------------------------- -------------------------------- ---------------- 12 8.4 minimum and maximum switching frequency setting -------------------------------- --- 13 8.5 high - side driver -------------------------------- -------------------------------- ------------------- 13 8.6 constant voltage control operation -------------------------------- -------------------------- 13 8.7 dead time adjustment function -------------------------------- ------------------------------ 14 8.8 capacitive mode detection function -------------------------------- -------------------------- 14 8.9 reset detection function -------------------------------- -------------------------------- -------- 16 8.10 vcc pin overvoltage protection (vcc_ovp) -------------------------------- -------------- 17 8.11 input overvoltage protection (hvp), input undervoltage protection (uvp) --------- 17 8.12 overcurrent protection (ocp) -------------------------------- -------------------------------- - 17 8.12.1 overcurrent protection 1 (ocp1) -------------------------------- ------------------------ 18 8.12.2 overcurrent protection 2 (ocp2) -------------------------------- ------------------------ 18 8.13 overload protection (olp) -------------------------------- -------------------------------- ------ 18 8.14 optocoupler open protection (oop) -------------------------------- ------------------------- 18 8.15 thermal shutdown (tsd) -------------------------------- -------------------------------- ------- 19 9. design notes -------------------------------- -------------------------------- ------------------------------ 19 9.1 external components -------------------------------- -------------------------------- ------------ 19 9.1.1 input and output electrolytic capacitors -------------------------------- -------------- 19 9.1.2 resonant transformer -------------------------------- -------------------------------- ----- 19 9.1.3 current detection resistor, r ocp -------------------------------- ------------------------ 19 9.1.4 current resonant capacitor, ci -------------------------------- ------------------------- 19 9.1.5 gate pin peripheral circuit -------------------------------- ------------------------------- 19 9.2 pcb trace layout and component placement -------------------------------- ------------- 20 10. pattern layout example -------------------------------- -------------------------------- --------------- 22 important notes -------------------------------- -------------------------------- ------------------------------ 23
SSC3S931 SSC3S931 - dse rev. 1. 2 sanken electric co., ltd. 3 aug . 31 , 2 01 8 https://www.sanken - ele.co.jp/en ? s anken e lectric c o ., l td 2017 1. absolute maximum ratings current polaritie s are defined as follows: current going into the ic (sinking) is positive current (+); and current coming out of the ic (sourcing) is negative current (?). unless otherwise specified, t a is 25c . characteristic symbol pins rating unit vsen pin sink current i sen 1 ? cc 2 ? ? fb 3 ? ? dts 4 ? ? reg v css pin voltage v css 5 ? ? cl 6 ? ? rc 7 ? ? cd 8 ? ? gl 11 ? ? reg + 0.3 v reg p in source current i reg 12 ? ? b ? s 14 ? ? s 15 ? ? gh 16 ? s ? b + 0.3 v operating ambient temperature t op D ? stg D ? j D
SSC3S931 SSC3S931 - dse rev. 1. 2 sanken electric co., ltd. 4 aug . 31 , 2 01 8 https://www.sanken - ele.co.jp/en ? s anken e lectric c o ., l td 2017 2. electrical characteristics current polarities are defined as follows: current going into the ic (sinking) is positive current (+); and current coming out of the ic (sourcing) is negative current (?). unless otherwise specified, t a is 25 c, v cc is 1 5 v . characteristic symbol conditions pins min. typ. max. unit start circuit and circuit current operation start voltage v cc(on) 2 ? v cc(off) 2 ? v circuit current in operation i cc(on) 2 ? 10.0 ma circuit current in non - operation i cc(off) v cc = 10 v 2 ? cc(p) v cc = 12 v 2 ? v cc(l.off) 2 ? v oscillator minimum f requency f (min) 11 C ? (max) 11 C ? d(min) 11 C ? d(max) 11 C ? (min)adj1 r css = 30 k 11 C ? 73 77 khz externally adjusted minimum f requency 2 f (min)adj2 r css = 77 k 11 C ? 45.4 48.4 khz feedback control fb p i n oscillation start threshold voltage v fb(on) 3 C fb(off) 3 C fb(max) v fb = 0 v 3 C ? ? ? fb(r) v cc = 10 v , v fb = 5.5 v 3 C soft - start css pin charging current i css(c) 5 C ? ? ? css(r) v cc = 10v , v c ss = 3 v 5 C (max)ss 11 C ? dead time dts pin voltage in normal operation v dts(op) 4 C 0 1 2 v dts pin threshold voltage v dts 4 C 1.9 v dts pin source current i dts v cc = 10 v, v dts = 0 v 4 C ? ? ? a reset detection maximum reset time t rst(max) 11 C ? driver circuit power supply reg pin output voltage v reg 12 C
SSC3S931 SSC3S931 - dse rev. 1. 2 sanken electric co., ltd. 5 aug . 31 , 2 01 8 https://www.sanken - ele.co.jp/en ? s anken e lectric c o ., l td 2017 characteristic symbol conditions pins min. typ. max. unit high - side driver high - side driver operation start voltage v buv(on) 14 C 15 5.7 6.8 7.9 v high - side driver operation stop voltage v buv(off) 14 C 15 5.5 6.4 7.3 v driver circuit vgl,vgh pin source current 1 i gl(src)1 i gh(src)1 v reg = 10.5 v, v b = 10.5 v, v gl = 0 v, v gh = 0 v 11 C 10 16 ? 15 C 540 ma vgl,vgh pin sink current 1 i gl(snk)1 i gh(snk)1 v reg = 10.5 v, v b = 10.5 v, v gl = 10.5 v, v gh = 10.5 v 11 C 10 16 ? 15 1.50 a vgl,vgh pin source current 2 i gl(src)2 i gh(src)2 v reg = 11.5 v, v b = 11.5 v, v gl = 10 v, v gh = 10 v 11 C 10 16 ? 15 ? 140 ? 90 ? 40 ma vgl,vgh pin sink current 2 i gl(snk)2 i gh(snk)2 v reg = 11.5 v, v b = 11.5 v, v gl = 1.5 v, v gh = 1.5 v 11 C 10 16 ? 15 140 230 360 ma vcc pin overvoltage protection (vcc_ovp) vcc pin ovp threshold voltage v cc(ovp) 2 C 10 30.0 32.0 34.0 v current resonant and overcurrent protection(ocp) capacitive mode detection voltage 1 v rc1 7 C 10 0.02 0.10 0.18 v ? 0.18 ? 0.10 ? 0.02 v capacitive mode detection voltage 2 v rc2 7 C 10 0.20 0.30 0.40 v ? 0.40 ? 0.30 ? 0.20 v rc pin threshold voltage (low) v rc(l) 7 C 10 1.8 0 1. 90 2.0 0 v ? 2.0 0 ? 1. 90 ? 1.8 0 v rc pin threshold voltage (high) v rc(h) 7 C 10 2.62 2.80 2.98 v ? 2.98 ? 2.80 ? 2.62 v css pin sink current (low) i css(l) v css = 3 v 5 C 10 1.1 1.8 2.5 ma css pin sink current (high) i css(h) v css = 3 v 5 C 10 13.0 20.5 28.0 ma overload protection (olp) cl pin olp threshold voltage v cl(olp) 6 C 10 3.9 4. 2 4.5 v cl pin source current 1 i cl(src)1 v cl = 0.5 v 6 C 10 ? 29 ? 17 ? 5 a cl pin source current 2 i cl(src)2 v cl = 3 v 6 C 10 ? 180 ? 135 ? 90 a cl pin sink current i cl(snk) v cl = 3 v 6 C 10 10 30 50 a input overvoltage protection (hvp), input undervoltage protection (uvp) vsen pin uvp release threshold voltage v sen(on) 1 C 10 1.248 1.300 1.352 v vsen pin uvp threshold voltage v sen(off) 1 C 10 1.056 1. 1 00 1.144 v vsen pin hvp threshold voltage v sen(hvp) 1 C 10 5.3 5.6 5.9 v vsen pin clamp voltage v sen (clamp) 1 C 10 10.0 v
SSC3S931 SSC3S931 - dse rev. 1. 2 sanken electric co., ltd. 6 aug . 31 , 2 01 8 https://www.sanken - ele.co.jp/en ? s anken e lectric c o ., l td 2017 characteristic symbol conditions pins min. typ. max. unit optocoupler open protection (oop) fb pin open detection threshold voltage v fb(oop) 3 C 10 4.2 4.6 5.0 v cd pin threshold voltage v cd 8 C 10 2.8 3 . 0 3.2 v cd pin source current i cd(src) v cd = 0 v 8 C 10 C 2 9 C 20 C 1 1 a cd pin sink current i cd(snk) v cd = 2.5 v 8 C 10 28 43 58 a cd pin reset current i cd(r) v cd = 2 v 8 C 10 1.0 2 .5 4.0 ma thermal shutdown (tsd) thermal shutdown temperature t j(tsd) 140 c thermal resistance junction to ambient thermal resistance j - a 95 c /w 3. block diagram start / stop / reg ./ bias / ovp main input sense fb control freq . control dead time uvlo level shift oc detector rv detector rc detector freq . ( max .) soft start / oc / freq . ( min .)/ adj . vcc gnd 2 10 1 3 5 14 16 15 7 6 8 4 11 12 vcc gnd vsen fb css vb vgh vs reg vgl rc cl cd dts high side driver bd _ ssc 3 s 931 _ r 1 fb detector olp
SSC3S931 SSC3S931 - dse rev. 1. 2 sanken electric co., ltd. 7 aug . 31 , 2 01 8 https://www.sanken - ele.co.jp/en ? s anken e lectric c o ., l td 2017 4. pin configuration definitions number name description 1 v sen m ain s input voltage detection signal input 2 v cc s upply voltage input for the ic with vcc pin o vervoltage p rotection ( vcc_ ovp) 3 fb f eedback signal input for constant voltage control and o ptocoupler open protection (oop) signal input 4 dts d ead time control selection: a fix ed on the minimum value , or an automatically adjustment 5 c ss soft - start setting capacitor connection 6 cl o verload detection (olp) capacitor connection 7 rc resonant current detection signal input and o vercurrent p rotection (ocp) signal input 8 cd d elay time setting capacitor connection for o ptocoupler open protection (oop) 9 nc not connected 10 gnd ground 11 vgl low - side gate drive output 12 r eg supply voltage output for gate drive circuit 13 pin removed 14 vb supply voltage input for high - side driver with uvlo 15 vs floating ground for high - side driver 16 vgh high - side gate drive output 17 pin removed 18 nc not connected 5. typical application figure 5 - 1 . typical a pplication 1 2 3 4 5 6 7 8 9 18 16 15 14 12 11 10 vcc fb dts css cl rc cd nc nc vgh vs vb reg vgl gnd vsen dts vsen vcc fb nc vgh vs vb reg css cl cd vgl gnd rc nc vout 2 (+) vout ( - ) vout 1 (+) 1 15 16 17 18 4 3 2 u 1 ssc 3 s 931 7 6 5 12 13 14 9 8 10 11 tc _ ssc 3 s 931 _ 2 _ r 1 pfc out gnd external power supply c 1 r 1 r 2 r 3 r 4 r 5 r 7 r 6 r 8 r 9 r 10 r 11 r 12 r 13 r 51 r 52 r 53 r 54 r 55 r 56 r 57 c 2 c 3 c 4 c 5 c 6 c 7 c 8 c 10 c 11 c 9 c v c i c 12 c 51 c 52 c 53 c 54 c 55 d 51 d 52 d 54 d 53 pc 1 u 51 pc 1 d 2 d 4 d 3 q ( h ) q ( l ) t 1 d 1
SSC3S931 SSC3S931 - dse rev. 1. 2 sanken electric co., ltd. 8 aug . 31 , 2 01 8 https://www.sanken - ele.co.jp/en ? s anken e lectric c o ., l td 2017 6. physical dimensions sop1 8 7. marking diagram notes: - dimensions in millimeters - pb - free 1 18 part number s s c 3 s 9 3 1 x x x x c ontrol n umber lot number : y is the last digit of the year of manufacture ( 0 to 9 ) m is the month of the year ( 1 to 9 , o , n , or d ) d is a period of days : 1 : the first 10 days of the month ( 1 st to 10 th ) 2 : the second 10 days of the month ( 11 th to 20 th ) 3 : the last 10 C 11 days of the month ( 21 st to 31 st ) s k y m d
SSC3S931 SSC3S931 - dse rev. 1. 2 sanken electric co., ltd. 9 aug . 31 , 2 01 8 https://www.sanken - ele.co.jp/en ? s anken e lectric c o ., l td 2017 8. operational description all of the parameter values used in these descriptions are typical values, unless they are specified as minimum or maximum. current polarities are defined as follows: current going into the ic (sinking) is positive current (+); and current coming out of the ic (sourcing) is negative current (?). q (h) and q (l) indicate a high - side power mosfet and a low - side power mosfet respectively. ci and c v indicate a current resonant capacitor and a voltage resonant capacitor , respectively. 8.1 resonant circuit operation figure 8 - 1 shows a basic rlc series resonant circuit. the impedance of the circuit, ? , is as the following equation . is angular frequency ; and = 2f . t hus, fl = 1/2 fc, ? of equation ( 2 ) becomes the minimum value, r (see figure 8 - 2 ). in the case, is calculated by equation ( 3 ) . ? becomes minimum value is called a resonant frequency, f 0 . t he higher frequency area than is an inductance area . t he lower frequency area than is a capacitance area. f rom equation ( 3 ) , is as follows: (h) and q (l) , are connec ted in series with v in . the series resonant circuit and the v oltage resonant capacitor , c v , are connected in parallel with q (l) . the series resonant circuit is consisted of the following components : the resonant inductor , l r ; the primary winding , p , of a t ransformer , t1 ; and the current resonant capacitor , c i . t he coupling between the primary and secondary winding s of t1 is designed to be poor so that the leakage inductance increases. this leakage inductance is us ed for l r . this results in a down sized of the series resonant circuit . the dotted mark with t1 describe s the winding polarity, the secondary windings , s1 and s2 , are connected so that the polarities are set to the same position as shown in figure 8 - 3 . i n addition, the winding numbers of each other should be equal. from equation ( 1 ) , the impedance of a current resonant power supply is calculated by equation ( 5 ) . from equation ( 4 ) , the resonant frequency, , is calculated by equation ( 6 ) . r is the inductance of the resonant inductor , l p is the inductance of the primary winding p , and ci is the capacitance of current resonant capacitor . figure 8 - 3 . current r esonant p ower s upply c ircuit r l c f 0 f r e q u e n c y i n d u c t a n c e a r e a c a p a c i t a n c e a r e a i m p e d a n c e r c v c i l r q ( h ) p s e r i e s r e s o n a n t c i r c u i t t 1 s 1 s 2 v o u t ( + ) ( ? ) v i n v g h v g l q ( l ) v d s ( l ) v d s ( h ) v c i i d ( h ) i d ( l ) i c i i s 2 i s 1 l p
SSC3S931 SSC3S931 - dse rev. 1. 2 sanken electric co., ltd. 10 aug . 31 , 2 01 8 https://www.sanken - ele.co.jp/en ? s anken e lectric c o ., l td 2017 in the current resonant power supply, q (h) and q (l) are alternatively turned on and off. the on and off time s of them are equal. there is a dead time between the on period s of q (h) and q (l) . during the dead time, q (h) and q (l) are in of f status. in t he current resonant power supply , the frequency is controlled . when the output voltage decreases , the ic decreases the switching frequency so that the output power is increased to keep a constant output voltag e . this must be controlled in the inductance area ( ). since the winding current is delayed from the winding voltage in the inductance area, the turn - on operates in a z cs (zero current switching) ; and the turn - off operates in a zvs (zero voltage switching) . thus, the switching loss es of q (h) and q (l) are nearly zero . in the capacitance area ( ), the current resonant power supply operates as follows : when t he output voltage decreases, the switching frequency is decreased ; and then , the output power is more decreased. therefore , th e output voltage cannot be kept c onstant . since the winding current goes ahead of the winding voltage in the capacitance area, q (h) and q (l ) operate in the hard switching . this results in the increase s of a power loss . this operation in the capacitance area is called the capacitive mode operation. the current resonant power supply must be operated without the c apacitive mode operation ( for more detail s, see section 8.8 ). figure 8 - 4 describe s the basic operation waveform of current resonant power supply (see figure 8 - 3 about the symbol in figure 8 - 4 ). for the description of current resonant waveforms in normal operation , the operation is separate d into a period a to f . in the following description : i d(h) is the current of q (h) , i d(l) is the current of q (l) , v f(h) is the forwerd voltage of q (h) , v f( l ) is the forwerd voltage of q ( l ) , i l is the current of l r , v in is an input voltage , v ci is ci voltage , and v cv is c v voltage . the current resonant power supply operations in period a to f are as follows: 1) period a when q (h) is on , an energy is stored into the series resonant circuit by i d(h) that flow s through the resonant circuit and the transformer (see figure 8 - 5 ) . at the same time, the e nergy is tra nsferred to the secondary circuit. when the primary winding voltage can not keep the on status of the secondary rectifier, the energy transmittion to the secondary circuit is stopped. 2) period b after the secondary side current becomes zero, the resonant cur rent flows to the primary side only to charge ci (see figure 8 - 6 ) . figure 8 - 4 . the b asic o peration w aveforms of c urrent r esonant p ower s upply figure 8 - 5 . operation in period a figure 8 - 6 . operation in p eriod b i d ( l ) i d ( h ) i s 1 v g l v g h v d s ( l ) i c i v c i i s 2 a b c d e f v i n + v f ( h ) v d s ( h ) v i n c v c i l r q ( h ) q ( l ) l p o n o f f i d ( h ) v i n s 1 s 2 i s 1 v c v v c i c v c i l r q ( h ) q ( l ) l p o n o f f i d ( h ) v i n s 1 s 2
SSC3S931 SSC3S931 - dse rev. 1. 2 sanken electric co., ltd. 11 aug . 31 , 2 01 8 https://www.sanken - ele.co.jp/en ? s anken e lectric c o ., l td 2017 3) period c c is the dead - time period . q (h) and q (l) are in off status . when q (h) turns off, c v is dis charged by i l that is supplied by the energy stored in the series resonant circuit appl ies (see figure 8 - 7 ) . when v cv decreases to v f(l) , ?i d(l) flows through the body diode of q (l) ; and v cv is clamped to v f(l) . after that, q (l) turns on. since v ds(l) is nearly zero at the point, q (l) operates in the zvs and the zcs ; thus, the switching loss achieves nearly zero. 4) period d when q (l) turns on , i d(l) flows as shown in figure 8 - 8 ; and v ci is appl ied t he primary winding voltage of the transformer . at the same time, e nergy is transferred to the secondary circuit. when the primary winding voltage can not keep the on status of th e secondary rectifier , the energy transmittion to the secondary circuit is stopped. 5) period e after the secondary side current becomes zero, the resonant current flows to the primary side only to charge ci (see figure 8 - 9 ) . 6) per iod f f is the dead - time period. q (h) and q (l) are in off status . when q ( l ) turns off, c v is charged by ? i l that is supplied by the energy stored in the series resonant circuit appl ies (see figure 8 - 10 ) . when v cv increases to v in + v f(h) , ?i d( h ) flows through body diode of q ( h ) ; and v cv is clamped to v in + v f(h) . after that, q ( h ) turns on. since v ds( h ) is nearly zero at the point, q ( h ) operates in the zvs and the zcs ; thus, the switching loss achieves nearly zero. after the p eriod f , i d( h ) flows again; and the operation returns to the period a. the above operation is repeated to transfer energy to the secondary side from the resonant c ircuit. figure 8 - 7 . operation in p eriod c figure 8 - 8 . operation in p eriod d figure 8 - 9 . operation in p eriod e figure 8 - 10 . operation in p eriod f c v c i l r q ( h ) q ( l ) l p o f f o f f i l v i n - i d ( l ) v c v c v c i l r q ( h ) q ( l ) l p o f f o n v i n i d ( l ) i s 2 s 1 s 2 v c i c v c i l r q ( h ) q ( l ) l p o f f o n v i n i d ( l ) s 1 s 2 c v c i l r q ( h ) q ( l ) l p o f f o f f - i l v i n - i d ( h ) v c v
SSC3S931 SSC3S931 - dse rev. 1. 2 sanken electric co., ltd. 12 aug . 31 , 2 01 8 https://www.sanken - ele.co.jp/en ? s anken e lectric c o ., l td 2017 8.2 startup operation figure 8 - 11 and figure 8 - 12 show the vcc pin peripheral circuit and the startup w aveforms , respectively . the vcc pin is a power supply input pin for a control circuit and is supplied from an external power supply. w hen the vcc pin voltage increases to the operation start voltage, v cc(on) = 11.9 v, the control circuit starts operation. when the vcc pin voltage decreases to the operation stop voltage, v cc(off) = 10.0 v, the control circuit is stopped by the u ndervoltage l ockout (uvlo) circuit, and returns to the state before startup (see figure 8 - 13 ) . w hen the ic satisfies all following condition s , t he ic starts a switching operation : vcc pin voltage v cc(on) = 11.9 v vsen pin voltage v sen(on) = 1.300 v fb pin voltage v fb(on) = 0.30 v figure 8 - 11 . vcc p in p eripheral c ircui t figure 8 - 12 . startup w aveforms figure 8 - 13 . v cc vs. i cc 8.3 soft start function figure 8 - 14 shows the s oft start operation waveforms. the ic has the s oft s tart f unction to reduce stress of peripheral component , and to prevent the c apacitive mode operation . during the soft start oper ation , c 6 connected to the css pin is charged by the css pin charge current, i css(c) = ? 105 a . the o scillation frequency is varied according to the css pin voltage. the switching frequency (f (max)ss * = 500 khz is maximum ) gradually decreases according to rise the css pin voltage ; a t same time, output power increase s . t he ic operate s with an oscillation frequency control that uses feedback signal after the output power increases . when the ic become s any of the following conditions, c 6 is discharged by the css pin reset current, i css(r) = 1.8 ma. wnen t he vcc pin voltage decreases to the operation stop voltage, v cc(off) = 10.0 v, or less. when vs en pin voltage is v sen(off) = 1. 1 00 v or less. when one or more following correspond ing protections are activated: vcc_ ovp, hvp, olp , oop , or tsd . during the soft start operation, a cd pin voltage also increases. the c d pin voltage is used for the o ptocoupler o pen p rotection (oop) . note that a startup failure may be occurred due to the oop activation when the soft start period is too long. see the se ction 8.14 for setting of c 10 connected to the c d pin. figure 8 - 14 . soft start operation * the maximum frequency during normal operation is f (max) = 300 khz. 5 4 2 css vcc gnd u 1 vsen c 2 r 1 r 2 r 3 c 3 c 6 external power supply c 1 1 r 6 vcc pin voltage vsen pin voltage fb pin voltage vgl pin voltage v cc ( on ) v sen ( on ) v fb ( on ) time reg pin voltage v reg 0 0 0 0 i cc v cc off v cc on vcc pin voltage start stop css p in v oltage primary - side w inding c urrent 0 0 ocp limit c 6 is charged by i css ( c ) time time soft - start period ocp operation peropd frequency control by feedback signal
SSC3S931 SSC3S931 - dse rev. 1. 2 sanken electric co., ltd. 13 aug . 31 , 2 01 8 https://www.sanken - ele.co.jp/en ? s anken e lectric c o ., l td 2017 8.4 minimum and maximum switching frequency setting the minimum switching frequency is determined by the resistance of r 6 connected to the css pin. figure 8 - 15 shows t he relationship of r 6 and f (min)adj that is the external adjust ment minimum frequency. the f (min)adj must be set more than the resonant frequency, f 0 , under the condition of the minimum mains input voltage and the maximum output power. the maximum switching frequency, f max , is determined by the inductance and the capacitance of a resonant circuit. the f max must be set less than the maximum frequency, f (max) = 300 khz. figure 8 - 15 . r 6 vs. f (min)adj 8.5 high - side driver figure 8 - 16 shows the bootstrap circuit that driv e s q (h) , and is configure d by d 1 , r 1 1 , and c12 ( between the reg and vs pin s) . when the q (h) and q (l) are an off and on statuses , the vs pin voltage becomes about ground level ; and c12 is charged from the reg pin. when the voltage between the vb and vs pin s , v b - s , increases to v buv(on) = 6.8 v or more, an internal high - side drive circuit starts an operation. when v b - s decreases to v buv(off) = 6.4 v or less, the high - side drive circuit stops the operation. in case the both ends of c12 and d 2 are short ed , the ic is protected by v buv(off) . d2 is for the protection against negative voltage of the vs pin d 1 d 1 should be an ultrafast recovery diode of short recovery time and low reverse current. when the maximum mains i nput voltage of the apprication is 265vac, it is recommended to use ultrafast recovery diode of v rm = 600 v c11 , c12 , and r1 1 the values of c11 , c12 , and r11 are determined by total gate charge, qg, of external mosfet and voltage dip amount between the vb and vs pin s in the minimum frequency operation. c11 , c12 , and r11 should be adjusted so that the voltage between the vb pin and the vs is more than v buv( on ) = 6.8 v by measuring the voltage with a high - voltage differential probe. t he reference value of c11 is 0.47 f to 1 f. the time constant of c12 and r11 should be less than 500 ns. the value of c12 is 0.047 f to 0.1 f. t he value of r11 is 2.2 to 10 . c11 and c12 should be a film or a ceramic capacitor that has a low esr and a low leak age current characteristics . d2 d2 should be a schottky diode that h as a low forward voltage characteristics to avoid that v b - s is ? 0.3 v or less, i.e., to use within its absolute maximum rating value. figure 8 - 16 . bootstrap c ircuit 8.6 constant voltage control operation figure 8 - 17 shows the fb pin peripheral circuit. figure 8 - 17 . fb pin peripheral circuit the fb pin is sunk the feedback current by the photo - coupler , pc1, connected to the fb pin. as a result, the oscillation frequency is controlled to constant output voltage by the fb pin (in induc tance area). under slight load condition , t he feedback current increases ; and the fb pin voltage decreases . while the fb pin voltage decreases to the oscillation stop threshold voltage, 40 50 60 70 80 20 30 40 50 60 70 80 f (m i n)adj (khz) r 6 (k ) SSC3S931_r1 vgh vs vb reg vgl gnd t 1 15 16 u 1 12 14 10 11 r 11 d 1 c 11 c 12 d 2 bootstrap circuit q ( h ) q ( l ) cv ci 3 10 fb gnd u 1 c 4 pc 1 c 5 r 5
SSC3S931 SSC3S931 - dse rev. 1. 2 sanken electric co., ltd. 14 aug . 31 , 2 01 8 https://www.sanken - ele.co.jp/en ? s anken e lectric c o ., l td 2017 v fb(off) = 0.20 v, or less, the ic stops switching operation. this operation reduces switching loss , and prevents the increasing of the secondary output voltage. r 5 and c 5 are for a phase compensation adjustment . c 4 is for a high frequency noise rejection. the secondary - side circuit should be designed so that the collector current of pc1 is > 1.6 m a that is the abso lute value of the maximum source current, i fb(max) . especially, t he current transfer ratio, ctr, of the photo coupler should be taken an aging degradation into account . 8.7 dead time adjustment function the dead time is the period when both the high - side and the low - side power mosfets are off. i f the dead time is shorter than a voltage resonant period (see figure 8 - 18 ) , the power mosfet s turns on / off during the voltage resonant operation. in th e case, t he switching loss increas es due to hard switching operation of the power mosfet s . figure 8 - 18 . zvs failure operation waveform the dead time setting (a fixed minimum value or an automatically adjustment value) is determined by the dts pin voltage at the startup . to set to the fixed dead time, apply v dts of 1.9 v or more to the dts pin and start the ic . to automatically adjust a dead time by the internal ic, apply less than v dts to the dts pin ( e.g., pulls down the dts pin by the register of about 100 k ) and start the ic . the source current i dts = ? 10.2 a flows through the dts pin. the slope of the dts pin voltage in the startup is adjusted by a register and/or capacitor connected to the dts pin. th is a utomatic d ead t ime a djustment f unction operates so that the ic detects a voltage resonant period to automatically control t he zvs (zero voltage switching) operation of q (h) and q (l) . t his function achieves the power supply application without a dead time adjustment for each p ower supply specification , if t he voltage resonant period is varied according to the power supply specifications such as an input voltage and an output power. t he vs pin detects the dv/dt periods on the rising and falling voltage waveforms between drain an d source of the low - side power mosfet (see figure 8 - 19 ). the dead time is determined the detected dv/dt period. as a result, the high - side and the low - side power mosfets are automatically controlled in the zero voltage switching (zvs) operation. this function operates in the period from t d(min) = 0.24 s to t d(max) = 1.65 s. c heck that the zero current switching ( zcs ) operation period is about 600 ns (i.e., the period that the drain current flows through the body diode as shown in figure 8 - 20 ) based on actual operation in the following conditions: - when a n output power i s minimum in a maximum input voltage specification . - when a n output power is maximum in a minimum input voltage specification. figure 8 - 19 . vs p in and d ead t ime p eriod figure 8 - 20 . zcs c heck p oint 8.8 capacitive mode detection function the resonant power supply should be operated in the inductance area shown in figure 8 - 21 . in the capacitance area, the power supply becomes the c apacitive m ode operation ( see section 8.1 ). t o prevent the operation , the minimum oscillation frequency must be set higher than f 0 on each power supply specification . t he ic has the c apacitive mode operation d etection f unction to kee p the frequency always higher than f 0 . thus, the minimum oscillation frequency setting is unnecessary ; and the pow er supply design is easier. in addition, the ability of transformer is improve d because the operating frequency can be close to the resonant frequency, f 0 . the resonant current is detected by the rc pin to prevent the capacitive mode operation. when the capacitive mode is detected, the c7 connected to the cl q ( l ) d - s voltage , v ds ( l ) vgl vgh voltage resonant period loss increase by hard switching operation dead time t 1 cv ci vs vgl vgh gnd u 1 15 11 10 16 main rv detector low - side v ds ( l ) dead time period dv dt dt on on off v ds ( l ) q ( h ) drain current , i d ( h ) body diode flowing period : about 600 ns
SSC3S931 SSC3S931 - dse rev. 1. 2 sanken electric co., ltd. 15 aug . 31 , 2 01 8 https://www.sanken - ele.co.jp/en ? s anken e lectric c o ., l td 2017 pin is charged by i cl(src) 1 = ? 17 a. when the cl pin voltage increases to v cl(olp) , the olp is activated to stop the switching operation in latched state . the detection voltage is changed v rc1 = 0.10 v or v rc2 = 0.30 v depending on the load (see figure 8 - 23 and figure 8 - 24 ) . the c apaciti ve m ode o peration d etection f unction operations as follows: q (h) on period figure 8 - 22 shows the rc pin waveform in the inductance area . figure 8 - 23 and figure 8 - 24 show the rc pin waveform in the capacitance area. in the inductance area , the rc pin voltage does not cross +v rc x from higher to lower during the q (h) on period (see figure 8 - 22 ) . on the contrary, in the capacitance are a, the rc pin voltage crosses +v rc1 from higher to lower . at this point, the cap acitive mode operation is detected . t hen , q (h) is turned off ; and q (l) is turned on (see figure 8 - 23 and figure 8 - 24 ) . q (l) on period contrary to the case of q (h) , in the capacitance are a, the rc pin voltage crosses ? v rcx from lower to higher during the q ( l ) on period . at this point, the capacit ive mode operation is detected . then, q ( l ) is turned off ; and q ( h ) is turned on . as above, to prevent the c apacitive mode , the rc pin voltage is detected by pulse - by - pulse ; and an operating frequency is synchronized with a c apacitive mode operation frequency. c9, r7, and r8 should be set as follows: - the absolute value of the rc pin voltage is more than |v rc2 | = 0.30 v; and - the rc pin voltage must be within the ab solute maximum ratings of ? 6 to 6 v. in addition, to set c9, r7, and r8, the settings described in section 8.12 and the condition that the capacitive mode is easily caused (e.g., startup, turning off the mains input voltage, or output shorted) should be taken into account. figure 8 - 21 . operating a rea of r esonant p ower s upply figure 8 - 22 . rc p in v oltage in i nductance a rea figure 8 - 23 . high - s ide c apacitive m ode d etection in l ight l oad figure 8 - 24 . high - s ide c apacitive m ode d etection in h eavy l oad f 0 capacitance area inductance area operating area impedance resonant frequency hard switching sift switching uncontrollable operation 0 + v rc 2 v ds ( h ) on off rc pin voltage + v rc 1 v ds ( h ) 0 0 capacitive m ode o peration d etection on off + v rc 2 rc pin voltage + v rc 1 v ds ( h ) 0 0 capacitive mode operation detection on off + v rc 2 rc pin voltage + v rc 1
SSC3S931 SSC3S931 - dse rev. 1. 2 sanken electric co., ltd. 16 aug . 31 , 2 01 8 https://www.sanken - ele.co.jp/en ? s anken e lectric c o ., l td 2017 8.9 reset detection function in the startup period, the feedback control for the output voltage is inactive. if a magnetizing current may not be reset in the on - period because of unbalanced operation, a negative current may flow just before a power mosfet turn s off. this causes a hard switching operation, increases the stresses of the power mosfet. where the magnetizing current means the circulating current applied for resonant operation, and flows only into the primary - side circuit. to prevent t he hard switchi ng, the ic has the r eset d etection f unction. figure 8 - 26 shows the high - side operation and the reference drain current waveform s in a normal resonant operation and a reset failure operation. to prevent the hard switching operation, t he r eset d etection f unction operates such as an on period is extend ed until the absolute value of a rc pin voltage, |v rc1 |, increases to 0.10 v or more . when the on period reaches the maximum reset time, t rst(max) = 5 s, the on - period expires at that moment, i.e., the power mosfet turns off ( see figure 8 - 25 ). figure 8 - 25 . reset d etection o peration e xample at h igh - side o n p eriod figure 8 - 26 . reference high - side o peration and d rain c urrent w aveform s in n ormal r esonant o peration and in r eset f ailure o peration 0 v rc = + 0 . 1 v expanded on - period i d ( h ) vgl pin voltage low high normal on - period t rst ( max ) reset failure waveform vgh pin voltage turning - on in negative drain current low high i d ( h ) c v c i l r q ( h ) q ( l ) l p c v c i l r l p c v c i l r l p c v c i l r l p c v c i l r l p c v c i l r l p a b c e f 0 m a g n e t i z i n g c u r r e n t v d s ( h ) = 0 v v d s ( h ) = 0 v t u r n i n g o n a t v d s ( l ) = 0 v r e s u l t s i n s o f t - s w i t c h i n g v d s ( h ) = 0 v v d s ( h ) = 0 v t u r n i n g o n a t v d s ( l ) > > 0 v r e s u l t s i n h a r d - s w i t c h i n g r e c o v e r y c u r r e n t o f b o d y d i o d e p o i n t a p o i n t b p o i n t c p o i n t d p o i n t e p o i n t f o f f o f f o n o f f o f f o f f o f f o f f o n o f f o f f o n d i d ( h ) q ( h ) q ( l ) q ( h ) q ( l ) q ( h ) q ( l ) q ( h ) q ( l ) q ( h ) q ( l ) i d ( h ) i d ( h ) i d ( h ) i d ( h ) i d ( h ) n o r m a l r e s o n a n t o p e r a t i o n r e s e t f a i l u r e o p e r a t i o n
SSC3S931 SSC3S931 - dse rev. 1. 2 sanken electric co., ltd. 17 aug . 31 , 2 01 8 https://www.sanken - ele.co.jp/en ? s anken e lectric c o ., l td 2017 8.10 vcc pin overvoltage protection ( vcc_ ovp) when the voltage between the vcc and gnd pin s is applied to the vcc pin ovp t hreshold v oltage , v cc(ovp) = 32.0 v , or more, the vcc pin o ver voltage p rotection ( vcc_ ovp) is activated ; and the ic stops switching operation in a latched state . to release the latched state, decrease the vcc pin voltage to v cc(l.off) of 10.0 v , or decrease the vsen pin voltage to v sen(off) of 1. 1 00 v, respectively . the vcc pin input voltage must be set less than the its a bsolute m aximum r ating of 35 v. 8.11 input overvoltage protection (hvp) , input undervoltage protection (uvp) when the vsen pin voltage reaches v sen(hvp) of 5.6 v or more due to the increasing input voltage from a steady state , the i nput o vervoltage protection (hvp) is activate d; and the ic stops switching operation in a latched state . to release the latched state, decrease the vcc pin voltage to v cc(l.off) of 10.0 v, or decrease the vsen pin voltage to v sen(off) of 1. 1 00 v, respectively . o n the other hand , w hen the vsen pin voltage falls to v sen(off) of 1. 1 00 v or less due to the de creasing input voltage from a steady state, the input under voltage protection (uvp) is activated; and the ic stops the switching operation. even if the ic is in the operati ng state (e.g., the vcc pin voltage is more than v cc(off) ) , the uvp is prevail ed , and is activated . when the vsen pin voltage increases to v sen(on) = 1.300 v or more depending on input voltage rising in the operating state , the ic re starts the switching operation. t he dc input voltage at the hvp or the uvp activation is calculated as follows: in (op) is the dc input voltage at the hvp or the uvp activation , and v sen(th) is the threshold voltage of the vsen pin (see table 8 - 1 ) . table 8 - 1 . vsen p in t hreshold v oltag e parameter symbol v sen(th) vsen pin hvp threshold voltage v sen(hvp) 5.6 v vsen pin uvp threshold voltage v sen(off) 1. 1 00 v vsen pin uvp release threshold voltage v sen(on) 1.300 v r 1 and r 2 have a high resistance , and are applied high voltage . thus, these should be taken into account as follows : select a resistor designed against electromigration according to the specifications of the application . use a combination of resistors in series for that to reduce each applied voltage . r1 reference value is about 10 m . c 2 shown in figure 8 - 27 is for reducing noises , and is set 1000 pf to 0.01 f. the value of r 1 , r 2, r 3, and c 2 should be selected based on actual operation in the application. figure 8 - 27 . vsen p in p herepheral c ircuit 8.12 overcurrent protection (ocp) for t he o vercurrent p rotection (ocp) , the ic detects the drain current, i d , on pulse - by - pulse basis, and limits output power. the ocp circuit achieves that c9 value can be smaller than ci value. where c9 is for shunt capacitor, and ci is for current resonant capacitor (see figure 8 - 28 ). this results in the reducing detection current through c9 . thus, the loss of the detection resistor, r8 , is reduced ; and the size of r8 can be smaller . t here is no convenient method that th e accurate resonan t current value is calculate d using the parameter such as condition of a mains input or an output . thus, c9, r7, and r8 should be adjusted based on actual operation in the application. the reference values for c8, c9 , r 7 , and r8 and theirs adjustment methods are as follows: r8 and c 9 c9 : 100pf to 330pf ( around 1 % of ci value ). r8 : a round 100 . r8 is calculated equation ( 8 ) . the detection voltage of r8 is used the detection of the c apacitive m ode o peration ( see section 8.8 ). therefore, setting of r8 and c 9 should be taken account of both ocp and the c apacitive m ode o peration. d(h) is t he current of the high - side power 10 gnd u 1 r 3 vsen c 2 r 1 r 2 c 1 1 pfc out
SSC3S931 SSC3S931 - dse rev. 1. 2 sanken electric co., ltd. 18 aug . 31 , 2 01 8 https://www.sanken - ele.co.jp/en ? s anken e lectric c o ., l td 2017 mosfet at an on state , and v rc(l) is the rc pin threshold voltage (low) of 1. 90 v r 7 and c 8 they are for high frequency noise reduction. r 7 : 100 to 470 c 8 : 100 pf to 1000 pf figure 8 - 28 . rc p in p eripheral c ircuit the ocp operation has two level threshold voltage s as follows: 8.12.1 overcurrent protection 1 (ocp1) this is a first ocp level . when the absolute value of the rc pin voltage increases to more than |v oc(l) | of 1. 90 v, c6 connected to the css pin is discharged by i css(l) = 1.8 ma. thus, the switching frequency increases to prevent the output power rising . w hen the absolute value of the rc pin voltage decreases to |v rc(l) | or less during the c6 discharge , the c6 discharge is stop ped . 8.12.2 overcurrent protection 2 (ocp2) this is a second ocp level. when the absolute value of the rc pin voltage increases to more than |v rc (h) | = 2.80 v, the high speed ocp is activated . then, the on/off statuses of power mosfets are inverted . a t the same time, c6 is discharged by i css (h) = 20.5 ma. thus, the switching frequency quickly increases to quickly prevent the output power rising . the ocp2 protects the ic from the exceeding overcurrent caused by the abnormal condition such as the output shorted. when the absolute value of the rc pin vol tage decreases to |v rc (h) | or less, the ocp level is transfer red to ocp1 operation . 8.13 overload protection (olp) figure 8 - 29 shows the o verload p rotection (olp) waveforms . when increasing of an output power and the o vercurrent p rotection 1 (ocp 1 ) is activated, the c7 connected to the cl pin is charged by i cl(src) 1 of ? 17 a. moreover, when the overcurrent protection 2 (ocp 2 ) is activated, the c7 connected to the cl pin is charged by i cl(src) 2 of ? 135 a. when the cl pin voltage increases to v cl(olp) of 4. 2 v due to maintain ing the ocp 1 or ocp2 operations , the olp is activated , and the switching operation stops in a latched state . to release the latched state, decrease the vcc pin voltage to v cc(l.off) of 10.0 v, or decrease the vsen pin voltage to v sen(off) of 1. 1 00 v, respectively . figure 8 - 29 . olp w aveform 8.14 optocoupler open protection (oop) in case the primary side of an optocoupler becomes open, a feedback current reduction due to the fb pin voltage rising result in the output voltage increases. t o prevent the status the ic has the o ptocoupler open protection (oop) . the oop is activated at following condition. - when the fb pin voltage increases to higher than the css pin voltage, or - when the fb pin voltage increases to the fb pi n open detection threshold voltage, v fb(oop) = 4.6 v, or more. after the oop activation, c10 connected to the cd pin is charged by the cd pin source current, i cd( src) = C 20 a . when the cd pin voltage increases to the cd pin threshold voltage, v cd = 3 . 0 v, the ic stops switching operation in a latched state . to release the latched state, decrease the vcc pin voltage to v cc(l.off) of 10.0 v, or decrease the vsen pin voltage to v sen(off) of 1. 1 00 v, respectively . t 1 r 7 cv ci c 9 c 8 vs vgl vgh gnd css u 1 15 11 5 7 10 16 i ( h ) rc c 6 r 8 r 6 q ( h ) q ( l ) cl 6 c 7 vcc pin voltage vgh / vgl 0 0 v cc ( l . off ) v cc ( on ) rc pin voltage cl pin voltage v rc ( l ) v rc ( l ) v cl ( olp ) 0 0 charged by i cl ( src ) v cc ( off ) releasing latched state
SSC3S931 SSC3S931 - dse rev. 1. 2 sanken electric co., ltd. 19 aug . 31 , 2 01 8 https://www.sanken - ele.co.jp/en ? s anken e lectric c o ., l td 2017 the delay time is period until the switching operation stop from the oop activation. t he maximum delay time, t dly max , is calculated by following equation. cd is the cd pin threshold voltage of 3 . 0 v , c cd is the value of c10 connected to the cd pin (about 0.1f to 0.47f ), and i cd(src) is the cd pin source current of C 20 a . if c10 = 0.1 f , during startup operation (see section 8.3 ), the cd pin voltage increases because c10 is charged. c10 must be set the value with enough margins . to prevent a startup failure , c10 must be set enough large value so that the cd pin volta ge is less than 3.0 v during startup period. i n addition, the condition when the soft start period is longest (e.g., minimum input voltage and maximum output power) should be taken into account. 8.15 t hermal shutd o wn (tsd) when the junction temperature of the ic reach to the thermal shutdown temperature t j(tsd) = 140 c (min.), the t hermal s hutd o wn (tsd) is activated ; and the ic stops switching operation in a latched stat e . to release the latched state, decrease the vcc pin voltage to v cc(l.off) of 10.0 v, or decrease the vsen pin voltage to v sen(off) of 1. 1 00 v, respectively . 9. design notes 9.1 external components take care to use the proper rating and proper type of components. 9.1.1 input and o u tput e lectrolytic c apacitor s apply proper derating to a ripple curr ent, a voltage, and a temperature rise. it is required to use the high ripple current and low impedance type e lectrolytic c apacitor that is designed for switch mode power supplies . 9.1.2 resonant t ransformer the resonant power supply uses the leakage inductance of a transformer. therefore, to reduce the effect of the eddy current and the skin effect, the wire of transformer should be us ed a bundle of fine litz wires. 9.1.3 current d etection r esistor, r ocp to reduce the effect of the high frequency switching current flowing through r ocp , c hoose the resister of a low internal inductance type. in addition , its allowable dissipation should be chosen suitable . 9.1.4 current r esonant c apacitor, ci since a l arge resonant current flows through ci , ci should be use d a low loss and a high current capability capacitor such as a polypropylene film capacitor. in addition, ci must be taken into account its frequency characteristic because a high frequency current flows. 9.1.5 gate pin peripheral circuit the vgh and vgl pin s are gate drive output s for external power mosfets. the se peak source and sink currents are C 540 ma and 1.50 a , respectively . to make a turn - off speed faster, connect the diode, d s , as shown in figure 9 - 1 . when r a and d s is adjusted, the following contents should be taken into account: the power losses of power mosfets, gate waveforms (for a ringing reduction caused by a pattern layout, etc.), and emi noises. to prevent the malfunction s caused by steep d v /dt at tu rn - off of power mosfet s, connect r gs of 10 k to 100 k between the g ate and s ource pins of the power mosfet with a minimal length of pcb traces . when the se gate resistances are adjusted, the gate
SSC3S931 SSC3S931 - dse rev. 1. 2 sanken electric co., ltd. 20 aug . 31 , 2 01 8 https://www.sanken - ele.co.jp/en ? s anken e lectric c o ., l td 2017 waveforms should be checked that the dead time is ensur ed a s shown in figure 9 - 2 . figure 9 - 1 . power mosfet p eripheral c ircuit figure 9 - 2 . dead t ime c onfirmation 9.2 pcb trace layout and component placement t he pcb circuit design and the component layout significantly affect a power supply operation, emi noise s , and power dissipation . thus, to reduce the impedance of the high frequency trace s on a pcb (see figure 9 - 3 ), they should be designed as wide trace and small loop as possible . in addition, ground traces should be as wide and short as possible so that radiated emi levels can be reduced. figure 9 - 3 . high f requency c urrent l oops ( h atched a reas) figure 9 - 4 shows the circuit design example. t he pcb trace design should be also taken into account as follows: 1) main circuit trace the main trace s that s witching current flows should be designed as wide trace and small loop as possible. 2) control ground trace if the large current flows through a control ground , it may cause v arying electric potential of the control ground ; and t his may result in the malfunc tions of the ic . therefore, connect the control ground as close and short as possible to the gnd pin at a single - point ground (or star ground) that is separated from the power ground . 3) vcc trace t he trace for supplying power to the ic should be as small loo p as possible. if c 3 and the ic are distant from each other, a film capacitor c f (about 0.1 f to 1.0 f) should be connected between the vcc and gnd pin s with a minimal length of pcb traces . 4) trace of peripheral components for the ic control these componen ts should be placed close to the ic, and be connected to the corresponding pin of the ic with as short trace as possible. 5) trace of bootstrap circuit components these components should be connected to the ic pin with as short trace as possible . in addition, the loop for these should be as small as possible. 6) secondary s ide rectifier smoothing circuit trace t he trace s of the rectifier smoothing loop s carry the switching current . t hus it should be designed as wide trace and small loop as possible. d s r a r g s d r a i n s o u r c e g a t e h i g h - s i d e g a t e l o w - s i d e g a t e v t h ( m i n . ) v t h ( m i n . ) d e a d t i m e d e a d t i m e
SSC3S931 SSC3S931 - dse rev. 1. 2 sanken electric co., ltd. 21 aug . 31 , 2 01 8 https://www.sanken - ele.co.jp/en ? s anken e lectric c o ., l td 2017 figure 9 - 4 . peripheral c ircuit t race e xample a r ound the ic t 1 dts vsen vcc fb css cl cd rc nc nc vgh vs vb reg vgl gnd 1 15 16 17 18 4 3 2 u 1 ssc 3 s 931 7 6 5 12 13 14 9 8 10 11 pc 1 c 1 r 1 r 2 r 3 c 2 cf c 4 c 5 c 6 r 6 c 7 c 8 r 8 r 7 c 11 d 1 r 11 c 12 d 2 d 4 r 13 r 12 q ( h ) q ( l ) d 3 r 10 r 9 c v ci c 9 d 53 d 54 c 52 c y ( 6 ) main trace of secondary side should be wide and short ( 1 ) main trace should be wide and short ( 2 ) ground trace for the ic should be connected at a single point ( 4 ) peripheral components for ic control should place near ic ( 5 ) boot strap circuit trace should be small loop r 4 c 10 pfc out r 5 external power supply ( 3 ) loop of vcc and c 3 should be short c 3
SSC3S931 SSC3S931 - dse rev. 1. 2 sanken electric co., ltd. 22 aug . 31 , 2 01 8 https://www.sanken - ele.co.jp/en ? s anken e lectric c o ., l td 2017 10. pattern layout example the following show the pcb pattern layout example and the schematic of circuit using the products of ssc3s900 series. t he circuit symbols correspond to these of figure 10 - 1 . figure 10 - 1 . pcb circuit trace layout example figure 10 - 2 . circuit schematic for pcb circuit trace layout lp d (1) main trace should be wide and short (6) main trace of secondary side should be wide and short (5) boot strap trace should be small loop (4) peripheral components for ic control should place d near ic (2) ground trace for ic should be connected at a single point (3) loop of vcc and c 3 should be short s1 - 1 s1 - 2 s 2 - 1 s 2 - 2 note: t he unused components for the SSC3S931 are included. vr 101 cx 101 cn 1 f 101 d 202 r 213 c 203 c 104 r 201 r 202 r 203 r 204 r 205 c 204 r 209 c 205 c 206 c 207 r 212 d 205 r 225 r 221 d 201 c 201 c 212 c 214 c 215 c 103 d 203 d 204 r 215 d 206 c 225 c 209 c 208 r 208 r 207 r 200 c 210 q 204 r 218 r 217 d 207 d 208 c 213 pc 201 pc 202 c 216 18 17 16 15 14 13 12 11 10 1 2 3 4 5 6 7 8 9 th 101 t 1 l 101 c 217 q 201 q 202 r 206 r 101 r 102 r 103 l 102 cx 102 c 102 c 101 c 218 c 202 r 219 r 214 r 211 r 230 c 211 p d 1 3 6 4 psa 50112 _ rev . 1 . 1 cn 601 r 609 c 301 c 308 r 302 r 301 r 306 r 307 r 310 r 303 c 305 pc 201 q 301 r 304 c 605 q 601 pc 202 d 601 r 601 r 602 r 610 power _ on / off c 304 12 v cn 401 q 606 r 614 r 616 r 615 c 606 s 1 s 2 10 8 , 9 7 r 604 r 305 q 602 d 301 d 302 cn 602 r 613 c 302 c 309 c 604 24 v s 3 s 4 d 304 d 303 14 13 12 d 602 r 605 r 606 r 603 r 309 r 308 j 2 j 5 // j 7 j 3 // j 8 j 13 r 210 j 14 j 18 tr 1 j 15 r 216 j 6 j 1 j 9 j 23 j 11 r 220 j 12 j 24 j 33 j 24 j 33 c 601 j 26 j 20 , j 30 , j 32 c 303 j 21 j 27 j 31 j 29 j 28 vsen cl rc vcc fb dts css pl sb ic 201 ssc 3 s 900 st nc reg nc vgh vs vb vgl gnd
SSC3S931 SSC3S931 - dse rev. 1. 2 sanken electric co., ltd. 23 aug . 31 , 2 01 8 https://www.sanken - ele.co.jp/en ? s anken e lectric c o ., l td 2017 important notes all data, illustrations, graphs , tables and any other information included in this document (the information ) as to sanken s products listed herein (the sanken products) are current as of the date this document is issued . the information is subject to any change without notice due to improvement of the sanken products , etc. please make sure to confirm with a sanken sales representative that the contents set forth in this document reflect the latest revisions before use. the sanken products a re intended for use as components of general purpose electronic equipment or apparatus (such as home appliances, office equipment, telecommunication equipment, measuring equipment, etc.). prior to use of the sanken products, please put your signature, or a ffix your name and seal, on the specification documents of the sanken products and return them to sanken. when considering use of the sanken products for any applications that require high er reliability (such as transportation equipment and its control sys tems, traffic signal control systems or equipment , disaster/crime alarm systems, various safety devices, etc.), you must contact a sanken sales representative to discuss the suitability of such use and put your signature, or affix your name and seal, on th e specification documents of the sanken products and return them to sanken, prior to the use of the sanken products. the sanken products are not intended for use in any applications that require extremely high reliability such as: aerospace equipment; nucl ear power control systems; and medical equipment or systems, whose failure or malfunction may result in death or serious injury to people, i.e., medical devices in class iii or a higher class as defined by relevant laws of jap an (collectively, the specifi c applications). sanken assumes no liability or responsibility whatsoever for any and all damages and losses that may be suffered by you, users or any third party, resulting from the use of the sanken products in the specific applications or in manner not in compliance with the instructions set forth herein. in the event of using the sanken p roducts by either (i) combining other products or materials or both therewith or (ii) physically, chemically or otherwise processing or treating or both the same , you must duly consider all possible risks that may result from all such uses in advance and proceed therewith at your own responsibility. although sanken is making efforts to enhance the quality and reliability of its products, it is impossible to completely avoid the occurrence of any failure or defect or both in semiconductor products at a certain rate. you must take, at your own responsibility , preventative measures including using a sufficient safety design and confirming saf ety of any equipment or systems in/for which the sanken products are used, upon due consideration of a failure occurrence rate and derating, etc., in order not to cause any human injury or death, fire accident or social harm which may result from any failu re or malfunction of the sanken products. please refer to the relevant specification documents and sanken s official website in relation to derating. no a nti - radioactive ray design ha s been adopted for the sanken p roducts. the c ircuit constant , operation examples, circuit examples, pattern layout examples, design examples , recommended examples , all information and evaluation results based thereon, etc., described in this document are presented for the sole purpose of refe rence of use of the sanken products . sanken assume s no responsibility whatsoever for any and all damages and losses that may be suffered by you, users or any third party, or any possible infringement of any and all property rights including intellectual property rights and any other rights of you, u sers or any third party , result ing from the information . no information in this document can be transcribed or copied or both without sankens prior written consent. regarding the information, no license, express, implied or otherwise, is granted hereby under any intellectual property rights and any other rights of sanken. unless otherwise agreed in writing between sanken and you, sanken makes no warranty of any kind, whether express or implied, including, without limitation, any warranty (i) as to the quality or performance of the sanken products (such as implied warranty of merchantability, and implied warranty of fitness for a particular purpose or special environment), (ii) that any sanken product is delivered free of claims of third parties by way of infringement or the like, (iii) that may arise from course of performance, course of dealing or usage of trade, and (iv) as to the information (including its accuracy, usefulness, and reliability). in the event of using the sanken products, you must use the same after carefully examining all applicable environmental laws and regulations that regulate the inclusion or use or both of any particular controlled substances, including , but not limi ted to , the eu rohs directive , so as to be in strict compliance with such applicable laws and regulations . you must not use the sanken products or the information for the purpose of any military applications or use, including but not limited to the development of weapons of mass destruction. in the event of exporting the sanken products or the information , or providing them for non - residents, you must comply with all applicable export control laws and regulations in each country including the u.s. export administration regulations (ear) and the foreign exchan ge and foreign trade act of japan , and follow the procedures required by such applicable laws and regulations. sanken assumes no responsibility for any troubles, which may occur during the transportation of the sanken products including the falling thereof , out of sankens distribution network. although sanken has prepared this document with its due care to pursue the accuracy thereof, sanken does not warrant that it is error free and sanken assumes no liability whatsoever for any and all damages and losses which may be suffered by you resulting from any possible error s or omissions in connection with the information. please refer to our official website in relation to general instructions and directions for us ing the sanken products, and refer to the releva nt specification documents in relation to particular precautions when using the sanken products. all rights and title in and to any specific trademark or tradename belong to sanken and such original right holder(s). dsgn - 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