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? semiconductor components industries, llc, 2014 april, 2014 ? rev. 5 1 publication order number: ncp6361/d ncp6361 buck converter with bypass mode for rf power amplifiers the ncp6361, a pwm synchronous step?down dc?to?dc converter, is optimized for supplying rf power amplifiers (pas) used in 3g/4g wireless systems (mobile / smart phones, tablets, ? ) powered by single?cell lithium?ion batteries. the device is able to deliver up to 2 a current in bypass mode and 800 ma in buck mode. the output voltage is monitorable from 0.4 v to 3.5 v by an analog control pin vcon. the analog control allows dynamically optimizing the rf power amplifier?s efficiency th rough the monitoring of the pa output power. with an improved overall system efficiency the communication time and phone autonomy can be consequently increased. at light load for optimizing the dc?to?dc converter efficiency, the ncp6361 enters automatically in pfm mode and operates in a slower switching frequency. the ncp6361 enters in bypass mode when the desired output voltage becomes close to the input voltage (e.g.: low battery conditions). the device operates at 3.429 mhz or 6 mhz switching frequency. this way the system tuning can focus respectively either on a better ef ficiency (3.249 mhz) or on employing smaller value inductor and capacitors (6 mhz). synchronous rectification and automatic pfm / pwm / by?pass operating mode transitions improve overall solution efficiency. the ncp6361 has two versions: ncp6361a and ncp6361b. version b has a spread spectrum function for low emi operation. the ncp6361 is available in a space saving, low profile 1.36 x 1.22 mm csp?9 package. features ? input voltage from 2.5 v to 5.5 v for battery powered applications ? adjustable output voltage (0.4 v to 3.50 v) ? 3.429 / 6 mhz selectable switching frequency ? uses 470 nh inductor and 4.7 f capacitor for optimized footprint and solution thickness ? pfm /pwm/bypass automatic mode change for high efficiency ? low 45 a quiescent current ? thermal protections to avoid damage of the ic ? small 1.36 x 1.22 mm / 0.4 mm pitch csp package ? this is a pb?free device typical applications ? 3g / 4g wireless systems, smart?phones and webtablets battery or system supply 10uf 0.47uh 4.7uf v ncp6361 fb pvin sw pgnd enabling thermal protection bpen en agnd bypass control vcon vout control bypass dcdc 1.0a 3.43/6.00 mhz vbatt bypass enable figure 1. ncp6361 block diagram out fsel wlcsp9 case 567gm marking diagram http://onsemi.com see detailed ordering, marking and shipping information on page 19 of this data sheet. ordering information 6361x = specific device code x = a or b a = assembly location l = wafer lot y = year ww = work week = pb?free package 6361x alyww
ncp6361 http://onsemi.com 2 battery or system supply 10uf 0.47uh 4.7uf dcdc out ncp6361 fb pvin sw pgnd enabling thermal protection bpen en rev 0.00 agnd bypass control vcon vout control bypass dcdc 1.0a 3.43/6.00 mhz 3g/4g pas rf in antenna switch rf transceiver gpi/o dac gpi/o coupler rf out rf tx power envelop detection vbatt figure 2. typical application fsel gpi/o figure 3. ncp6361 internal block diagram pfm / pwm contoller ramp generator pvin vou t vcon thermal shutdown error amp lx cout cin fb sw bypass control logic block 3.43 / 6 mhz a1 agnd a2 pgnd a3 bpen c1 fsel b2 en b1 b3 c2 c3
ncp6361 http://onsemi.com 3 a1 a3 a2 c2 c1 b3 b2 c3 b1 bpen fb en fsel vcon agnd pgnd sw pvin 1.36 mm 1.22 mm figure 4. pin out (top view) pin function description pin name type description a1 vcon input voltage control analog input. this pin controls the output voltage. it must be shielded to protect against noise. v out = 2.5 x vcon a2 agnd ground analog ground. analog and digital modules ground. must be connected to the system ground. a3 pgnd ground dc?dc power ground. this pin is the power ground and carries high switching current. high quality ground must be provided to prevent noise spikes. to avoid high?density current flow in a limited pcb track, a local large ground plane is recommended. b1 en input enable control. active high will enable the part. there is an internal pull down resistor on this pin. b2 fsel input frequency selection pin. active low will select 6 mhz switching frequency. active high will select 3.429 mhz switching frequency. internal pull?down resistor connected to this pin. b3 sw power output dc?dc switch power. this pin connects the power transistors to one end of the inductor. typical application (6 mhz) uses 0.470 h inductor; refer to application section for more information. c1 bpen input bypass enable pin. set a high level to force bypass mode. set a low level for auto?bypass mode. internal pull?down resistor connected to this pin. c2 fb power input dcdc feedback voltage. must be connected to the output capacitor positive terminal. this is the input to the error amplifier. c3 pv in power input dcdc power supply. this pin must be decoupled to ground by a 10 f and 1 f ceramic capacitor. these capacitors should be placed as close as possible to this pin.
ncp6361 http://onsemi.com 4 maximum ratings rating symbol value unit analog and power pins: pv in , sw, fb v a ?0.3 to + 7.0 v vcon pin v vcon ?0.3 to + 2.5 v digital pins: en, bpen & fsel: input voltage input current v dg i dg ?0.3 to v a +0.3 7.0 10 v ma operating ambient temperature range t a ?40 to +85 c operating junction temperature range (note 1) t j ?40 to +125 c storage temperature range t stg ?65 to + 150 c maximum junction temperature t jmax ?40 to +150 c thermal resistance junction?to?ambient (note 2) r ja 85 c/w moisture sensitivity (note 3) msl level 1 stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device function ality should not be assumed, damage may occur and reliability may be affected. 1. the thermal shutdown set to 165 c (typical) avoids potential irreversible damage on the device due to power dissipation. 2. the junction?to?ambient thermal resistance is a function of printed circuit board (pcb) layout and application. this data is measured using 4?layer pcbs (2s2p). for a given ambient temperature t a it has to be pay attention to not exceed the max junction temperature t jmax . 3. moisture sensitivity level (msl): 1 per ipc/jedec standard: j?std?020a. operating conditions symbol parameter conditions min typ max unit pv in power supply (note 4) 2.5 5.5 v l inductor for dcdc converter (note 5) f = 6 mhz 0.47 h co output capacitor for dcdc converter (note 5) f = 6 mhz, l = 0.47 h 4.7 ? 33 f co output capacitor for dcdc converter (note 5) f = 6 mhz, l = 0.33 h 33 ? 220 f l inductor for dcdc converter (note 5) f = 3.429 mhz 1 h co output capacitor for dcdc converter (note 5) f = 3.429 mhz, l = 1 h 4.7 ? 33 f co output capacitor for dcdc converter (note 5) f = 3.429 mhz, l = 0.47 h 33 ? 220 f cin input capacitor for dcdc converter (note 5) 4.7 10 f functional operation above the stresses listed in the recommended operating ranges is not implied. extended exposure to stresse s beyond the recommended operating ranges limits may affect device reliability. 4. operation above 5.5 v input voltage for extended period may affect device reliability. 5. including de?ratings (refer to application information section of this document for further details)
ncp6361 http://onsemi.com 5 electrical characteristics min and max limits apply for t a up to +85 c unless otherwise specified. pv in = 3.6 v (unless otherwise noted). typical values are referenced to t a = + 25 c and default configuration symbol parameter conditions min typ max unit supply current: pin pv in i q operating quiescent current dcdc on ? no load ? no switching, en = high t a = up to +85 c ? 45 60 a i sleep product sleep mode current pv in = 2.5 v to 5.5 v v con < 0.1 v, en = high t a = up to +85 c ? 55 70 a i off product off current en = low pv in = 2.3 v to 5.5 v t a = up to +85 c ? 0.9 3 a dcdc converter pv in input voltage range 2.5 ? 5.5 v v out_min minimum output voltage v con = 0.16 v (note 8) 0.35 0.40 0.45 v v out_max maximum output voltage v con = 1.40 v (note 8) 3.45 3.50 3.55 v gain v con to v out gain 2.5 v/v v out_acc v out accuracy ideal = 2.5 x v con ?50 ?3 +50 +3 mv % f sw1 switching frequency fsel = 0 5.4 6 6.6 mhz f sw2 switching frequency fsel = 1 3.085 3.429 3.772 mhz r onhs p?channel mosfet on resistance from pv in to sw t j up to +85 c, pv in = 3.6 v ? 177 ? m r onls n?channel mosfet on resistance from sw1 to pgnd t j up to 85 c, pv in = 3.6 v ? 100 ? m r onbp bp mosfet on resistance from pv in to fb t j up to 85 c, pv in = 3.6 v ? 217 ? m i pkhs peak inductor current pmos ? 1.4 ? a i pkls peak inductor current nmos ? 1.0 ? a dc max maximum duty cycle ? 100 ? % efficiency pv in = 3.6 v, v out = 0.8 v i out = 10 ma, pfm mode pv in = 3.6 v, v out = 1.8 v i out = 200 ma, pwm mode pv in = 3.9 v, v out = 3.3 v i out = 500 ma, pwm mode 75 90 95 % % % line tr line transient response pv in = 3.6 v to 4.2 v i out = 100 ma, v out = 0.8 v t r = t f = 10 s 50 mv pk load tr load transient response pv in = 3.1 v / 3.6 v / 4.5 v i out = 50 to 150 ma t r = t f = 0.1 s 50 mv pk v con_bp_en vcon forced bypass mode enter 1.6 v v con_bp_ex vcon forced bypass mode exit 1.4 v 6. guaranteed by design and characterized. 7. operation above 5.5 v input voltage for extended periods may affect device reliability. 8. tested and guaranteed by correlation.
ncp6361 http://onsemi.com 6 electrical characteristics min and max limits apply for t a up to +85 c unless otherwise specified. pv in = 3.6 v (unless otherwise noted). typical values are referenced to t a = + 25 c and default configuration symbol unit max typ min conditions parameter en, bpen v ih positive going input high voltage threshold 1.1 ? ? v v il negative going input low voltage threshold ? ? 0.4 v total device i outmax pwm mode (note 6) 800 ma bp mode (note 6) 2000 ma t vcon v out step rise time pv in = 3.6 v, v out = 1.4 v to 3.4 v, c out = 4.7 f, r l = 12 , t r_vcon < 1 s 8 s v out step fall time pv in = 3.6 v, v out = 3.4 v to 1.4 v, c out = 4.7 f, r l = 12 , t f_vcon < 1 s 6 s t start soft?start time (time from en trans- itions from low to high to 90% of output voltage) pv in = 4.2 v, c out = 4.7 f, v out = 3.4 v, no load (note 8) ? 50 90 s t sp_en sleep mode enter time vcon < 75 mv ? 4 ? s t sp_ex sleep mode exit time vcon > 75 mv ? 5 ? s v bpneg auto bypass detection negative thresh- old pv in ? v out 200 mv v bppos auto bypass detection positive thresh- old pv in ? v out 320 mv v uvlo under voltage lockout pv in falling ? ? 2.4 v v uvloh under voltage lockout hysteresis pv in rising ? pv in falling 60 ? 200 mv t sd thermal shut down protection ? 155 ? c t sdh thermal shut down hysteresis ? 30 ? c 6. guaranteed by design and characterized. 7. operation above 5.5 v input voltage for extended periods may affect device reliability. 8. tested and guaranteed by correlation.
ncp6361 http://onsemi.com 7 typical operating characteristics pv in = en = 3.6 v, l = 0.47 h, c out = 4.7 f, c in = 10 f, f sw = 6 mhz, t a = 25 c (unless otherwise noted) figure 5. shutdown current vs input voltage (en = low, vcon = 0 v) figure 6. shutdown current vs temperature (t a ) (en = low, vcon = 0 v) figure 7. quiescent current vs. input voltage (en = high, vcon = 0.8 v, v out = 2 v) figure 8. quiescent current vs temperature (t a ) (en = high, vcon = 0.8 v, v out = 2 v) figure 9. sleep mode current vs. input voltage (en = high, vcon = 0 v, v out = 0 v) figure 10. sleep mode current vs. temperature (t a ) (en = high, vcon = 0 v, v out = 0 v)
ncp6361 http://onsemi.com 8 typical operating characteristics pv in = en = 3.6 v, l = 0.47 h, c out = 4.7 f, c in = 10 f, f sw = 6 mhz, t a = 25 c (unless otherwise noted) figure 11. 6 mhz switching frequency variation (fsw) vs. temperature figure 12. 3.429 mhz switching frequency variation (fsw) vs. temperature (l = 1 h) figure 13. by?pass pmos r ds(on) vs. pv in and temperature figure 14. high?side pmos r ds(on) vs. pv in and temperature figure 15. low?side nmos r ds(on) vs. pv in and temperature
ncp6361 http://onsemi.com 9 typical operating characteristics pv in = en = 3.6 v, l = 0.47 h, c out = 4.7 f, c in = 10 f, f sw = 6 mhz, t a = 25 c (unless otherwise noted) figure 16. efficiency vs output current vs pv in @25 c, fsw = 6 mhz, v out = 0.8 v figure 17. efficiency vs output current vs temperature pv in = 3.6 v, fsw = 6 mhz, v out = 0.8 v figure 18. efficiency vs output current vs pv in @25 c, fsw = 6 mhz, v out = 1.8 v figure 19. efficiency vs output current vs temperature pv in = 3.6 v, fsw = 6 mhz, v out = 1.8 v figure 20. efficiency vs output current vs pv in @25 c, fsw = 6 mhz, v out = 3.3 v figure 21. efficiency vs output current vs temperature pv in = 3.6 v, fsw = 6 mhz, v out = 3.3 v
ncp6361 http://onsemi.com 10 typical operating characteristics pv in = en = 3.6 v, l = 1 h, c out = 4.7 f, c in = 10 f, f sw = 3.429 mhz, t a = 25 c (unless otherwise noted) figure 22. efficiency vs output current vs pv in @25 c, fsw = 3.429 mhz, v out = 0.8 v figure 23. efficiency vs output current vs temperature pv in = 4.2 v, fsw = 3.429 mhz, v out = 0.8 v figure 24. efficiency vs output current vs pv in @25 c, fsw = 3.429 mhz, v out = 1.8 v figure 25. efficiency vs output current vs temperature pv in = 4.2 v, fsw = 3.429 mhz, v out = 1.8 v figure 26. efficiency vs output current vs pv in @25 c, fsw = 3.429 mhz, v out = 3.3 v figure 27. efficiency vs output current vs temperature pv in = 4.2 v, fsw = 3.429 mhz, v out = 3.3 v
ncp6361 http://onsemi.com 11 typical operating characteristics pv in = en = 3.6 v, l = 0.47 h, c out = 4.7 f, c in = 10 f, f sw = 6 mhz, t a = 25 c (unless otherwise noted) figure 28. v out accuracy vs output current vs pv in @ 25 c, fsw = 6 mhz, v out = 0.8 v figure 29. v out accuracy vs output current vs temperature pv in = 3.6 v, fsw = 6 mhz, v out = 0.8 v figure 30. v out accuracy vs output current vs pv in @ 25 c, fsw = 6 mhz, v out = 1.8 v figure 31. v out accuracy vs output current vs temperature pv in = 3.6 v, fsw = 6 mhz, v out = 1.8 v figure 32. v out accuracy vs output current vs pv in @ 25 c, fsw = 6 mhz, v out = 3.3 v figure 33. v out accuracy vs output current vs temperature pv in = 3.6 v, fsw = 6 mhz, v out = 3.3 v
ncp6361 http://onsemi.com 12 typical operating characteristics pv in = en = 3.6 v, l = 1 h, c out = 4.7 f, c in = 10 f, f sw = 3.429 mhz, t a = 25 c (unless otherwise noted) figure 34. v out accuracy vs output current vs pv in @ 25 c, fsw = 3.429 mhz, v out = 0.8 v figure 35. v out accuracy vs output current vs temperature pv in = 4.2 v, fsw = 3.429 mhz, v out = 0.8 v figure 36. v out accuracy vs output current vs pv in @ 25 c, fsw = 3.429 mhz, v out = 1.8 v figure 37. v out accuracy vs output current vs temperature pv in = 4.2 v, fsw = 3.429 mhz, v out = 1.8 v figure 38. v out accuracy vs output current vs pv in @ 25 c, fsw = 3.429 mhz, v out = 3.3 v figure 39. v out accuracy vs output current vs temperature pv in = 3.6 v, fsw = 3.429 mhz, v out = 3.3 v
ncp6361 http://onsemi.com 13 typical operating characteristic pv in = en = 3.6 v, l = 0.47 h, c out = 4.7 f, c in = 10 f, f sw = 6 mhz, t a = 25 c (unless otherwise noted) figure 40. transient response v out vs vcon r l = 10 , v out = 0.4 v to 3.5 v, pv in = 3.9 v figure 41. line transient response pv in = 3.6 v to 4.2 v, r l = 10 , v out = 2.5 v figure 42. output voltage waveforms in pfm mode i out = 50 ma, v out = 2.5 v figure 43. output voltage waveforms in pwm mode i out = 250 ma, v out = 2.5 v figure 44. load transient response i out = 10 to 250 ma, v out = 2.5 v figure 45. load transient response i out = 50 ma to 150 ma, v out = 0.8 v i l i l
ncp6361 http://onsemi.com 14 typical operating characteristics (results based on silicon rev1.0 ? rev 1.1 to come) pv in = en = 3.7 v, l = 0.47 h, cout = 4.7 f, c in = 10 f, f sw = 6 mhz, t a = 25 c (unless otherwise noted) figure 46. power?up transient response pv in = 3.9 v, vout = 3.4 v, iout = 150 ma figure 47. power?up transient response pv in = 3.9 v, vout = 3.4 v, iout = 800 ma figure 48. power?down transient response pv in = 3.7 v, vout = 3.4 v, rl = 10 i l i l i l
ncp6361 http://onsemi.com 15 operating description general description the ncp6361 is a voltage?mode standalone synchronous step?down dc?to?dc converter designed to supply rf power amplifiers (pas) used in 3g/4g wireless systems (mobile / smart phones, tablets, ? ) powered by single?cell lithium?ion batteries. the ic can deliver up to 800 ma when operating in pwm mode and up to 2 a when in by?pass operating mode. the buck converter output voltage ranging from 0.4 v to 3.5 v can be monitored by the system?s pa output rf power through the c ontrol pin vcon. the control voltage range is from 0.16 v to 1.4 v and vout is equal to 2.5 times this control voltage. vcon allows the pa to have its efficiency dynamically optimized during communication calls in the case for example of roaming situation or data transmission involving a constant adjustment of the pa output power. the value?added benefit is an increase of the absolute talk time. synchronous rectification and automatic pfm / pwm / by?pass operating mode transitions improve overall solution efficiency. the device operates at 3.429 mhz or 6 mhz switching frequency. this way tuning the dc?to?dc converter can focus respectively either on a better ef ficiency (3.429 mhz) or on employing smaller value inductor and capacitors (6 mhz). these two switching frequencies are selectable using a dedicated pin fsel. a by?pass mode is also supported and is enable automatically or can be forced through the bpen pin. the output voltage is the copy of the battery input voltage minus a drop?out voltage resulting from the by?pass mosfet transistor?s low on?state resistance in parallel with the high?side fet rdson resistance added to the inductor series resistance. protections are also implemented for preventing the device against over?current or short?circuit event or over junction temperature situation. buck dc?to?dc converter operating the converter is a synchronous rectifier type with both high side and low side integrated switches. in addition it includes a by?pass mosfet transistor. neither external transistor nor diodes are required for ncp6361 operation. feedback and compensation network are also fully integrated. the device can operate in five different modes: shutdown mode (en = low, device off), sleep mode when vcon below about 0.1 v, pfm mode for efficiency optimization purpose when operating at light load, pwm mode when operating in medium and high loads and bypass mode when pv in (vbatt) is close to vout (low battery situation). the transitions between pwm, pfm and by?pass modes occur automatically. shutdown mode the ncp6361 enters shutdown mode when setting the en pin low (below 0.4 v) or when pv in drops below its uvlo threshold value. in shutdown mode, the internal reference, oscillator and most of the control circuitries are turned off. the typical current consumption is 0.9 a. applying a voltage above 1.1 v to en pin will enable the device for normal operation. a soft?start sequence is run when activating en high. en pin should be activated after the input voltage is applied. pwm (pulse width modulation) operating mode in medium and high load conditions, the ncp6361 operates in pwm mode from a fixed clock (3.43 mhz or 6 mhz) and adapts its duty cycle to regulate the desired output voltage. in this mode, the inductor current is in ccm (continuous current mode) and the voltage is regulated by pwm. the internal n?mosfet switch operates as synchronous rectifier and is driven complementary to the p?mosfet switch. in ccm, the lower switch (n?mosfet) in a synchronous converter provides a lower voltage drop than the diode in an asynchronous converter, which provides less loss and higher efficiency. pfm (pulse frequency modulation) operating mode in order to save power and improve ef ficiency at low loads the ncp6361 operates in pfm mode as the inductor drops into dcm (discontinuous current mode). the upper fet on time is kept constant and the switching frequency is variable. output voltage is regulated by varying the switching frequency which becomes proportional to loading current. as it does in pwm mode, the internal n?mosfet operates as synchronous rectifier after each p?mosfet on?pulse. when load increases and current in inductor becomes continuous again, the controller automatically turns back to pwm mode. by?pass operating mode the ncp6361 has been designed to manage low battery conditions when pv in or vbat becomes close to the required vout output voltage. in that case the ncp6361 enters by?pass operating mode (or wire mode). to this end a specific low resistance on?state by?pass mosfet is included and activated while the buck converter low side n?mosfet is set off. the pa is then directly powered by the battery. the output voltage is the copy of the input voltage minus a drop?out voltage resulting from the resistance of the bp mosfet in parallel with the high?side p?mosfet plus the inductor: the consequence is a resulting resistance smaller than the available one ? p?mosfet + inductor ? when in pwm mode and 100% duty cycle. in that specific case the by?pass mode offers a better efficiency. the by?pass mode is triggered automatically when pv in = v out + 200 mv typically. the ncp6361 exit automatically the by?pass mode when pv in = v out + 320 mv typically. nevertheless it is possible to force the by?pass mode by setting the pin bpen high. in by?pass mode the ncp6361 is capable to source a current of up to 2 a.
ncp6361 http://onsemi.com 16 sleep mode the ncp6361 device enters the sleep mode in about 4 s when the control voltage vcon goes below typically 70 mv. vout is extremely low, close to 0 v and in a state out of regulation. in this vout condition the sleep mode enables a low current state (55 a typical range). the buck converter exits the sleep mode and returns in a regulation state when vcon goes above 110 mv after typically 5 s. inductor peak current limitations during normal operation, peak current limitation will monitor and limit the current through the inductor. this current limitation is particularly useful when size and/or height constrain inductor power. the high side switch (hss) peak current limitation is typically 1.4 a, while the low side switch (lss) has a peak current up to 1.0 a. the hss peak current contributes to limit the current during soft start sequence in high load conditions (see figure 46). under?voltage lockout (uvlo) ncp6361 core does not operate for voltages below the under voltage lock out (uvlo) level. below uvlo threshold, all internal circuitry (both analog and digital) is held in reset. ncp6361 operation is not guaranteed down to vuvlo when battery voltage is dropping off. to avoid erratic on / off behavior, a maximum 100 mv hysteresis is implemented. restart is guaranteed at 2.6 v when vbat voltage is recovering or rising. power?up / power?down sequencing the en pin controls ncp6361 start up. en pin low to high transition starts the power up sequencer which is combined with a soft start consisting to limit the inrush current at 800 ma while the output voltage is establishing. if en is made low, the dc to dc converter is turned off and device enters shutdown mode. a built?in pull?down resistor disables the device when this pin is left unconnected or not driven. wake up time~ 30 s pv in en v out por rising uvlo< 2.6 v soft start 800ma hss ipeak i out figure 49. power?up sequence in order to power up the circuit, the input voltage pvin has to rise above the uvlo threshold (rising uvlo). this triggers the internal core circuitry power up which is the ?wake up time? (including ?bias time?). this delay is internal and cannot be bypassed. the power down sequence is triggered by setting low the en pin. the output voltage goes down to 0 v. thermal shutdown feature (tsd) the thermal capability of ic can be exceeded due to step down converter output stage power level. a thermal protection circuitry is therefore implemented to prevent the ic from damage. this protection circuitry is only activated when the core is in active mode (output voltage is turned on). during thermal shut down, output voltage is turned off and the device enters sleep mode. thermal shut down threshold is set at 155 c (typical) when the die temperature increases and, in order to avoid erratic on / off behavior, a 30 c hysteresis is implemented. so, after a typical 155 c thermal shut down, the ncp6361 will return to normal operation when the die temperature cools to 120 c. this normal operation depends on the input conditions and configuration at the time the device recovers. spread spectrum the ncp6361a version operates at a constant frequency while the ncp6361b has a spread spectrum mode activated. the switching frequency is dithered around a center frequency of 3.429 mhz (fsel = high) or of 6 mhz (fsel = low) depending on the fsel position selected. spread spectrum lowers noise at the regulated output and at the input. the spread?spectrum modulation technique spreads the energy of switching frequency and harmonics over a wider band while reducing their peaks. this option can help to meet stringent emi goals. the spread?spectrum feature implemented consists in adding spurs generated from a 24 mhz on?chip oscillator with the result of spreading the buck?s switching frequency. this option allows reducing the peak power at the switching frequency by about 10 db and by the way reduces the noise level compared to a standard mode of operation. the ncp6361b can definitely be used for emi?sensitive applications.
ncp6361 http://onsemi.com 17 application information figure 50. typical application schematic battery or system supply 10uf 0.47uh 4.7uf dcdc out ncp6361 fb pvin sw pgnd enabling thermal protection bpen en rev 0.00 agnd bypass control vcon vout control bypass dcdc 1.0a 3.43/6.00 mhz 3g/4g pas rf in antenna switch rf transceiver gpi/o dac gpi/o coupler rf out rf tx power envelop detection vbatt fsel gpi/o output filter design considerations the output filter introduces a double pole in the system at a frequency of: f lc 1 2 l c (eq. 1) the ncp6361 internal compensation network is optimized for a typical output filter comprising a 470 nh inductor and one 4.7 f capacitor as described in the basic application schematic figure 50. inductor selection the inductance of the inductor is determined by given peak?to?peak ripple current i lpp of approximately 20% to 50% of the maximum output current i outmax for a trade?off between transient response and output ripple. the selected inductor must have high enough saturation current rating to be higher than the maximum peak current that is: i lmax i outmax i lpp 2 (eq. 2) the inductor also needs to have high enough current rating in regards to temperature rise. low dcr is good for efficiency improvement and temperature rise reduction. tables 1 and 2 show recommended inductor references. table 1. recommended inductors when operating at 6 mhz supplier part# value ( h) size (l x l x t) (mm) dc rated current (a) dcr max @ 25 c (m ) tdk tfm201610a?r47m?t00 0.47 20x16x1 3.5 46 tdk tfm201210a?r47m?t00 0.47 20x12x1 2.5 65 toko dfe201610r?r47m?t00 0.47 20x16x1 3.8 48 toko dfe201610a?r47m?t00 0.47 20x16x1 3.7 58
ncp6361 http://onsemi.com 18 table 2. recommended inductors when operating at 3.43 mhz supplier part # value ( h) size (l x l x t) (mm) dc rated current (a) dcr max @ 25 c (m ) tdk tfm201610a?1r0m?t00 1 20x16x1 2.9 75 toko dfe201610r?1r0m?t00 1 20x16x1 2.7 79 output capacitor selection the output capacitor selection is determined by output voltage ripple and load transient response requirement. for high transient load performance high output capacitor value must be used. for a given peak?to?peak ripple current i lpp in the inductor of the output filter, the output voltage ripple across the output capacitor is the sum of three components as below. v outpp v outpp(c) v outpp(esr) v outpp(esl) (eq. 3) where v outpp(c) is the ripple component coming from an equivalent total capacitance of the output capacitors, v outpp(esr) is a ripple component from an equivalent esr of the output capacitors, and v outpp(esl) is a ripple component from an equivalent esl of the output capacitors. in pwm operation mode, the three ripple components can be obtained by v outpp(c) i l_pp 8 c f sw (eq. 4) v outpp(esr) i lpp esr (eq. 5) v out_pp(esl) esl esl l v in (eq. 6) and the peak?to?peak ripple current is: i lpp pv in v out v out pv in f sw l (eq. 7) in applications with all ceramic output capacitors, the main ripple component of the output ripple is v outpp (c). so that the minimum output capacitance can be calculated regarding to a given output ripple requirement v outpp in pwm operation mode. c min i lpp 8 v outpp f sw (eq. 8) input capacitor selection one of the input capacitor selection guides is the input voltage ripple requirement. to minimize the input voltage ripple and get better decoupling in the input power supply rail, ceramic capacitor is recommended due to low esr and esl. the minimum input capacitance regarding the input ripple voltage v inpp is c inmin i outmax d d 2 v inpp f sw (eq. 9) where d v out v in (eq. 10) in addition the input capacitor needs to be able to absorb the input current, which has a rms value of: i inrms i outmax d d 2 (eq. 11) the input capacitor needs also to be sufficient to protect the device from over voltage spike and a minimum of 4.7 f capacitor is required. the input capacitor should be located as close as possible to the ic. pgnd is connected to the ground terminal of the input cap which then connects to the ground plane. the pv in is connected to the v bat terminal of the input capacitor which then connects to the v bat plane. layout and pcb design recommendations good pcb layout helps high power dissipation from a small package with reduced temperature rise. thermal layout guidelines are: ? a four or more layers pcb board with solid ground planes is preferred for better heat dissipation. ? more free vias are welcome to be around ic to connect the inner ground layers to reduce thermal impedance. ? use large area copper especially in top layer to help thermal conduction and radiation. ? use two layers for the high current paths (pvin, pgnd, sw) in order to split current in two different paths and limit pcb copper self heating. (see demo board example figure 52)
ncp6361 http://onsemi.com 19 0402 1.5 x 0.9 mm 4.1 mm 2.5 mm s < 10.3 mm2 pgnd sw vcon en agnd bpen fsel fb pvin 0402 1.5 x 0.9 mm tfm201210 2.0 x 1.2 mm figure 51. layout minimum recommended occupied space using 0402 capacitors and 0805 (2.0 x1.2 x1 mm) inductor input capacitor placed as close as possible to the ic. ? pv in directly connected to cin input capacitor, and then connected to the vin plane. local mini planes used on the top layer (green) and layer just below top layer with laser vias. ? agnd directly connected to the gnd plane. ? pgnd directly connected to cin input capacitor, and then connected to the gnd plane: local mini planes used on the top layer (green) and layer just below top layer with laser vias. ? sw connected to the lout inductor with local mini planes used on the top layer (green) and layer just below top layer with laser vias. figure 52. example of pcb implementation (pcb case with 0805 (2.0x1.2 mm) capacitors and 2016 (2.0 x 1.6 x 1 mm) inductors ordering information device spread?sprectrum option (f sw ) package shipping ? ncp6361afcct1g no wlcsp9 (pb?free) 3000 / tape & reel NCP6361BFCCT1G yes ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. evaluation boards: ncp6361agevb and ncp6361bevb evaluation boards are available under request. contact local sales representative or sales office.
ncp6361 http://onsemi.com 20 package dimensions wlcsp9, 1.36x1.22 case 567gm issue a 0.40 0.25 9x dimensions: millimeters *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* recommended a1 package outline pitch 0.40 pitch seating plane 0.10 c notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. coplanarity applies to the spherical crowns of the solder balls. 2x dim a min max ??? millimeters a1 d 1.36 bsc e b 0.24 0.29 e 0.40 bsc 0.60 d e a b pin a1 reference a 0.05 b c 0.03 c 0.05 c 9x b 12 3 c b a 0.10 c a a1 a2 c 0.17 0.23 1.22 bsc 0.10 c 2x top view side view bottom view note 3 e e a2 0.36 ref a3 detail a a2 detail a a3 0.02 0.04 on semiconductor and are registered trademarks of semiconductor co mponents industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other inte llectual property. a listing of scillc?s pr oduct/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent?marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typical s? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or us e scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unin tended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyrig ht laws and is not for resale in any manner. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 ncp6361/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative

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