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this is preliminary information on a new product now in development or undergoing evaluation. details are subject to change without notice. june 2014 docid026516 rev 1 1/13 STP12N50M2 n-channel 500 v, 0.325 ? typ.,10 a mdmesh ii plus? low q g power mosfet in a to-220 package datasheet - preliminary data figure 1. internal schematic diagram features ? extremely low gate charge ? lower r ds(on) x area vs previous generation ? low gate input resistance ? 100% avalanche tested ? zener-protected applications ? switching applications description this device is an n-channel power mosfet developed using a new generation of mdmesh? technology: mdmesh ii plus? low q g . this revolutionary power mosfet associates a vertical structure to the company's strip layout to yield one of the world's lowest on-resistance and gate charge. it is therefore suitable for the most demanding high efficiency converters. . am15572v1 , tab 7 2 7 $ % order code v ds r ds(on) max i d STP12N50M2 500 v 0.38 10 a table 1. device summary order code marking package packaging STP12N50M2 12n50m2 to-220 tube www.st.com
contents STP12N50M2 2/13 docid026516 rev 1 contents 1 electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 docid026516 rev 1 3/13 STP12N50M2 electrical ratings 13 1 electrical ratings table 2. absolute maximum ratings symbol parameter value unit v gs gate-source voltage 25 v i d drain current (continuous) at t c = 25 c 10 a i d drain current (continuous) at t c = 100 c 7 a i dm (1) 1. pulse width limited by safe operating area. drain current (pulsed) 40 a p tot total dissipation at t c = 25 c 85 w dv/dt (2) 2. i sd 10 a, di/dt 400 a/ s; v ds peak < v (br)dss , v dd =400 v. peak diode recovery voltage slope 15 v/ns dv/dt (3) 3. v ds 400 v mosfet dv/dt ruggedness 50 v/ns t stg storage temperature - 55 to 150 c t j max. operating junction temperature table 3. thermal data symbol parameter value unit r thj-case thermal resistance junction-case max 1.47 c/w r thj-amb thermal resistance junction-amb max 62.5 c/w table 4. avalanche characteristics symbol parameter value unit i ar avalanche current, repetitive or not repetitive (pulse width limited by t jmax ) 3.5 a e as single pulse avalanche energy (starting t j =25c, i d = i ar ; v dd =50) 204 mj electrical characteristics STP12N50M2 4/13 docid026516 rev 1 2 electrical characteristics (t c = 25 c unless otherwise specified) table 5. on /off states symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 1 ma, v gs = 0 500 v i dss zero gate voltage drain current v gs = 0, v ds = 500 v 1 a v gs = 0, v ds = 500 v, t c =125 c 100 a i gss gate-body leakage current v ds = 0, v gs = 25 v 10 a v gs(th) gate threshold voltage v ds = v gs , i d = 250 a 234v r ds(on) static drain-source on-resistance v gs = 10 v, i d = 5 a 0.325 0.38 table 6. dynamic symbol parameter test conditions min. typ. max. unit c iss input capacitance v gs = 0, v ds = 100 v, f = 1 mhz - 560 - pf c oss output capacitance - 33 - pf c rss reverse transfer capacitance -1-pf c oss eq. (1) 1. c oss eq. is defined as a constant equivalent capacitance giving the same charging time as c oss when v ds increases from 0 to 80% v dss equivalent output capacitance v gs = 0, v ds = 0 to 400 v - 125 - pf r g intrinsic gate resistance f = 1 mhz open drain - 6.8 - q g total gate charge v dd = 400 v, i d = 10 a, v gs = 10 v (see figure 15 ) -15-nc q gs gate-source charge - 3 - nc q gd gate-drain charge - 8.3 - nc docid026516 rev 1 5/13 STP12N50M2 electrical characteristics 13 table 7. switching times symbol parameter test conditions min. typ. max. unit t d(on) turn-on delay time v dd = 250 v, i d = 5 a, r g = 4.7 , v gs = 10 v (see figure 14 and 19 ) - 13.5 - ns t r rise time - 10.5 - ns t d(off) turn-off delay time - 8 - ns t f fall time - 34.5 - ns table 8. source drain diode symbol parameter test conditions min. typ. max. unit i sd source-drain current - 10 a i sdm (1) 1. pulse width limited by safe operating area source-drain current (pulsed) - 40 a v sd (2) 2. pulsed: pulse duration = 300 s, duty cycle 1.5% forward on voltage v gs = 0, i sd = 10 a - 1.6 v t rr reverse recovery time i sd = 10 a, di/dt = 100 a/ s v dd = 60 v (see figure 16 ) -276 ns q rr reverse recovery charge - 2.4 c i rrm reverse recovery current - 17.5 a t rr reverse recovery time i sd = 10 a, di/dt = 100 a/ s v dd = 60 v, t j =150 c (see figure 16 ) -376 ns q rr reverse recovery charge - 3.4 c i rrm reverse recovery current - 18.3 a electrical characteristics STP12N50M2 6/13 docid026516 rev 1 2.1 electrical characteristics (curves) figure 2. safe operating area figure 3. thermal impedance figure 4. output characteristics figure 5. transfer characteristics figure 6. gate charge vs gate-source voltage figure 7. static drain-source on-resistance , ' 9 ' 6 9 $ 2 s h u d w l r q l q w k l v d u h d l v / l p l w h g e \ p d [ 5 ' 6 r q ? v p v ? v 7 m ? & 7 f ? & 6 l q j o h s x o v h p v * , 3 * 6 $ , ' 9 ' 6 9 $ 9 9 9 * 6 9 9 9 * , 3 * 6 $ , ' 9 * 6 9 $ 9 ' 6 9 * , 3 * 6 $ 9 * 6 4 j q & |