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www.irf.com iraudamp5 rev 3.3 iraudamp5 120w x 2 channel class d audio power amplifier using the irs2092s and irf6645 by jun honda, manuel rodrguez and jorge cerezo fig 1 caution: international rectifier s uggests the following guidelines for safe operation and handling of iraudamp5 demo board; ? always wear safety glasses when ever operating demo board ? avoid personal contact with expo sed metal surfaces when operating demo board ? turn off demo board when placing or removing measurement probes
www.irf.com page 1 of 49 iraudamp5 rev 3.3 table of contents page introduction?????????? ???????????????.. 2 specifications????????????????????????? 3 connection setup?????????????????????.?? 4 test procedure????? ???????????????????... 5 typical performance??????????????????????. 5-9 theory of operation??????????????????????. 9-10 irs2092s system overview??????????????????? 10-11 selectable dead time?????????????????????? 11-12 protection features??????????????????????? 12-17 efficiency??????????????????????????.. 17-18 thermal considerations????????????????????? 18 click and pop noise control???????????????????. 18-19 startup and shutdown sequencing????????????????? 19-21 psrr????????????????????????????. 21-22 bus pumping?????????????????????????.. 22-23 input/output signal and volume control??????????????. 23-26 self oscillating pwm modulator?????????????????.. 27 switches and indicators?????????????????????. 28 frequency lock, synchronization feature?????????????? 29 schematics??????????????????????????. 31-35 bill of materials???????????????????????? 36-39 hardware??????????????????????????? 40 pcb specifications???????????????????????. 41 assembly drawings????? ?????????????????... 42-48 revision changes descriptions 49
www.irf.com page 2 of 49 iraudamp5 rev 3.3 introduction the iraudamp5 reference design is a two-ch annel, 120w half-bridge class d audio power amplifier. this reference design demonstrates how to use the irs2092s class d audio controller and gate driver ic, implement protection circu its, and design an optimum pcb layout using the irf6645 directfet mosfets. the resulting design requires no heatsink for normal operation (one-eighth of continuous rated power). the reference design provides all the required housekeeping power supplies for ease of use. the two-channel design is scalable for power and the number of channels. applications av receivers home theater systems mini component stereos powered speakers sub-woofers musical instrument amplifiers automotive after market amplifiers features output power: 120w x 2 channels, total harmonic distortion (thd+n) = 1%, 1 khz residual noise: 170 ? v, ihf-a weighted, aes-17 filter distortion: 0.005% thd+n @ 60w, 4 ? efficiency: 96% @ 120w, 4 ? , single-channel driven, class d stage multiple protection features: over-current protection (ocp), high side and low side over-voltage protection (ovp), under-voltage protection (uvp), high side and low side dc-protection (dcp), over-temperature protection (otp) pwm modulator: self-oscillating half-bridge topology with optional clock synchronization
www.irf.com page 3 of 49 iraudamp5 rev 3.3 specifications general test conditions (unless oth erwise noted) notes / conditions supply voltage 35v load impedance 8-4 ? self-oscillating frequency 400khz no input signal, adjustable gain setting 26db 1vrms input yields rated power electrical data typical notes / conditions ir devices used irs2092s audio controller and gate-driver, irf6645 directfet mosfets modulator self-oscillating, second order sigma-delta modulation, analog input power supply range 25v to 35v bipolar power supply output power ch1-2: (1% thd+n) 120w 1khz output power ch1-2: (10% thd+n) 170w 1khz rated load impedance 8-4 ? resistive load standby supply current 100ma no input signal total idle power consumption 7w no input signal channel efficiency 96% single-channel driven, 120w, class d stage . audio performance * before demodulator class d output notes / conditions thd+n, 1w thd+n, 10w thd+n, 60w thd+n, 100w 0.009% 0.003% 0.003% 0.008% 0.01% 0.004% 0.005% 0.010% 1khz, single-channel driven dynamic range 101db 101db a-weighted, aes-17 filter, single-channel operation residual noise, 22hz - 20khzaes17 170 ? v 170 ? v self-oscillating ? 400khz damping factor 2000 170 1khz, relative to 4 ? load channel separation 95db 85db 75db 90db 80db 65db 100hz 1khz 10khz frequency response : 20hz-20khz : 20hz-35khz n/a 1db 3db 1w, 4 ? - 8 ? load thermal performance typical notes / conditions idling t c =30 ? c t pcb =37 ? c no signal input, t a =25 ? c 2ch x 15w (1/8 rated power) t c =54 ? c t pcb =67 ? c continuous, t a =25 ? c 2ch x 120w (rated power) t c =80 ? c t pcb =106 ? c at otp shutdown @ 150 sec, t a =25 ? c physical specifications dimensions 5.8?(l) x 5.2?(w)
www.irf.com page 4 of 49 iraudamp5 rev 3.3 note: class d specifications are typical * before demodulator refers to audio performan ce measurements of the class d output power stage only, with preamp and output filter bypassed this means performance measured before the low pass filter. connection setup typical test setup fig 2 connector description ch1 in j6 analog input for ch1 ch2 in j5 analog input for ch2 power j7 positive and negative supply (+b / -b) ch1 out j3 output for ch1 ch2 out j4 output for ch2 ext clk j8 external clock sync dcp out j9 dc protection relay output volume j6 j5 j3 j4 j7 r113 s3 s2 tp1 tp2 ch1 output ch2 output ch1 input ch2 input g protection normal s1 led 35v, 5a dc supply 4 ohm 4 ohm 35v, 5a dc supply 250w, non-inductive resistors j8 j9 audio signal generator
www.irf.com page 5 of 49 iraudamp5 rev 3.3 test procedures 1. connect 4 ? , 250w load to outputs connectors, j3 and j4 and audio precision analyzer (ap). 2. connect audio signal generator to j6 a nd j5 for ch1 and ch2 respectively (ap). 3. connect a dual power supply to j7, pre-adjusted to 35v, as shown in figure 2 above. 4. set switch s3 to middle position (self oscillating). 5. set volume level knob r108 fully counter-clockwise (minimum volume). 6. turn on the power supply. note: always appl y or remove the 35v at the same time. 7. orange led (protection) should turn on almo st immediately and turn off after about 3s. 8. green led (normal) then turns on after orange led is extinguished and should stay on. 9. one second after the green led turns on; the two blue leds on the daughter board should turn on and stay on for each channel, indicating that a pwm signal is present at lo 10. with an oscilloscope, monitor switching wave form at test points tp1 and tp2 of ch1 and ch2 on daughter board. 11. if necessary, adjust the self-oscillating sw itching frequency of audamp5 to 400khz ? 5khz using potentiometer r29p. for ir audamp5, the self-oscillating switching frequency is pre-calibrated to 400 khz. to m odify the audamp5 frequency, change the values of potentiometers r21 and r22 for ch1 and ch2 respectively. 12. quiescent current for the positive supply should be 70ma ? 10ma at +35v. 13. quiescent current for the negative supply should be 100ma ? 10ma at ?35v. 14. push s1 switch, (trip and reset push-button) to restart the sequence of leds indicators, which should be the same as noted above in steps 6-9. audio tests: 15. apply 1 v rms at 1khz from the audio signal generator 16. turn control volume up (r108 clock-wise) to obtain an output reading of 100watts for all subsequent tests as shown on the audio pr ecision graphs below, where measurements are across j3 and j2 with an aes-17 filter typical performance the tests below were performed under the following conditions: b supply = 35v, load impedance = 4 ? resistive load, 1khz audio signal, self oscillator @ 400khz and internal volume-cont rol set to give required output with 1vrms input signal, with aes-17 filter, unless otherwise noted.
www.irf.com page 6 of 49 iraudamp5 rev 3.3 thd versus power: 0.001 10 0.002 0.005 0.01 0.02 0.05 0.1 0.2 0.5 1 2 5 % 100m 200 200m 500m 1 2 5 10 20 50 100 w blue, ch1 - 4 ohm red, ch2 - 4 ohm figure 18. total harmonics distortio n + noise (thd+n) versus power output fig 3 -10 +4 -9 -8 -7 -6 -5 -4 -3 -2 -1 -0 +1 +2 +3 d b r a 20 200k 50 100 200 500 1k 2k 5k 10k 20k 50k 100k hz frequency response: red ch1 - 4 ohm, 2v output blue ch1 - 8 ohm, 2v output frequency characteristics vs. load impedance fig 4
www.irf.com page 7 of 49 iraudamp5 rev 3.3 . thd versus frequency: 0.0001 100 0.0005 0.001 0.01 0.05 0.1 1 5 10 50 % 20 20k 50 100 200 500 1k 2k 5k 10k hz pink ch1, 1w output blue ch1, 10w output cyan ch1, 50w output green ch1, 100w output thd+n ratio vs. frequency fig 5 . frequency spectrum : -110 +0 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b v 10 20k 20 50 100 200 500 1k 2k 5k 10k hz red ch1, 1v, 1khz, self oscillator @ 400khz blue ch2, 1v, 1khz, self oscillator @ 400khz fig 6 frequency spectrum
www.irf.com page 8 of 49 iraudamp5 rev 3.3 . floor noise: -140 +20 -120 -100 -80 -60 -40 -20 +0 d b v 10 20k 20 50 100 200 500 1k 2k 5k 10k hz red ch1 - acd, no signal, self oscillator @ 400khz blue ch2 - acd, no signal, self oscillator @ 400khz fig 7 residual noise (acd) . channel separation: -120 +0 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b 20 20k 50 100 200 500 1k 2k 5k 10k hz red ch1 ? ch2, 60w blue ch2 ? ch1, 60w fig 8 channel separation vs. frequency
www.irf.com page 9 of 49 iraudamp5 rev 3.3 . clipping characteristics: 60w / 4 ? , 1khz, thd+n=0.008% 174w / 4 ? , 1khz, thd+n=10% measured output an d distortion waveforms fig 9 . iraudamp5 theory of operation referring to fig 10 below, the input error amplifier of the irs2092s forms a front-end second- order integrator with c1, c21, c23 and r21. this integrator also receives a rectangular feedback waveform from r31, r33 and c17 into the summing node at in- from the class d power stage switching node (connection of directfet q3 an d directfet q4). the quadratic oscillatory waveform of the switch node serves as a power ed carrier signal from which the audio is recovered at the speaker load through a single-stag e lc filter. the modulated signal is created by the fluctuations of the analog inpu t signal at r13 that shifts the average value of this quadratic waveform through the gain relati onship between r13 and r31 + r33 so that the duty cycle varies according to the instantaneous signal level of the analog input signal at r13. r33 and c17 act to immunize the rectangular waveform from possible narrow noise spikes that may be created by parasitic impedances on the power output stage. the irs2092s input integrator then processes the signal from the summi ng node to create the required triangle wave amplitude at the comp output. the triangle wave then is converted to pulse width modulation, or pwm, signals that are internally level-sh ifted down and up to the negative and positive supply rails. the level shifted pwm signals ar e called lo for low output, and ho for high output, and have opposite polarity. a programmable amount of dead time is added between the gate signals to avoid cross conduction betw een the power mosfets. the irs2092s drives two irf6645 directfet mosfets in the power stage to provide the amplified pwm waveform. the amplified analog output is reconstructed by de modulating the powered pwm at the switch node, called vs. (show as vs on the schematic)this is done by means of the lc low-pass filter (lpf) formed by l1 and c23a, which filters out the class d switching carrier signal, leaving the audio powered output at the speaker load. a single stag e output filter can be used with switching red trace: total distortion + noise voltage green trace: output voltage
www.irf.com page 10 of 49 iraudamp5 rev 3.3 frequencies of 400 khz and greater; lower switc hing frequencies may requi re additional filter components. +vcc is referenced to ?b and provides the supply vo ltage to the lo gate driver. d6 and c5 form a bootstrap supply that provides a floating voltage to the ho gate driver. the vaa and vss input supplies are derived from +b and -b via r52 and c18, and r50 and c12, respectively. thus, a fully functional class d pwm amplifier pl us driver circuit is realized in an so16 package with just a few small components. + - . . . r13 in- comp c23 . r33 -vss +vaa irs2092s lo vs vcc c5 d6 vb 0v 0v c1 r21 c17 r52 c3 ho c23a input c21 r31 c12 r50 +vcc integrator com r30 modulator and shift level gnd 0v -b directfet 0v lp filter l1 directfet c18 r32 +b irf6645 q4 irf6645 q3 simplified block diagram of iraudamp5 class d amplifier fig 10 system overview irs2092s gate driver ic the iraudamp5 uses the irs2092s, a high-volta ge (up to 200v), high-speed power mosfet pwm generator and gate driver with internal dead-time and protection functions specifically designed for class d audio amplifier applications. these functions include ocp and uvp. bi- directional current protection for both the high-side and low-side mosfets are internal to the irs2092s, and the trip levels for both mosfets can be set independently. in this design, the dead time can be selected for optimized perform ance by minimizing dead time while preventing shoot-through. as a result, there is no gate-timi ng adjustment on the board. selectable dead time through the dt pin voltage is an easy and re liable function which requires only two external resistors, r11 and r9 as shown on fig11 below.
www.irf.com page 11 of 49 iraudamp5 rev 3.3 . . ch1 feedback r19 . r18 r13 . audio_input +vcc -b +b r5 vs ho vb csh dt com lo vcc in- comp vaa gnd csd vref vss cslo irs2092s system-level view of class d cont roller and gate driver irs2092s fig 11 selectable dead-time the dead time of the irs2092s is based on the vo ltage applied to the dt pin. (fig 12) an internal comparator determines the programmed dead time by comparing the voltage at the dt pin with internal reference voltages. an internal resistive voltage divider based on different ratios of vcc negates the need for a precise reference voltage and sets threshold voltages for each of the four programmable settings. shown in the table below are component values for programmable dead times between 25 and 105 ns. to avoid drift from the input bias current of the dt pin, a bias current of greater than 0.5ma is suggested for the external resistor divider circuit. resistors with up to 5% tolerance can be used. selectable dead-time dead-time mode dead time r5 r13 dt voltage dt1 ~25ns 3.3k 8.2k 0.71 x vcc default dt2 ~40ns 5.6k 4.7k 0.46 x vcc dt3 ~65ns 8.2k 3.3k 0.29 x vcc dt4 ~105ns open <10k 0 x vcc vcc 0.57xvcc 0.36xvcc 0.23xvcc operational mode v dt dead-time 25ns 40ns 65ns 105ns 0 fig 12 dead-time settings vs. v dt voltage default
www.irf.com page 12 of 49 iraudamp5 rev 3.3 over-current protection (ocp) in the iraudamp5, the irs2092s gate driver acco mplishes ocp internally, a feature discussed in greater detail in the ?protection? section. offset null (dc offset) the iraudamp5 is designed such that no output- offset nullification is required, thanks to closed loop operation. dc offsets are tested to be less than 20mv. protection the iraudamp5 has a number of protection circu its to safeguard the system and speaker as shown in the figure 13 below, which fall into one of two categories ? internal faults and external faults, distinguished by the manner in which a fa ult condition is treated. internal faults are only relevant to the particular channel, while external faults affect th e whole board. for internal faults, only the offending channel is stopped. the cha nnel will hiccup until the fault is cleared. for external faults, the whole board is stopped us ing the shutdown sequenci ng described earlier. in this case, the system will also hiccup until the fault is cleared, at which time it will restart according to the startup sequencing described earlier. . . d4 ocref ocref 5.1v csd trip reset ocset + . uvp lo vs vcc vb csh r41 ovp otp r25 d1 bav19 dcp lp filter green yellow leds r18 ho to next channel ocset com 10r r30 csd r43 1.2v +b r19 10r r32 -b irf6645 q4 irf6645 q3 functional block diagram of pr otection circuit implementation fig 13
www.irf.com page 13 of 49 iraudamp5 rev 3.3 internal faults ocp and otp are considered internal faults, wh ich will only shutdown the particular channel by pulling low the relevant csd pin. the channe l will shutdown for about one-half a second and will hiccup until the fault is cleared. over-temperature protection (otp, fig 14 ) a separate ptc resistor is placed in close proximity to the high-side irf6645 directfet mosfet for each of the amplifier channels. if the resistor temperature rises above 100 ? c, the otp is activated. the otp protection will only shutdown the relevant channel by pulling the csd pin low and will recover once the temperatur e at the ptc has dropped sufficiently. this temperature protection limit yields a pcb temperature at the mosfet of about 100 ? c, which is limited by the pcb material and not by the operating range of the mosfet. r31 100k rp1 100c -b c28 47nf r48 1k r47 100k q7 otp ch1 -b otp1 rp1 is thermally connected with q3 3 2 1 2 3 q3 irf6645 fig 14 over-current protection (ocp) the ocp internal to the irs2092s shuts down the ic if an ocp is sensed in either of the output mosfets. for a complete description of the ocp circuitry, please refer to the irs2092s datasheet. here is a brief description: low-side current sensing fig 15 shows the low side mosfet as is protected from an overload condition by measuring the low side mosfet drain-to-source voltage during the low side mosfet on state, and will shut down the switching operation if the load current excee ds a preset trip level. the voltage setting on the ocset pin programs the threshold for low-side over-current sensing. thus, if the vs voltage during low-side conduction is higher than the ocset voltage, the irs2092s will trip and csd goes down. it is recommended to use vref to suppl y a reference voltage to a resistive divider (r19 and r18 for ch1) to genera te a voltage to ocset; this gives better variability against vcc fluctuations. for iraudamp5, the low-side over-cu rrent trip level is set to 0.65v. for irf6645 directfet mosfets with a nominal r ds-on of 28mohms at 25 ? c, this results in a ~23a maximum trip level. since the r ds-on is a function of temperature, the trip level is reduced to ~15a at 100 ? c.
www.irf.com page 14 of 49 iraudamp5 rev 3.3 . ocref ocref 5.1v csd ocset + . lo vs vcc vb csh r41 r25 d1 bav19 lp filter r18 ho ocset com 10r r30 csd r43 1.2v +b r19 10r r32 -b irf6645 q4 irf6645 q3 simplified functional block diagram of hi gh-side and low-side cu rrent sensing (ch1) fig 15 high-side current sensing (fig15) the high-side mosfet is protected from an overloa d condition and will shutdown the switching operation if the load current exceeds a preset trip level. high-side over-current sensing monitors detect an overload condition by measuring th e high side mosfet?s drain-to-source voltage (v ds ) through the csh and vs pins. the csh pin detects the drain voltage with reference to the vs pin, which is the source of the high-side mosfet. in contrast to the low-side current sensing, the threshold of csh pin to engage oc protecti on is internally fixed at 1.2v. an external resistive divider r43+r25 and r41 (for ch1) can be used to program a higher threshold. an additional external reverse blocking diode (d1 for ch1) is required to block high voltage feeding into the csh pin during low-side conduction. by subtracting a forward voltage drop of 0.6v at d1, the minimum threshold which can be set for th e high-side is 0.6v across the drain-to-source. for iraudamp5, the high-side over-current trip level is set to 0.6v across the high-side mosfet. for the irf6645 mosfets with a nominal r ds-on of 28 mohms at 25 ? c, this results in a ~21a maximum trip level. since the r ds-on is a function of temperature, the trip level is reduced to ~14a at 100 ? c. for a complete description of calculating and designi ng the over-current trip limits, please refer to the irs2092s datasheet. positive and negative side of short circuit, versus switching output shut down: the plots below show the speed that the irs2092s responds to a short circuit condition. notice that the envelope behind the sine wave output is actually the switching frequency ripple. bus pumping naturally affects this topology.
www.irf.com page 15 of 49 iraudamp5 rev 3.3 positive and negative side of short circuit, versus switching output shut down: ocp waveforms showing load current and switch node voltage (vs) fig 16 . short circuit response: ocp waveforms showing csd trip and hiccup fig 17 external faults ovp, uvp and dcp are considered external faults. in the event that any external fault condition is detected, the shutdown circuit will disable the output for about three seconds, during which time the orange audamp5 ?protection? led will tu rn on. if the fault condition has not cleared, the protection circuit will hiccup until the fault is removed. once the fault is cleared, the green ?normal? led will turn on. there is no manual reset option. over-voltage protection (ovp fig 18 ) ovp will shut down the amplifier if the bus voltage between gnd and -b exceeds 40v. the threshold is determined by the voltage sum of the zener diode z105, r140, and v be of q109. as a result, it protects the board from hazardous bus pumping at very low audio signal frequencies by shutting down the amplifier. ovp will automa tically reset after three seconds. since the +b and ?b supplies are assumed to be symmetrical (bus pumping, although asymmetrical in time, load current csd p in vs p in load current csd p in vs p in load current csd p in load current vs p in csd p in vs p in load current csd p in load current vs p in csd p in vs p in load current vs p in load current vs p in
www.irf.com page 16 of 49 iraudamp5 rev 3.3 will pump the bus symmetrically in voltage level over a complete audio frequency cycle), it is sufficient to sense only one of the two supply voltages for ovp. it is therefore up to the user to ensure that the power supplies are symmetrical. q109 over-voltage protection (ovp) r141 47k s1 sw-pb q109 mmbt5551 r139 47k -b sd d105 1n4148 z107 18v r145 47k r146 47k q110 mmbt5551 r144 10k trip and restart r140 10k z105 39v ovp dcp r149 47k c119 0.1uf, 50v uvp ot ot q110 under-voltage protection (uvp) fig 18 under-voltage protection (uvp, fig18 ) uvp will shutdown the amplifier if the bus volta ge between gnd and -b falls below 20v. the threshold is determined by the voltage sum of the zener diode z107, r145 and v be of q110. as with ovp, uvp will automatically reset after three seconds, and only one of the two supply voltages needs to be monitored. speaker dc-voltage protection (dcp, fig 19 ) dcp is provided to protect against dc current fl owing into the speakers. this abnormal condition is rare and is likely caused when the power amplif ier fails and one of the high-side or low-side irf6645 directfet mosfets remain in the on state. dcp is activated if either of the outputs has more than 4v dc offset (typical). under th is fault condition, it is normally required to shutdown the feeding power supplies. since these ar e external to the reference design board, an isolated relay p1 is provided for further system atic evaluation of dc-voltage protection. this condition is transmitted to the pow er supply controller through connector j9, whose pins are shorted during a fault condition.
www.irf.com page 17 of 49 iraudamp5 rev 3.3 r124 10k r121 47k r122 47k ch1 o ch2 o q106 mmbt5401 q104 mmbt5401 c116 100uf, 16v r123 1k q105 mmbt5551 r125 10k r126 100k +b r129 6.8k dc protection dcp r127 6.8k r128 6.8k r130 47k r131 47k from ch1 output from ch2 output -b to dcp fig 19 efficiency figs 20 demonstrate that iraudam5 is highly efficient, due to two main factors: a.) directfets offer low r ds(on) and very low input capacitance, and b). the pwm operates as pulse density modulation. 0.0% 10.0% 20.0% 30.0% 40.0% 50.0% 60.0% 70.0% 80.0% 90.0% 100.0% 0 20 40 60 80 100 120 140 160 180 output power (w) power stage efficiency (%) efficiency vs. output power, 4 ? single channel driven, b su pply = 35v, 1khz audio signal fig20
www.irf.com page 18 of 49 iraudamp5 rev 3.3 thermal considerations the daughter-board design can handle one-eight h of the continuous rated power, which is generally considered to be a normal operating cond ition for safety standards. without the addition of a heatsink or forced air-cooling, the daught er board cannot handle fully rated continuous power. a thermal image of the daughter board is as shown in fig 21 below. thermal distribution thermal image of daughter-voard two-channel x 1/8th rated power (15w) in operation, tc = 54c at steady state b supply = 35v, 4 ? load, 1khz audio signal, temp ambient = 25c fig 21 click and pop noise: one of the most important aspects of any audio am plifier is the startup and shutdown procedures. typically, transients occurring during these interv als can result in audible pop- or click-noise from the output speaker. traditionally, these transi ents have been kept away from the speaker through the use of a series relay that connects th e speaker to the audio amplifier only after the startup transients have passed and disconnects the speaker prior to shutting down the amplifier. thanks to the click and pop elimination fu nction in the irs2092s, iraudamp5 does not use any series relay to disconnect the speak er from the audible transient noise. 54 ? c 67 ? c 54 ? c 67 ? c
www.irf.com page 19 of 49 iraudamp5 rev 3.3 click-noise reduction circuit (solid-state shunt) irs2092s controller is relatively quiet with resp ect to class ab, but for additional click or pop noise reduction you may add a shunt circuit that fu rther attenuates click or pop transients during turn on sequencing. the circuit is not populat ed on the present demo board; for implementation details, please refer to the iraudamp4 user?s manual at http://www.irf.com/technical- info/refdesigns/audiokits.html startup and shutdown sequencing ( fig 22 ) the iraudamp5 sequencing is achieved through the charging and discharging of the cstart capacitor c117. along with the charging and discharging of the csd voltage (c10 on daughter board for ch1) of the irs2092s, this is all that is required for complete sequencing. the startup and shutdown timing diagrams are show in figure 22a below: click noise reduction sequencing at trip and reset fig 22a for startup sequencing, the control power supplies start up at different intervals depending on the b supplies. as the +/-b supplies reach +5 volts and -5 volts respectively, the +/-5v control supplies for the analog input start charging. once +b reaches ~16v, vcc charges. once ?b reaches -20v, the uvp is released and csd and cstart (c117) start charging. the class d amplifier is now operational, but the preamp out put remains muted until cstart reaches ref2. at this point, normal operation begins. the en tire process takes less than three seconds. cstart csd external trip csd= 2/3vdd cstart ref1 cstart ref2 sp mute chx_o a udio mute class d shutdown time music shutdown class d startup music startup cstart ref1 cstart ref2 reset cstart ref1 cstart ref2
www.irf.com page 20 of 49 iraudamp5 rev 3.3 for shutdown (fig22b) sequencing is initiated on ce uvp is activated. as long as the supplies do not discharge too quickly, the shutdown sequence can be completed before the irs2092s trips uvp. once uvp is activated, csd and cstart are discharged at different rates. in this case, threshold ref2 is reached first and the preamp au dio output is muted. it is then possible to shutdown the class d stage (csd reaches two-thirds vdd). this process takes less than 200ms. conceptual shutdown sequencing of power supplies and audio section timing fig22b for any external fault condition (otp, ovp, uvp or dcp ? see ?protection?) that does not lead to power supply shutdown, the system will trip in a similar manner as described above. once the fault is cleared, the system will reset (similar sequence as startup). vcc -b +b +5v -5v cstart csd uvp@-20v csd= 2/3vdd cstart ref1 cstart ref2 a udio mute sp mute chx_o class d shutdown time music shutdown
www.irf.com page 21 of 49 iraudamp5 rev 3.3 power supplies the iraudamp5 has all the n ecessary housekeeping power suppli es onboard and only requires a pair of symmetric power supplies ranging from 25v to 35v (+b, gnd, -b) for operation. the internally-generated housekeeping power su pplies include a 5v supply for analog signal processing (preamp etc.), while a +12v supply (vcc), referenced to ?b, is included to supply the low and high side class d gate-driver stages. for the externally-applied power, a regulated power supply is preferable for performance measurements, but is not always necessary. the bus capacitors, c31 and c3 2 on the motherboard, along with high-frequency bypass-caps c14, c15; c32 and c33 on the daughter board, address the high-frequency ripple current that results from switching action. in designs involving unregulated power supplies, the designer should place a set of external bus capacitors having enough capacitance to handle the audio-ripple current. overall regulation and output voltage ripple for the power supply design are not critical when using the iraudamp5 class d amplifier as the power supply rejection ratio (psrr) of the iraudamp5 is excellent, as shown on figure 23 below. power supply rejection ratio green: iraudamp5, cyan: vaa/vss are fed by vbus fig 23 bus pumping (fig24) since the iraudamp5 is a half-bridge configur ation, bus pumping does occur. under normal operation during the first half of the cycle, energy flows from one supply through the load and into the other supply, thus causing a voltage imbalance by pumping up the bus voltage of the receiving power supply. in the second half of the cycle, this condition is reversed, resulting in bus pumping of the other supply. these conditions worsen bus pumping: 1. lower frequencies (bus-pumping duration is longer per half cycle) 2. higher power output voltage and/or lower load impedance (more energy transfers between supplies)
www.irf.com page 22 of 49 iraudamp5 rev 3.3 3. smaller bus capacitors (the same ener gy will cause a larger voltage increase) the iraudamp5 has protection features that will shut down the switching operation if the bus voltage becomes too high (>40v) or too low (< 20v). one of the easiest countermeasures is to drive both of the channels in a stereo configura tion out of phase so that one channel consumes the energy flow from the other and does not return it to the power supply. bus voltage detection is only done on the ?b s upply, as the effect of the bus pumping on the supplies is assumed to be symmetrical in amplitude (although opposite in phase) with the +b supply. bus pumping figure: cyan = positive rail voltage (+b) green = speaker output pink = negative rail voltage (-b) fig 24 input signal a proper input signal is an analog signal belo w 20 khz, up to 3.5v peak, having a source impedance of less than 600 ohms. a 30-60 khz input signal can cause lc resonance in the output lpf, resulting in an abnormally large amount of reactive current flowing through the switching stage (especially at 8 ohms or higher impedance towards open load), and causing ocp activation. the iraudamp5 has an rc network (fig25), or zobel network (r47 and c25 [ch1]), to dampen the resonance and protect the board in such an event, but is not thermally rated to handle continuous supersonic frequencies. these supersonic input frequencies therefore should be avoided. separate mono rca connectors provide input to each of the two channels. although both channels share a common ground, it is necessary to connect each channel separately to limit noise and crosstalk between channels.
www.irf.com page 23 of 49 iraudamp5 rev 3.3 . . . . 0v 0v lp filter l1 c23a r47 c25 zobel filter and output filter demodulator fig 25 output both outputs for the iraudamp5 are single-ended and therefore have terminals labeled (+) and (-), with the (-) terminal connected to power gr ound. each channel is optimized for a 4-ohm speaker load for a maximum output power (120w), but is capable of operating with higher load impedances (at reduced power), at which point th e frequency response will have a small peak at the corner frequency of the output lc low pa ss filter. the iraudamp5 is stable with capacitive-loading; however, it should be noted that the frequency response degrades with heavy capacitive loading of more than 0.1 f. gain setting / volume control the iraudamp5 has an internal volume contro l (potentiometer r108 labeled, ?volume?, fig 26) for gain adjustment. gain settings for both cha nnels are tracked and controlled by the volume control ic (u_2), setting the gain from the microcontroller ic (u_1). the maximum volume setting (clockwise rotation) corresponds to a total ga in of +37.9db (78.8v/v). the total gain is a product of the power-stage gain, wh ich is constant (+23.2db), and the input-stage gain that is directly-controlled by the volume adjustment. th e volume range is about 100db, with minimum volume setting to mute the system with an overall gain of less than -60d b. for best performance in testing, the internal volume control should be set to a gain of 21.9v/v, such that 1vrms input will result in rated output power (120w into 4 ? ), allowing for a >11db overdrive. j5 j6 r4 100r zcen cs sdatai vd+ dgrd sclk sdatao mute ainl agndr aoutl va- va+ aoutr agndl ainr u_1 cs3310 r3 100r r1 100k r2 100k r7 47r r8 47r r9 10r r10 47r r11 47r c1 10uf, 50v mute -5v +5v +5v vss 8 vr0 7 vr1 6 clk 5 vdd 1 cs 2 sdata 3 simul 4 u_2 3310s06s r108 ct2265-nd c107 4.7uf, 16v c108 10nf, 50v sclk sdatai c109 4.7uf, 16v cs +5v control volume +5v audio in audio in level out 1 level out 2 fig 26 digital volume control
www.irf.com page 24 of 49 iraudamp5 rev 3.3 bridged output the iraudamp5 is not intended for a bridge-tie d-load, or btl configuration. however, btl operation can be achieved by feeding out-of-phase audio input signals to the two input channels as shown in the figure 27 below. in btl operation, minimum load impedance is 8 ohms and rated power is 240w non-clipping. the installed clamping diodes d5 ? d8 are required for btl operation, since reactive energy flowing from one output to the other during clipping can force the output voltage beyond the voltage supply rails if not clamped. + - . . + - input r14 10k 1% in- comp c24 . r34 comp c23 c1 r21 r33 . c17 +vaa irs2092s irs2092s lo vs vcc vb ho lo vs vcc vb ho -b +b -b +b l2 0v l1 0v -b . -b +b r13 c2 c18 in- +vaa lp filter lp filter +b ch2 c22 1 r32 ch1 c21 r31 com integrator modulator and shift level gnd com integrator modulator and shift level gnd d6 d8 d7 10k 1% d5 irf6645 q6 irf6645 q3 irf6645 q5 irf6645 q4 bridged configuration fig 27 output filter design, preamplifier and performance the audio performance of iraudamp5 depends on a number of different factors. the section entitled, ?typical performance? presents perform ance measurements based on the overall system, including the preamp and output filter. while th e preamp and output filter are not part of the class d power stage, they have a significant effect on the overall performance. output filter since the output filter is not included in th e control loop of the iraudamp5, the reference design cannot compensate for performance deteriorati on due to the output filter. therefore, it is important to understand what characteristics are preferable when designing the output filter:
www.irf.com page 25 of 49 iraudamp5 rev 3.3 1) the dc resistance of the inductor should be minimized to 20 mohms or less. 2) the linearity of the output inductor and capacitor should be high with respect to load current and voltage. preamplifier (fig 28) the preamp allows partial gain of the input si gnal, and controls the volume in the iraudamp5. the preamp itself will add distortion and noise to the input signal, resulting in a gain through the class d output stage and appearing at the output. even a few micro-volts of noise can add significantly to the output noise of the overall amplifier. j5 r5 4.7r r13 3.3k r31 47k 1% j6 r4 100r r14 3.3k r32 47k 1% r34 1k r33 1k c17 150pf, 500v ch2 in ch1 in r3 100r r1 100k c2 10uf, 50v c3 10uf, 50v r2 100k r6 4.7r -5v +5v c5 10uf, 50v c6 10uf, 50v sd in-1 vcc vcc oc in-2 +5v -5v -5v r55 0.0 r56 0.0 feedback audio in audio in r71 open r72 open 1 2 3 4 5 6 j1a 7 8 9 10 11 12 j1b zcen 1 cs 2 sdatai 3 vd+ 4 dgrd 5 sclk 6 sdatao 7 mute 8 ainl 16 agndr 10 aoutl 14 va- 13 va+ 12 aoutr 11 agndl 15 ainr 9 u_? cs3310 feedback irs2092s module preamplifier fig28 it is possible to evaluate the performance without the preamp and volume control, by moving resistors r13 and r14 to r71 and r72, respectiv ely. this effectively bypasses the preamp and connects the rca inputs directly to the class d power stage input. improving the selection of preamp and/or output filter components w ill improve the overall system performance, approaching that of the stand-alone class d power stage. in the ?typical performance? section, only limited data for the stand-alone class d power stage is given. for example, fig 20 below shows the results for thd+n vs. output power are provided, utilizing a range of different inductors. by changing the inductor and repeating this test, a designer can quickly evaluate a particular inductor.
www.irf.com page 26 of 49 iraudamp5 rev 3.3 i iraudamp5 can be used as output inductors evaluation tool results of thd+n vs. output power with different output inductors fig 29 self-oscillating pwm modulator the iraudamp5 class d audio power amp lifier features a self-oscillating type pwm modulator for the lowest component count, highest performance and robust design. this topology represents an analog version of a second-orde r sigma-delta modulation having a class d switching stage inside the loop. the benefit of th e sigma-delta modulation, in comparison to the carrier-signal based modulation, is that all the e rror in the audible frequency range is shifted to the inaudible upper-frequency range by nature of its operation. also, sigma-delta modulation allows a designer to apply a sufficient amount of correction. the self-oscillating frequency (fig 30) is determined by the total delay time inside the control loop of the system. the delay of the logic circ uits, the irs2092s gate-driver propagation delay, the irf6645 switching speed, the time-constant of fro nt-end integrator (e.g.r13, r33, r31, r21, p1, c17, c21, c23 and c1 for ch1) and variations in the supply voltages are critical factors of the self-oscillating frequency. under nominal conditions, the switchi ng-frequency is around 400khz with no audio input signal and a +/-35v supply. 0.0001 100 0.001 0.01 0.1 1 10 % 100m 200m 500m 1 2 5 10 20 50 100 200 w t t t t t t t t t
www.irf.com page 27 of 49 iraudamp5 rev 3.3 + - . . r13 in- c23 r21 comp . r33 irs2092s lo com vs vcc vb -b +b lp filter 0v c1 ho input ch1 c21 p1 r31 integrator modulator and shift level gnd c17 irf6645 q4 irf6645 q3 self oscillating determined components fig 30 adjustments of self-oscillating frequency the pwm switching frequency in this type of self-oscillating switching scheme greatly impacts the audio performance, both in absolute frequency and frequency relative to the other channels. in absolute terms, at higher frequencies distortion due to switching-time becomes significant, while at lower frequencies, the bandwidth of the ampl ifier suffers. in relative terms, interference between channels is most significant if the re lative frequency difference is within the audible range. normally, when adjusting the self-oscillating fr equency of the different channels, it is best to either match the frequencies accurately, or ha ve them separated by at least 25khz. with the installed components, it is possible to cha nge the self-oscillating fre quency from about 300khz up to 450khz, as shown on fig 30 switches and indicators there are four different indicators on the reference design as shown in the figure 31 below: 1. an orange led, signifying a fault / shutdown condition when lit. 2. a green led on the motherboard, signifying conditions are normal and no fault condition is present. 3. a blue led on the daughter board module, signifying there are ho pulses for ch1 4. a blue led on the daughter board module signifying there are ho pulses for ch2 there are three switches on the reference design: 1. switch s1 is a trip and reset push-button. pu shing this button has the same effect as a fault condition. the circuit will restart about three seconds after the shutdown button is released. 2. switch s2 is an internal cl ock-sync frequency selector. this feature allows the designer to modify the switching frequency in order to avoid am radio interference. with s3 set to int, the two settings ?h? and ?l? will modify the internal clock frequency by about
www.irf.com page 28 of 49 iraudamp5 rev 3.3 20 khz to 40 khz, either higher ?h? or lowe r ?l.? the actual internal frequency is set by potentiometer r113 - ?int freq.? 3. switch s3 is an oscillator selector. this th ree-position switch is selectable for internal self oscillator (middle position ? ?self?), or either internal (?int?) or external (?ext?) clock synchronization. protection normal mute mute +5v r119 1k 1a 1y 2a 2y 3a 3y gnd vcc 6a 6y 5a 5y 4a 4y u_3 74hc14 r120 100r c114 10nf, 50v +5v i e s sw s3a sw-3way_a-b r109 1k r110 100k c110 1nf, 50v c112 1200pf, 50v d103 1n4148 clk r116 47r clk i e s sw s3b sw-3way_a-b ext. clk a24497 j8 bnc r115 47r r114 100r r113 5k pot r112 820r c111 100pf, 50v q103 mmbt5551 2 1 s2 sw_h-l r111 10k c113 100pf, 50v r117 47r r118 1k led, switches and sync frequencies fig 31 switching frequency lock / synchronization feature for single-channel operation, the use of the sel f-oscillating switching scheme will yield the best audio performance. the self-oscillating frequency, however, changes with the duty ratio. this varying frequency can interfere with am radio br oadcasts, where a constant-switching frequency with its harmonics shifted away from the am carri er frequency is preferred. in addition to am broadcasts, multiple channels can also reduce a udio performance at low power, and can lead to increased residual noise. clock frequency lock ing/synchronization can address these unwanted characteristics. please note that the switching frequency lock / synchronization feature is not possible for all frequencies and duty ratios, and operates within a limited frequency and duty-ratio range around the self-oscillating frequency (figure 32 below).
www.irf.com page 29 of 49 iraudamp5 rev 3.3 0 100 200 300 400 500 600 10% 20% 30% 40% 50% 60% 70% 80% 90% duty cycle operating frequency (khz) typical lock frequency range vs. pwm duty ratio (self-oscillating frequency set to 400 khz with no input) fig 32 the output power range, for which frequency-lockin g is successful, depends on what the locking frequency is with respect to the self-oscillating fre quency. as illustrated in figure 33, the locking frequency is lowered (from 450khz to 400khz to 350khz and then 300khz) as the output power range (where locking is achieved) is extende d. once locking is lost, however, the audio performance degrades, but the increase in thd seems independent from the clock frequency. therefore, a 300 khz clock frequency is recommended, as shown on fig 34 it is possible to improve the thd performance by increasing the corner frequency of the high pass filter (hpf) (r17 and c15 for ch1 fig 33) that is used to inject the clock signal, as shown in figure 33 below. this drop in thd, however, comes at the cost of reducing the locking range. resistor values of up to 100 kohms and capacitor values down to 10pf may be used. + - . . 0v sync r13 in- comp . +vaa irs2092s lo vs vcc vb -b +b lp filter 0v 22k r22 ho input ch1 integrator com modulator and shift level gnd 33pf c15 irf6645 q4 irf6645 q3 switching frequency lock / synchronization feature fig 33 self-oscillating frequency locking range self-oscillating frequency suggested clock frequency for maximum locking range
www.irf.com page 30 of 49 iraudamp5 rev 3.3 in iraudamp5, this switching frequency lock/sync hronization feature (fig 31 and fig 33) is achieved with either an internal or external cl ock input (selectable through s3). if an internal (int) clock is selected, an internally-generat ed clock signal is used, adjusted by setting potentiometer r113 ?int freq.? if external (ext ) clock signal is selected, a 0-5v square- wave (~50% duty ratio) logic signal must be applied to bnc connector j17. 0.001 10 0.002 0.005 0.01 0.02 0.05 0.1 0.2 0.5 1 2 5 % 100m 200 200m 500m 1 2 5 10 20 50 100 w red ch1, = self oscillator @ 400khz pink ch1, = sync oscillator @ 400khz blue ch1, = sync oscillator @ 450khz cyan ch1, = sync oscillator @ 350khz thd+n ratio vs. output power for different switc hing frequency lock/synchronization conditions fig 34
www.irf.com page 31 of 49 iraudamp5 rev 3.3 class d, daughter board irs 2092s module ch1 schematic d4 r1 100r r7 10r r19 8.2k r13 8.2k r17 1.2k d6 r9 10r r30 10r r32 10r r5 3.3k r41 10k r43 0.0 r25 10k c14 0.1uf,100v c18 3.3uf r40 33k +b -b sd vcc r12 4.7k r3 10r d1 vss vaa gnd1 10uf c10 r21 1k c23 1nf,250v c21 1nf,250v ch1 r26 4.7r c17 0.1uf r37 1r r31 100k rp1 100c -b c28 47nf r48 1k r47 100k q7 mmbt5401dict-nd otp ch1 r52 open r50 open lo 11 vs 13 ho 14 vcc 12 gnd 2 vaa 1 com 10 dt 9 ocset 8 in- 3 comp 4 csd 5 vss 6 vref 7 vb 15 csh 16 u1 irs2092s c1 1nf c30 10nf ch1 output to lpf1 +35v bus -35v bus +5v -5v audio gnd 1 sd -35v bus +35v bus vaa vss in-1 ch1 o +b ch1 -b otp1 oc rp1 is thermally connected with q3 c3 10uf c32 0.1uf,100v 3 2 1 2 3 d-fet2 irf6645 22uf c5 c12 3.3uf ds1 tp1 3 2 1 2 3 d-fet1 irf6645 9 10 11 12 13 14 15 16 j2a a26570-nd 1 2 3 4 5 6 j1a a26568-nd r46 3.01k p1 1k . fig 35
www.irf.com page 32 of 49 iraudamp5 rev 3.3 class d, daughter board irs 2092s module ch2 schematic d3 r20 8.2k r18 1.2k r4 10r oc -b c9 47nf r11 100k r24 1k r33 100k q1 mmbt5551 q2 mmbt5401 rp2 100c r35 100k r36 10k r34 100k c29 47nf otp ch2 c31 10nf,50v r49 open d7 r2 100r r8 10r r14 8.2k d5 r10 10r r28 10r r27 10r r6 3.3k r42 10k r44 0.0 r29 10k c15 0.1uf,100v c19 3.3uf r39 33k +b -b sd in-2 vcc r45 4.7k d2 -5v vaa gnd2 c16 3.3uf 10uf c11 r22 1k c24 1nf,1250v c22 1nf,250v ch2 r23 4.7r c13 0.1uf r38 1r r51 open lo 11 vs 13 ho 14 vcc 12 gnd 2 vaa 1 com 10 dt 9 ocset 8 in- 3 comp 4 csd 5 vss 6 vref 7 vb 15 csh 16 u2 irs2092s c2 1nf ch2 output to lpf2 +35v bus -35v bus +5v -5v audio gnd 2 sd -35v bus +35v bus sd vss vcc ch2 o -b ch2 -b -b otp1 otp2 otp2 rp2 is thermally connected with q5 c4 10uf c33 0.1uf,100v 22uf c6 ds2 tp2 3 2 1 2 3 d-fet3 irf6645 3 2 1 2 3 d-fet4 irf6645 1 2 3 4 5 6 7 8 j2b a26570-nd 7 8 9 10 11 12 j1b a26568-nd r53 3.01k p2 1k . fig 36
www.irf.com page 33 of 49 iraudamp5 rev 3.3 d4 r1 100r r7 10r r19 8.2k r13 8.2k r17 1.2k d6 r9 10r r30 10r r32 10r r5 3.3k r41 10k r43 0.0 r25 10k c14 0.1uf,100v c18 3.3uf r40 33k +b -b sd vcc r12 4.7k r3 10r d1 vss vaa gnd1 10uf c10 r21 1k c23 1nf,250v c21 1nf,250v d3 r20 8.2k r18 1.2k r4 10r ch1 oc -b r26 4.7r c17 0.1uf r37 1r c9 47nf r11 100k r31 100k rp1 100c r24 1k r33 100k q1 mmbt5551 q2 mmbt5401 rp2 100c -b r35 100k r36 10k c28 47nf r48 1k r47 100k q7 mmbt5401dict-nd r34 100k c29 47nf otp ch2 otp ch1 c31 10nf,50v r52 open r50 open r49 open d7 lo 11 vs 13 ho 14 vcc 12 gnd 2 vaa 1 com 10 dt 9 ocset 8 in- 3 comp 4 csd 5 vss 6 vref 7 vb 15 csh 16 u1 irs2092s c1 1nf c30 10nf ch1 output to lpf1 +35v bus -35v bus +5v -5v audio gnd 1 sd -35v bus +35v bus r2 100r r8 10r r14 8.2k d5 r10 10r r28 10r r27 10r r6 3.3k r42 10k r44 0.0 r29 10k c15 0.1uf,100v c19 3.3uf r39 33k +b -b sd in-2 vcc r45 4.7k d2 -5v vaa gnd2 c16 3.3uf 10uf c11 r22 1k c24 1nf,1250v c22 1nf,250v ch2 r23 4.7r c13 0.1uf r38 1r r51 open lo 11 vs 13 ho 14 vcc 12 gnd 2 vaa 1 com 10 dt 9 ocset 8 in- 3 comp 4 csd 5 vss 6 vref 7 vb 15 csh 16 u2 irs2092s c2 1nf ch2 output to lpf2 +35v bus -35v bus +5v -5v audio gnd 2 sd -35v bus +35v bus vaa sd vss vss in-1 vcc ch1 o +b ch2 o -b ch1 ch2 -b -b -b otp1 otp1 otp2 otp2 oc rp1 is thermally connected with q3 rp2 is thermally connected with q5 c3 10uf c4 10uf c32 0.1uf,100v c33 0.1uf,100v 3 2 1 2 3 d-fet2 irf6645 22uf c6 22uf c5 c12 3.3uf ds2 ds1 tp2 tp1 class d, daughte r board irs2092s module sche matic 3 2 1 2 3 d-fet1 irf6645 3 2 1 2 3 d-fet3 irf6645 3 2 1 2 3 d-fet4 irf6645 9 10 11 12 13 14 15 16 j2a a26570-nd 1 2 3 4 5 6 7 8 j2b a26570-nd 1 2 3 4 5 6 j1a a26568-nd 7 8 9 10 11 12 j1b a26568-nd r46 3.01k r53 3.01k p1 1k p2 1k sch_db_2092_rev3.1 fig 37
www.irf.com page 34 of 49 iraudamp5 rev 3.3 j5 r5 4.7r r13 3.3k 1 2 j3 l1 22uh r31 47k 1% r58 100k j6 r4 100r r14 3.3k r32 47k 1% c32 1000uf,50v c31 1000uf,50v r57 100k c27 open c26 0.1uf, 400v c28 open l2 22uh r48 10, 1w r34 1k r33 1k c18 150pf, 500v c17 150pf, 500v ch1 out ch2 out ch2 in ch1 in 1 2 j4 c33 open c34 open r39 470 r40 470 r49 2.2k r3 100r r1 100k c2 10uf, 50v c3 10uf, 50v r2 100k r6 4.7r r7 47r r8 47r r9 10r r10 47r r11 47r c1 10uf, 50v r50 2.2k r17 22k r18 22k c16 33pf mute c25 0.1uf, 400v r47 10, 1w c15 33pf u3 74ahc1g04 u4 74ahc1g04 c19 2.2uf,16v c20 2.2uf,16v r27 47r r28 47r c23 0.47uf, 400v c24 0.47uf, 400v -5 v +5v +5v +5v c5 10uf, 50v c6 10uf, 50v +5v clk clk d5 d7 d8 d6 -b +b -b +b -b +b ch1 o +b ch2 o -b sd in-1 vcc vcc oc in-2 +5v -5v -5v vss 8 vr0 7 vr1 6 clk 5 vdd 1 cs 2 sdata 3 simul 4 u_ 2 3310s06s r108 c107 4.7uf, 16v c108 10nf, 50v sclk sdatai c109 4.7uf, 16v cs +5v control volume r55 0.0 r56 0.0 irs2092s_ module ch1 feedback ch2 feedback +5v audio in audio in zm4732adict z102 4.7v r104 47r, 1w c103 10uf, 50v in gnd out u_5 mc79m05 c102 10uf, 50v r102 47r, 1w c101 10uf, 50v vin gnd vout u_4 mc78m05 zm4732adict z101 4.7v d102 ma2yd2300 d101 ma2yd2300 c104 10uf, 50v r101 47r, 1w r103 47r, 1w -b -5v +5v +b c105 10uf, 50v r105 10r c106 10uf, 50v vin gnd vout u_6 mc78m12 z103 15v q102 mmbt5401 r107 4.7k r106 47k z104 24v q101 fx941 vcc +b -b hs1 vcc power supply +5v power supply -5v power supply r71 open r72 open class d, mothe r board control volume and powe r supplie s sche matic 1 2 3 4 5 6 j1a 7 8 9 10 11 12 j1b 9 10 11 12 13 14 15 16 j2a 1 2 3 4 5 6 7 8 j2b zcen 1 cs 2 sdatai 3 vd+ 4 dgrd 5 sclk 6 sdatao 7 mute 8 ainl 16 agndr 10 aoutl 14 va- 13 va+ 12 aoutr 11 agndl 15 ainr 9 u_ ? cs3310 trace under j7 chassis gnd heat sink vcc uvp 1 2 3 j7 +35v -35v gnd + - ch1 ch2 + - fig 38
www.irf.com page 35 of 49 iraudamp5 rev 3.3 protection r124 10k r121 47k r122 47k ch1 o ch2 o q106 mmbt5401 q104 mmbt5401 c116 100uf, 16v r141 47k normal r123 1k q108 mmbt5551 s1 sw-pb mute 1 2 3 6 5 4 p1 pvt412 1 2 j9 dc_ps mute q105 mmbt5551 r125 10k r126 100k +b q109 mmbt5551 r139 47k -b sd d1 05 1n4148 r138 4.7k z1 0 6 18v z1 0 7 18v r145 47k r146 47k q11 0 mmbt5551 r144 10k d1 07 1n4148 d1 06 1n4148 c117 100uf, 16v +5v r142 68k +5v r119 1k r136 68k r135 82k 1a 1y 2a 2y 3a 3y gnd vcc 6a 6y 5a 5y 4a 4y u_3 74hc14 r120 100r c114 10nf, 50v +5v i e s sw s3a sw-3way_a-b r109 1k r110 100k c110 1nf, 50v c112 1200pf, 50v d10 3 1n4148 clk r116 47r clk i e s sw s3b sw-3way_a-b ext. clk a24497 j8 bnc r115 47r r114 100r r113 5k pot r112 820r c111 100pf, 50v q103 mmbt5551 2 1 s2 sw_h-l r111 10k c113 100pf, 50v r134 10k r117 47r r143 10k sp mute r118 1k trip and rest art r129 6.8k c115 10uf, 50v -b r140 10k z1 0 5 39v dc protection ovp r132 47k q1 07 mmbt5 5 5 1 d104 1n4148 r133 47k dcp dcp r127 6.8k r128 6.8k r130 47k r131 47k r148 10k r147 47k q11 1 mmbt5401 +b r149 47k c119 0.1uf, 50v uvp z1 0 8 8.2v r137 47k -5 v ot ot cstart q112 mmbt5 5 5 1 -5v +5v z109 8.2v r150 47k r151 47k +b class d, mothe r board clock and house ke e ping sche matic fig 39
www.irf.com page 36 of 49 iraudamp5 rev 3.3 iraudamp5 bill of materials class d, daughter board: amp5_db_2092_rev 3.1_bom designator footprint parttype quantity part no vender c1, c2, c21,c22,c23,c24 805 1nf,250v,cog 6 445-2325-1-nd digi key c3, c4 tan-a 10uf, 16v, tan 2 495-2236-1-nd digi key c5, c6 tan-b 10uf, 16v, tan 2 399-3706-1-nd digi key c9, c28, c29 0805 47nf,50v, x7r 3 pcc1836ct-nd digi key c10, c11 tan-b 10uf, 16v, tan 2 399-3706-1-nd digi key c12, c16, c18, c19 tan-b 3.3uf, 16v, x7r 4 445-1432-1-nd digi key c13, c17 0805 0.1uf,100v, x7r 2 399-3486-1-nd digi key c14, c15, c32, c33 1206 0.1uf,100v, x7r 3 pcc2239ct-nd digi key c20 0805 open 1 open c30, c31 0805 10nf,50v, x7r 2 pcc103bnct-nd digi key d1, d2 sod-323 bav19ws-7-f 2 bav19ws-fdict-nd digi key d3, d4 sod-323 1n4148ws-7-f 2 1n4148ws-fdict-nd digi key d5, d6 sma mura120t3g 2 mura120t3gosct-nd digi key d7 sma es1d 1 es1dfsct-nd digi key ds1, ds2 805 ltst-c171tbkt 2 160-1645-1-nd digi key j1a con eisa31 con eisa31 1 a26568-nd digi key j1b con eisa31 con eisa31 1 a26568-nd digi key j2a con_power con_power 1 a26570-nd digi key j2b con_power con_power 1 a26570-nd digi key q1 sot23-bce mmbt5551 1 mmbt5551fsct-nd digi key q2, q7 sot23-bce mmbt5401-7 2 mmbt5401-fdict-nd digi key
www.irf.com page 37 of 49 iraudamp5 rev 3.3 d-fet1, d-fet2, d-fet3, d-fet4 direct fet sj irf6645 4 irf6645 ir r1, r2 0805 100r 2 p100act-nd digi key r3,r4,r9,r10,r15,r16,r27,r28,r30,r32,r8 0805 10r 11 p10act-nd digi key r5, r6 0805 3.3k 2 p3.3kact-nd digi key r7 1206 10r 1 p10ect-nd digi key r11, r31, r33, r34, r35, r47 0805 100k 2 p100kact-nd digi key r12, r45 0805 4.7k 2 p4.7kact-nd digi key r13, r14,r19,r20 0805 8.2k 2 p8.2kact-nd digi key r24, r48 0805 1k 2 p1.0kact-nd digi key r7,r18 805 1.2k rhm1.2karct-nd digi key r21, r22 0805 1k 2 p1.0kact-nd digi key r23, r26 0805 4.7r 2 p4.7act-nd digi key r25, r29,r36,r41, r42 0805 10k 5 p10kact-nd digi key r37, r38 0805 1r 3 p1.0act-nd digi key r39, r40 0805 33k 3 rhm33karct-nd digi key r43, r44 0805 0 3 rhm0.0arct-nd digi key r49, r50, r51, r52, 1206 open 3 open rp1, rp2 805 100c 3 594-2381-675-21007 mouser p1,p2 st-32 3mm sq 1k st32etb102tr-nd digi key r46,r53 805 3.01k rhm3.01kcct-nd digi key u1, u2 soic16 ir driver 3 irs2092s ir
www.irf.com page 38 of 49 iraudamp5 rev 3.3 class d motherboard: iraudamp5 motherboard bill of material no designator # footprint part type part no vender 1 c1, c5, c6, c101, c102, c103, c104, c105, c106, c115 10 rb2/5 10uf, 50v 565-1106-nd digikey 2 c2, c3 2 rb2/5 2.2uf, 50v 565-1103-nd digikey 3 c7, c8, c9, c10 4 open 4 c11, c12, c13, c14 4 open 5 c15, c16 2 805 33pf 478-1281-1-nd digikey 6 c17, c18 2 axial0.19r 150pf, 500v 338-2598-nd digikey 7 c19, c20 2 1206 2.2uf, 16v pcc1931ct-nd digikey 8 c119 1 1206 0.1uf, 50v pcc104bct-nd digikey 9 c23, c24 2 cap mkp 0.47uf, 400v 495-1315-nd digikey 10 11 c25, c26 2 cap mkps 0.1uf, 400v 495-1311-nd digikey 12 c27, c28, c29, c30, c40, c41, c42, c43, c44, c45, c46, c47 12 805 open 13 r29, r30, r55, r56, r60, r61, r62, r63, r64, r65, r66, r67, r71, r72 14 805 open 14 c31, c32 2 rb5/12_5 1000uf,50v 565-1114-nd digikey 15 c33, c34, c48, c49 4 axial0.1r open - digikey 16 c107, c109 2 805 4.7uf, 16v pcc2323ct-nd digikey 17 c108, c114 2 805 10nf, 50v pcc103bnct-nd digikey 18 c110 1 805 1nf, 50v pcc102cgct-nd digikey 19 c111, c113 2 805 100pf, 50v pcc101cgct-nd digikey 20 c112 1 805 1200pf, 50v 478-1372-1-nd digikey 21 c116, c117 2 rb2/5 100uf, 16v 565-1037-nd digikey 22 d103, d104, d105, d106, d107 5 sod-123 1n4148w-7-f 1n4148w-fdict-nd digikey 23 d5, d6, d7, d8 4 sma mura120t3g mura120t3gosct-nd digikey 24 d101, d102 2 sod-123 ma2yd2300 ma2yd2300lct-nd digikey 25 hs1 1 heat_s6in1 heat sink 294-1086-nd digikey 26 j1a, j1b 2 con eisa-31 con eisa31 a32934-nd digikey 27 j2a, j2b 2 con_power con_power a32935-nd digikey 28 j3, j4 2 mkds5/2-9.5 277-1022 277-1271-nd or 651-1714971 digikey or mouser 29 j5, j6 2 blue rca rcj-055 cp-1422-nd digikey 30 j7 1 j header3 277-1272 277-1272-nd or 651-1714984 digikey or mouser 31 j8 1 bnc_ra con bn c a32248-nd digikey 32 j9 1 ed1567 ed1567 ed1567 digikey 33 l1, l2 2 inductor sagami 7g17a- or 1d17a-220m sagami 7g17a- or 1d17a-220m inductors, inc or ice component s, inc. 34 normal 1 led rb2/5 404-1106-nd 160-1143-nd digikey 35 p1 1 dip-6 pvt412 pvt412pbf- nd digikey 36 protection 1 led rb2/5 404-1109-nd 160-1140-nd digikey 37 q101 1 sot89 fx941 fcx491ct-nd digikey 38 q102, q104, q106, q111 4 sot23-bce mmbt5401-7-f mmbt5401-fdict -nd digikey 39 q103, q105, q107, q108, q109, q110, q112 7 sot23-bce mmbt5551 mmbt 5551-fdict- nd digikey 40 r1, r2, r57, r58, r110, r126 6 805 100k p100kact-nd digikey 41 r3, r4, r114 3 805 100r p100act-nd digikey 42 r5, r6 2 1206 4.7r p4.7ect-nd digikey 43 r7, r8, r10, r11, r27, r28, r115, r116, r117 9 805 47r p47act-nd digikey 44 r9, r105 2 805 10r p10act-nd digikey 45 r13, r14 2 805 3.3k, 1% p3.3kzct-nd digikey 46 r17, r18 2 805 22k p22kact-nd digikey 47 r106, r121, r122, r130, r131, r132, r133, r137, r139, r141, r145, r146, r147, r149, r150, r151 16 805 47k p47kact-nd digikey 48 r152 1 805 open - digikey 49 r55, r56 2 805 0.0 ohms p0.0act-nd digikey 50 r39, r40 2 805 470r p470act-nd digikey 51 r21, r22, r23, r24 4 open 52 r120 1 1206 100r p100ect-nd digikey 53 r29p, r30p 2 open 54 r31, r32 2 2512 47k, 1% pt47kafct-nd digikey 55 r33, r34 2 1206 1k p1.0kect-nd digikey
www.irf.com page 39 of 49 iraudamp5 rev 3.3 56 r109, r118, r119, r123 4 805 1k p1.0kact-nd digikey 57 r47, r48 2 2512 10, 1w pt10xct digikey 58 r49, r50 2 1206 2.2k p2.2kect-nd digikey 59 r68, r69 2 axial-0.3 open - digikey 60 r101, r102, r103, r104 4 2512 47r, 1w pt47xct-nd digikey 61 r107, r138 2 805 4.7k p4.7kact-nd digikey 62 r108 1 v_control ct2265 ct2265-nd digikey 63 r111, r124, r125, r134, r140, r143, r144, r148 8 805 10k p10kact-nd digikey 64 r112 1 805 820r p820act-nd digikey 65 r113 1 pots 5k pot 3362h-502lf-nd digikey 66 r127, r128, r129 3 1206 6.8k p6.8kect-nd digikey 67 r135 1 805 82k p82kact-nd digikey 68 r136, r142 2 805 68k p68kact-nd digikey 69 s1 1 switch sw-pb p8010s-nd digikey 70 s2 1 sw-eg1908-nd sw_h-l eg1908-nd digikey 71 s3 1 sw-eg1944-nd sw-3way eg1944-nd digikey 72 u1, u2 2 open 73 u3, u4 2 sot25 74ahc1g04 296-1089-1-nd digikey 74 u7, u8 2 mini5 open open 75 u9, u10 2 so-8 open open 76 u_1 1 soic16 cs3310 73c8016 or 72j5420 newark 77 u_2 1 n8a 3310s06s 3310-ir01 *tachyonix 78 u_3 1 m14a 74hc14 296-1194-1-nd digikey 79 u_4 1 to-220 mc78m05ctg mc78m05ctgos-nd digikey 80 u_5 1 to-220 lm79m05ct lm79m05ct-nd digikey 81 u_6 1 to-220 lm78m12ct lm78m12ct-nd digikey 82 z1, z2, z103 3 sod-123 15v bzt52c15-fdict-nd digikey 83 z101, z102 2 sma 4.7v 1sma5917bt3gosct-nd digikey 84 z104 1 sod-123 24v bzt52c24-fdict-nd digikey 85 z105 1 sod-123 39v bzt52c39-13-fdict-nd digikey 86 z106, z107 2 sod-123 18v bzt52c18-fdict-nd digikey 87 z108, z109 2 sod-123 8.2v bzt52c8v2-fdict-nd digikey 88 volume knob 1 blue knob mc21060 10m7578 newark 89 thermalloy to-220 mounting kit with screw 3 kit screw, rohs aavi d 4880g 82k6096 newark 90 1/2" standoffs 4-40 5 standoff 8401k-nd digikey 91 4-40 nut 5 100 per bag h724-nd digikey 92 no. 4 lock washer 5 100 per bag h729-nd digikey *tachyonix corporation, 14 gonaka ji mokuji jimokuji-cho, ama-gun aichi, japan 490-1111 http://www.tachyonix.co.jp info@tachyonix.co.jp
www.irf.com page 40 of 49 iraudamp5 rev 3.3 iraudamp5 hardware voltage regulator mounting: fig 40 item description 1 insulator thermalfilm 2 shoulder washer 3 flat washer #4 4 no. 4-40 unc-2b hex nut 5 no. 4-40 unc-2a x 1/2 long phillips pan head screw 6 lockwasher, no.4 7 heatsink 8 pcb 7 8 item description 1 insulator thermalfilm 2 shoulder washer 3 flat washer #4 4 no. 4-40 unc-2b hex nut 5 no. 4-40 unc-2a x 1/2 long phillips pan head screw 6 lockwasher, no.4 7 heatsink 8 pcb 7 8
www.irf.com page 41 of 49 iraudamp5 rev 3.3 iraudamp5 pcb specifications figure 41 motherboard and daughter-board layer stack daughter board: material: fr4, ul 125 ? c layer stack: 2 layers, 1 oz. cu each, through-hole plated dimensions: 3.125? x 1.52? x 0.062? solder mask: lpi solder mask, smobc on top and bottom layers plating: open copper solder finish silkscreen: on top and bottom layers motherboard: material: fr4, ul 125 ? c layer stack: 2 layers, 1 oz. cu dimensions: 5.2? x 5.8? x 0.062? solder mask: lpi solder mask, smobc on top and bottom layers plating: open copper solder finish silkscreen: on top and bottom layers
www.irf.com page 42 of 49 iraudamp5 rev 3.3 iraudamp5 pcb layers class d, daughter-board: figure 42 pcb layout ? top-si de solder-mask and silkscreen
www.irf.com page 43 of 49 iraudamp5 rev 3.3 figure 43. pcb layout ? bottom layer and pads and botto m silk screen
www.irf.com page 44 of 49 iraudamp5 rev 3.3 pcb layout motherboard: fig 44 top layer
www.irf.com page 45 of 49 iraudamp5 rev 3.3 fig 45 top silk screen
www.irf.com page 46 of 49 iraudamp5 rev 3.3 fig 46 bottom
www.irf.com page 47 of 49 iraudamp5 rev 3.3 fig 47 4.0
www.irf.com page 48 of 49 iraudamp5 rev 3.3 fig 48 bottom silkscreen 4.0
www.irf.com page 49 of 49 iraudamp5 rev 3.3 revision changes descriptions revision changes description date 3.0 released 7/27/07 3.1 schematic error marked on red pages 31-33 r25 and r29 was connected to csh fig 40 and fig 41 updated 1/28/08 3.2 rohs compliant (bom updated) 5/29/09 3.3 deleted drawings author and e-mail 10/21/09 3.4 bom updated :ice components as a second vender of the inductor 10/28/09 3.5 correct deadtime setting graph fig 12 05/03/11 world headquarters: 233 kansas st., el segundo, california 90245 tel: (310) 252-7105 data and specifications subject to change without notice. 7/27/2007
www.irf.com page 50 of 49 iraudamp5 rev 3.3

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