l'1li analog ~ devices features registers. d/a. amplifier in single hybrid deglitched voltage output 6mhz: update rate applica tlons vector scan displavs analytical instrumentation digital vcoa military systems general description the i\najog devices hdd-1206 d1:'\ converter combin~" in- novative design techniques with remarkable hybrid construction to achieve deglitched \'oltage outputs at update rates as as 6mb", despite its small sizc and low power, the hdd-j206 the user with a complete solution h) demanding which require the conversion of high-speed digital dcglitched analog output voltages. the unit is housed in an industry st:mdard contains all the necessary circuit components to outputs at high update rates witbout the need for external circuits, input registers, current-output dia, deglitching circuits, and an output amplifier arc au included inside the hdd-1206, into and with the deglitcbing problem solved in a the user of the hod.1206 is able l(! the sqlulion iow his system with a minimum of effon. user involvement is limited to thl: simpk task of establishing the "hold" time for an optimum value by sclel:ting the correct resistor value. after that step is :u:complished, the addition of 3 at the output of the via assures a ".:;k3n" of tbe 12 bib of digital information applied 10 the input~ at video update rates, the hdd-1206 is available in 32-pin dual in-line ceramic packages. filtl:r 1.2-bitde'glitched e out dia converter hdd-1206 functional block diagram -------- pin designations hdd-12()6 obsolete
specific mudd ~tu resolution w a('-curacy (uncarity) diffcrcnwj nonlinearity zero oilki' (iniwj) teml'1!1li\ turecoi!fficlents lidcarily g.in scutmgtlfdc 10 'i/i.$b .:.5, i2v fsch"ngc slew iuic gain "0" lo..a (cach hi 0 coding (s? tami ""i", ,"'gr', strobe isi'tjt "i}" load rii!climcihh!i!nc [io%-?o%) \\('!ath i ,0000 curren! rh' l,o()oo ilipol.. vollage currel>! r!:"ana!glllch ourpul 'ihi'.rmalre$!stance' mtbp' 14 '<1f ,,",l/t><,n(,."",."". ions (typical +2.4 0 ,2,4 (i $0 ~ 0 5> + 25"c with nominal power supplies and 1 kfl output load unless otherwise noted) mjn hdo.umjw typ 11 2,5 ~ 35 gu.itanlccd 5 w 100 2 bo si} 2s adju".hlc 'itus) oncs"",dord tfl oll< $1.",1..0 l.5& 010 " 5,12 , 512 5u (ii 1,000 h b lido, 1206j"" uuj!i w'c am t theory of operation the equivalent circuit for the for the hdd-1206 d/a converter is shown in functional block diagram. the unit consists of input registers, fast-schiidg current dii\, output amplifier, timing generntor, add ass{iciared the purpose of the input register circuits is to de-skew the input bits and assure their simultaneous arrival at the inpul of the curren! o/a. this is critkal b<."c3use time skew on the input data bils is a major contributor to discontinuities, or " in the analog output of a oia. the timing generator includes a track & hold circuit and generates the required internal pulses for operation whenever it receives a strobe input pulse. see i, t.he hoo.1206 timing diagrnm. stro6t "t' how track 1 1 i max i j sam! as i to.. -i ~olc !ii..r l- rolit 1+, hlgi$ier olm"" figure 1, hdd-1206 timing diagram (digital inputs not cfumgfng! as shown, the strobe pulse is a positive-going 1'1'1. pulse supplied by the user of the hpo-1206. internal timing circuits establish the maximum 55ns delay from the leading edge of the strobe pulse to the leading edge of the t/h (trackihold) and the maximum ions dclay from the edge of the pulse to the leading edge of the register pulse. the data from ihe input are strobed int.o the current d/a at the end of ihis 6sm interval, so must be valid by that tinle. the user determincs the width of the t/h pulse (and the register pul~e) by select.ing the value of the rudld resistor. st'c i and 2. as shown, the width uf the hold pulse can vary from approximatcly 30ns to approximately loons by using resistor values from ik 10 5k, respectivel)'. ~ figure 2, hold time vs. rhold for most applications, a value of 3.6kh and a pulse width of approximately 85ns is the optimum choke, this pulse width wiij "hold" the analo~ output of the hdd-1206 oia uoli! the "glileh" resulting from the most recent update has passed. without infringing on ihe word rate capabilitie$ of the hpp-1206. current.output dra converters a brief review of the salient characteristics of current dra con- verters may be a useful approach to the operation of the hdp-1206 unit. oia converters are inherently fa$lcr than voltage-output types hecausc of ttie absence of an this mean$ converters have no slew rate limi- tation which can slow settling; not are they subject to the overshoot and problems often associated with feedback bmh current-switching and converters display a discontinuity, or "glitch," in their output$ because of the basic characteristic of saturated logit: (rrl is an example) which causes the delay to be less for negal than il is for inputs. this difference in propagation manifests itself as a "worst case at the major c'arry point. or mid-scale, of the outpui range of the .::urrent converte" this is the at which nearly equal and opposite .::urrems arc being switched within the converter. the "glilch" at mid-scale, the switching point of the most bil (msb), will be halved at the !i. and 3;' halved again at the and % etc, the of the is a function si2nal dynamks and caonot the variations in caused dynamics create a multitude of illlermodulation (1m) products, some of which fall imo the video as 1>purious and increased noise level. these 1.\1 arc also relatively immune to elimination by the amplitude of the glitch can be reduced by the bits; bur no amount of dc-skewing or can negate the physics nf sarurated logic which cause ihe glitch to be initially. the hes! then, is to cause the glitch to remain a constant across the entire output range of the converter. the efficiencies of ihe circuit will be enhanced if the solution can also permit the full drive capabilities of the currcnt-outpul dia in either unipolar or bipolar modes of the design approach used in the analog devices hdp-1206 dia converter accomplishes these desired goals and voltage outputs at bigh update rates. notes on oeglltching refer again to the equivalent circuit for the hdd-1206. the data bits are applied thmugh the input register to the current.out- put pia converter, which is capable of up to 5.l2ma of ~'\!iput current. the output of the currern d/.'\, in rum, is applied to the of the output via external 10 the hdd-1206. the timing generator supplies the necessary and to apply signals to the current d/a and output amplifier after the initial glitch caused by the digital inputs has subsided. the digital "i" (hold) level of the tih pulse caosc$ the switch at the input qf the amplifier to open, holding the last value uf tbe current dla con\'erter. during this hold inten'al, transients c;wsed by updating digital inputs arc masked from the amplifier, thereby avoiding hdd-1206 output discontinuities whose amplitude would be a function of signal ten nanoseconds after the 'fih pulse goes ({) the "i" the register pulse also changes stare frum "0" tq "i". ---- -- obsolete
this tr.msition moves the output of the current pia to the new value established by the most recent digital inputs applied to the hpp-1206. any change in rhe current pia output has stabji7.cd by the time the tih pulse remins to the digital "0" (track) leyel. re-esrab. lisbiog the tr.!ck mode closes the switch at the input of the amplifier and the omput of the hpp.1206 move... to the new analog value diclated by the digital input word. as shown in figure i, the oulput of the hpp-1206 will contain switching transients associated with the t/h pulse, but these "glitches" will be conslilor in amplitude and duration and will occur at the update rate, since they are a function of the strobe pulse applied by the user. these switching tr.msicms will settle out io approximately 500ns, and will have uniform amplitude over the complete analog output range of the d/a. for strobe rates of 2mhz and above., the sl.:ttling interval switching from "hold" to "track", and vice versa, will produce a constant de offset on the output. the hpd-1206 is not intended to get rid of all glitches per se; it is designed to provide a constant-amplitude glitch. when the area under the transient curve is held constant, the frequcncy spectrum of the glitch is a fine ime, i..e" a single-l.ine spectrum at the sample rate frequencies, and harmonics of the sample frequency. the hdd-1206 effectively e[jminates the 1.\'\ product.~ discussed above. when it does, the signal-tn-noise (sin) ratio approaches that of an ideally-quantizcd signal, where the rms noise is qlvu, when frequencies above nyquist arc fillered out. glitch vs. pedestal in addition to the "glitch" which is a characu:risue of current d/as, the t['dck & hold used in the hdd-1206 also contributes an anomaly to the output signal. refer to figurc 3. this diagram compares the "glilch" created by the hdd-1206 to the pedt"stal created by the internal t/h circuits. ---~ 'h- ,_. """"" ""'em<"" , , r hi""'" ~ -."".... ."no.".. ,'.n""'t figure 3. pedestal/glitch relationship as shown, the "glitch" is a transient signal which remains constant in width and amplir.ude over the entire output range, at all update rdtes, thepedesta!, on the other hand, is iif1 offset signal whose amplitude can v.ary (because of switching transient settling) as a function of hold time and word ratc. this pedestal is caused by charge transfer associated with the hold capacitor; the transfer occurs when the hdd-1206 circuits arc switched from a "track" to "hold" condition. the pedestal is basicallj' an (,ffset error in the hdd-1206 output and can be compensated with the offset adjust when the unit is installc:d in the user's system. figure 3 is not drawn to seale; there is no attempt to imply the identified elements have precisely that relationship to one another. they arc exaggerated f()r illustrative purposc's. applicati:ons bipolar conn?:uons for the hdd-1206 d/a converter are shown in figure 4. as indicated, a unipolar negative qutput is accom- plished by cotmccting bipolar pin 29 to ground, instead of to pins 27 and 28. 'h' ,.. . 'i" !lit , ,...", q ." ~ t: . '.' ~~ ~ 0fi1 ~ ' . off' , ..,. , ... """,... 0." con\lv!tea ...""q |
