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? semiconductor components industries, llc, 2015 april, 2015 ? rev. 18 1 publication order number: mc10ep142/d mc10ep142, mc100ep142 3.3 v / 5 v?ecl 9-bit shift register the mc10ep/100ep142 is a 9?bit shift register, designed with byte-parity applications in mind. the mc10/100ep142 is capable of performing serial/parallel data into serial/parallel out and shifting in only one direction. the nine inputs d0 ? d8 accept parallel input data, while s?in accepts serial input data. the qt0:87 outputs do not need to be terminated for the shift operation to function. to minimize power, any q output not used should be left unterminated. the sel (select) input pin is used to switch between the two modes of operation ? shift and load. the shift direction is from bit 0 to bit 8. input data is accepted by the registers a set?up time before the positive going edge of clk0 or clk1; shifting is also accomplished on the positive clock edge. a high on the master reset pin (mr) asynchronously resets all the registers to zero, overriding clk0 and clk1 inputs. the 100 series contains temperature compensation. features ? shift frequency >2.8 ghz (typical) ? 9-bit for byte?parity applications ? asynchronous master reset ? dual clocks ? pecl mode operating range: v cc = 3.0 v to 5.5 v with v ee = 0 v ? necl mode operating range: v cc = 0 v with v ee = ?3.0 v to ?5.5 v ? open input default state ? safety clamp on inputs ? these devices are pb?free and are rohs compliant lqfp?32 fa suffix case 873a marking diagram* *for additional marking information, refer to application note and8002/d. www. onsemi.com see detailed ordering and shipping information in the package dimensions section on page 12 of this data sheet. ordering information xxx = 10 or 100 a = assembly location wl = wafer lot yy = year ww = work week g or = pb?free package mcxxx ep142 awlyywwg qfn32 mn suffix case 488am 32 1 mcxxx ep142 awlyyww 1 (note: microdot may be in either location)
mc10ep142, mc100ep142 www. onsemi.com 2 figure 1. pinout: lqfp?32 (top view) 25 26 27 28 29 30 31 32 15 14 13 12 11 10 9 12345678 24 23 22 21 20 19 18 17 16 d7 d8 q7 q4 q2 v cc mr q0 clk0 d6 q3 q1 v ee sel clk0 clk1 clk1 v cc s?in mc10ep142 mc100ep142 s?in v ee d0 d1 d2 d3 q8 q7 q6 v cc q5 d4 d5 figure 2. pinout: qfn?32 (top view) 32 31 30 29 28 27 26 25 9 10 11 12 13 14 15 16 12345678 24 23 22 21 20 19 18 17 exposed pad (ep) d7 d8 q7 q4 q2 v cc mr q0 clk0 d6 q3 q1 v ee sel clk0 clk1 clk1 v cc s?in s?in v ee d0 d1 d2 d3 q8 q7 q6 v cc q5 d4 d5 table 1. pin description pin name i/o default state description 1,31,30,29,27, 26,25,24,23 d[0:8] ecl input low single?ended parallel data inputs [0:8]. internal 75 k to v ee . 2 s?in ecl input low noninverted differential serial input. internal 75 k to v ee . 3 s?in ecl input high inverted differential serial input. internal 75 k to v ee and 36.5 k to v cc . 4 clk0 ecl input low noninverted differential clk0 input. internal 75 k to v ee . 5 clk0 ecl input high inverted differential clk0b input. internal 75 k to v ee and 36.5 k to v cc . 6 clk1 ecl input low noninverted differential clk1 input. internal 75 k to v ee . 7 clk1 ecl input high inverted differential clk1b input. internal 75 k to v ee and 36.5 k to v cc . 8 sel ecl input low single?ended select logic input. internal 75 k to v ee . 9 mr ecl input low single?ended master reset logic input. internal 75 k to v ee . 10,11,12,14,1 5,18,19,22 q0,q1,q2,q3, q4,q5,q6,q8 ecl output ? single?ended parallel data outputs [0,1,2,3,4,5,6,8]. typically terminated with 50 to v tt = v cc ? 2 v. 13,17,32 v cc ? ? positive supply voltage. all v cc pins must be externally connected to power supply to guarantee proper operation. 16,28 v ee ? ? negative supply voltage. all v ee pins must be externally connected to power supply to guarantee proper operation. 20 q7 ecl output ? noninverted differential parallel/serial data output 7. typically terminated with 50 to v tt = v cc ? 2 v. 21 q7 ecl output ? inverted differential parallel/serial data output 7. typically terminated with 50 to v tt = v cc ? 2 v. 1. all v cc and v ee pins must be externally connected to power supply to guarantee proper operation.
mc10ep142, mc100ep142 www. onsemi.com 3 table 2. truth table function (note 2) sel s?in mr clk0 clk1 q0 q1 q2 q3 q4 q5 q6 q7 q8 q9 load l x l z z d0 d1 d2 d3 d4 d5 d6 d7 d8 d9 shift h l l z z l q0 q1 q2 q3 q4 q5 q6 q7 q8 h h l z z h q0 q1 q2 q3 q4 q5 q6 q7 q8 reset x x h z z l l l l l l l l l l 2. all load and shift functions are accomplished on the positive edge of clk0 or clk1.
mc10ep142, mc100ep142 www. onsemi.com 4 s-in d0 d1 s-in 1 0 dq dq 1 0 d2 d3 1 0 1 0 dq d4 dq 1 0 d5 1 0 dq 1 0 d6 dq 1 0 d7 dq 1 0 d8 dq dq sel mr clk0 clk0 clk1 clk1 q0 q1 q2 q3 q4 q5 q6 q7 q7 q8 figure 3. logic diagram q v cc v ee r1 r1 r1 r1 r1 r1 r1 r1 r1 r1 r1 r1 r1 r1 r1 r2 r1 r2 r2 r1
mc10ep142, mc100ep142 www. onsemi.com 5 table 3. attributes characteristics value internal input pulldown resistor (r1) 75 k internal input pullup resistor (r2) 37.5 k esd protection human body model machine model charged device model > 2 kv > 100 v > 2 kv moisture sensitivity (note 3) lqfp qfn level 2 level 1 flammability rating oxygen index: 28 to 34 ul?94 v?0 @ 0.125 in transistor count 405 devices meets or exceeds jedec spec eia/jesd78 ic latchup test 3. for additional information, refer to application note and8003/d.
mc10ep142, mc100ep142 www. onsemi.com 6 table 4. maximum ratings symbol parameter condition 1 condition 2 rating unit v cc positive power supply v ee = 0 v 8 v v ee negative power supply v cc = 0 v ?8 v v i pecl mode input voltage necl mode input voltage v ee = 0 v v cc = 0 v v i v cc v i v ee 6 ?6 v i out output current continuous surge 50 100 ma t a operating temperature range ?40 to +85 c t stg storage temperature range ?65 to +150 c ja thermal resistance (junction?to?ambient) 0 lfpm 500 lfpm lqfp?32 lqfp?32 80 55 c/w jc thermal resistance (junction?to?case) standard board lqfp?32 12 to 17 c/w ja thermal resistance (junction?to?ambient) 0 lfpm 500 lfpm qfn?32 qfn?32 31 27 c/w jc thermal resistance (junction?to?case) 2s2p qfn?32 12 c/w t sol wave solder pb?free 3 sec @ 260 c 265 c stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device function ality should not be assumed, damage may occur and reliability may be affected.
mc10ep142, mc100ep142 www. onsemi.com 7 table 5. 10ep dc characteristics, pecl v cc = 3.3 v, v ee = 0 v (note 4) symbol characteristic ?40 c 25 c 85 c unit min typ max min typ max min typ max i ee negative power supply current 105 125 145 105 125 145 105 125 145 ma v oh output high voltage (note 5) 2165 2290 2415 2230 2355 2480 2290 2415 2540 mv v ol output low voltage (note 5) 1365 1490 1615 1430 1555 1680 1490 1615 1740 mv v ih input high voltage (single?ended) 2090 2415 2155 2480 2215 2540 mv v il input low voltage (single?ended) 1365 1690 1460 1755 1490 1815 mv v ihcmr input high voltage common mode range (differential configuration) (note 6) 2.0 3.3 2.0 3.3 2.0 3.3 v i ih input high current (@ v ih ) 150 150 150 a i il input low current (@ v il ) clk0, clk1, d, s?in clk0 , clk1, s?in 0.5 ?150 0.5 ?150 0.5 ?150 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. 4. input and output parameters vary 1:1 with v cc . v ee can vary +0.3 v to ?2.2 v. 5. all loading with 50 to v cc ? 2.0 v. 6. v ihcmr min varies 1:1 with v ee , v ihcmr max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the dif ferential input signal. table 6. 10ep dc characteristics, pecl v cc = 5.0 v, v ee = 0 v (note 7) ?40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit i ee negative power supply current (note 8) 105 125 145 105 125 145 105 125 145 ma v oh output high voltage (note 9) 3865 3990 4115 3930 4055 4180 3990 4115 4240 mv v ol output low voltage (note 9) 3065 3190 3315 3130 3255 3380 3190 3315 3440 mv v ih input high voltage (single?ended) 3790 4115 3855 4180 3915 4240 mv v il input low voltage (single?ended) 3065 3390 3130 3455 3190 3515 mv v ihcmr input high voltage common mode range (differential configuration) (note 10) 2.0 5.0 2.0 5.0 2.0 5.0 v i ih input high current (@ v ih ) 150 150 150 a i il input low current (@ v il ) clk0, clk1, d, s?in clk0 , clk1, s?in 0.5 ?150 0.5 ?150 0.5 ?150 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. 7. input and output parameters vary 1:1 with v cc . v ee can vary +2.0 v to ?0.5 v. 8. required 500 lfpm air flow when using +5 v power supply. for (v cc ? v ee ) >3.3 v, 5 to 10 in line with v ee required for maximum thermal protection at elevated temperatures. recommend v cc ? v ee operation at 3.3 v. 9. all loading with 50 to v cc ? 2.0 v. 10. v ihcmr min varies 1:1 with v ee , v ihcmr max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the dif ferential input signal. table 7. 10ep dc characteristics, necl v cc = 0 v, v ee = ?5.5 v to ?3.0 v (note 11) ?40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit i ee negative power supply current (note 12) 105 125 145 105 125 145 105 125 145 ma v oh output high voltage (note 13) ?1135 ?1010 ?885 ?1070 ?945 ?820 ?1010 ?885 ?760 mv v ol output low voltage (note 13) ?1935 ?1810 ?1685 ?1870 ?1745 ?1620 ?1810 ?1685 ?1560 mv
mc10ep142, mc100ep142 www. onsemi.com 8 table 7. 10ep dc characteristics, necl v cc = 0 v, v ee = ?5.5 v to ?3.0 v (note 11) 85 c 25 c ?40 c symbol unit max typ min max typ min max typ min characteristic v ih input high voltage (single?ended) ?1210 ?885 ?1145 ?820 ?1085 ?760 mv v il input low voltage (single?ended) ?1935 ?1610 ?1870 ?1545 ?1810 ?1485 mv v ihcmr input high voltage common mode range (differential configuration) (note 14) v ee +2.0 0.0 v ee +2.0 0.0 v ee +2.0 0.0 v i ih input high current (@ v ih ) 150 150 150 a i il input low current (@ v il ) clk0, clk1, d, s?in clk0 , clk1, s?in 0.5 ?150 0.5 ?150 0.5 ?150 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. 11. input and output parameters vary 1:1 with v cc . 12. required 500 lfpm air flow when using ?5 v power supply. for (v cc ? v ee ) >3.3 v, 5 to 10 in line with v ee required for maximum thermal protection at elevated temperatures. recommend v cc ?v ee operation at 3.3 v. 13. all loading with 50 to v cc ? 2.0 v. 14. v ihcmr min varies 1:1 with v ee , v ihcmr max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the dif ferential input signal. table 8. 100ep dc characteristics, pecl v cc = 3.3 v, v ee = 0 v (note 15) ?40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit i ee negative power supply current 105 125 145 105 130 150 105 130 150 ma v oh output high voltage (note 16) 2155 2280 2405 2155 2280 2405 2155 2280 2405 mv v ol output low voltage (note 16) 1305 1480 1605 1305 1480 1605 1305 1480 1605 mv v ih input high voltage (single?ended) 2075 2420 2075 2420 2075 2420 mv v il input low voltage (single?ended) 1305 1675 1305 1675 1305 1675 mv v ihcmr input high voltage common mode range (differential configuration) (note 17) 2.0 3.3 2.0 3.3 2.0 3.3 v i ih input high current (@ v ih ) 150 150 150 a i il input low current (@ v il ) clk0, clk1, d, s?in clk0 , clk1, s?in 0.5 ?150 0.5 ?150 0.5 ?150 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. 15. input and output parameters vary 1:1 with v cc . v ee can vary +0.3 v to ?2.2 v. 16. all loading with 50 to v cc ? 2.0 v. 17. v ihcmr min varies 1:1 with v ee , v ihcmr max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the dif ferential input signal. table 9. 100ep dc characteristics, pecl v cc = 5.0 v, v ee = 0 v (note 18) ?40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit i ee negative power supply current (note 19) 105 125 145 105 130 150 105 130 150 ma v oh output high voltage (note 20) 3855 3980 4105 3855 3980 4105 3855 3980 4105 mv v ol output low voltage (note 20) 3005 3180 3305 3005 3180 3305 3005 3180 3305 mv v ih input high voltage (single?ended) 3775 4120 3775 4120 3775 4120 mv v il input low voltage (single?ended) 3005 3375 3005 3375 3005 3375 mv
mc10ep142, mc100ep142 www. onsemi.com 9 table 9. 100ep dc characteristics, pecl v cc = 5.0 v, v ee = 0 v (note 18) 85 c 25 c ?40 c symbol unit max typ min max typ min max typ min characteristic v ihcmr input high voltage common mode range (differential configuration) (note 21) 2.0 5.0 2.0 5.0 2.0 5.0 v i ih input high current (@ v ih ) 150 150 150 a i il input low current (@ v il ) clk0, clk1, d, s?in clk0 , clk1, s?in 0.5 ?150 0.5 ?150 0.5 ?150 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. 18. input and output parameters vary 1:1 with v cc . v ee can vary +2.0 v to ?0.5 v. 19. required 500 lfpm air flow when using +5 v power supply. for (v cc ? v ee ) >3.3 v, 5 to 10 in line with v ee required for maximum thermal protection at elevated temperatures. recommend v cc ?v ee operation at 3.3 v. 20. all loading with 50 to v cc ? 2.0 v. 21. v ihcmr min varies 1:1 with v ee , v ihcmr max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the dif ferential input signal. table 10. 100ep dc characteristics, necl v cc = 0 v, v ee = ?5.5 v to ?3.0 v (note 22) ?40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit i ee negative power supply current (note 23) 105 125 145 105 130 150 105 130 150 ma v oh output high voltage (note 24) ?1145 ?1020 ?895 ?1145 ?1020 ?895 ?1145 ?1020 ?895 mv v ol output low voltage (note 24) ?1995 ?1820 ?1695 ?1995 ?1820 ?1695 ?1995 ?1820 ?1695 mv v ih input high voltage (single?ended) ?1225 ?880 ?1225 ?880 ?1225 ?880 mv v il input low voltage (single?ended) ?1995 ?1625 ?1995 ?1625 ?1995 ?1625 mv v ihcmr input high voltage common mode range (differential configuration) (note 25) v ee +2.0 0.0 v ee +2.0 0.0 v ee +2.0 0.0 v i ih input high current (@ v ih ) 150 150 150 a i il input low current (@ v il ) clk0, clk1, d, s?in clk0 , clk1, s?in 0.5 ?150 0.5 ?150 0.5 ?150 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. 22. input and output parameters vary 1:1 with v cc . 23. required 500 lfpm air flow when using ?5 v power supply. for (v cc ? v ee ) >3.3 v, 5 to 10 in line with v ee required for maximum thermal protection at elevated temperatures. recommend v cc ?v ee operation at 3.3 v. 24. all loading with 50 to v cc ? 2.0 v. 25. v ihcmr min varies 1:1 with v ee , v ihcmr max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the dif ferential input signal. table 11. ac characteristics v cc = 3.0 v to 5.5 v; v ee = 0.0 v or v cc = 0.0 v; v ee = ?3.0 v to ?5.5 v (note 26) symbol characteristic ?40 c 25 c 85 c unit min typ max min typ max min typ max f shift maximum shift frequency 2.8 ghz t plh , t phl propagation delay to output clkx mr 500 500 625 625 750 750 550 550 675 675 800 800 575 575 700 700 825 825 ps t s setup time d sel 50 100 ?50 50 50 100 ?50 50 50 100 ?50 50 ps
mc10ep142, mc100ep142 www. onsemi.com 10 table 11. ac characteristics v cc = 3.0 v to 5.5 v; v ee = 0.0 v or v cc = 0.0 v; v ee = ?3.0 v to ?5.5 v (note 26) symbol unit 85 c 25 c ?40 c characteristic symbol unit max typ min max typ min max typ min characteristic t h hold time d sel 100 50 50 ?50 100 50 50 ?50 100 50 50 ?50 ps t rr reset recovery time 800 ps t pw minimum pulse width 200 ps t skew within-device skew (note 27) q, q duty cycle skew (note 28) 50 5.0 100 20 50 5.0 100 20 50 5.0 100 20 ps t jitter random clock jitter (figure 4) 1 2 1 2 1 2 ps v inpp input voltage swing/sensitivity (differential configuration) 150 800 1200 150 800 1200 150 800 1200 mv t r , t f rise/fall times @ 50 mhz (20 - 80%) 110 180 250 125 190 275 150 215 300 ps note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. 26. measured using a 750 mv source, 50% duty cycle clock source. all loading with 50 to v cc ? 2.0 v. 27. within-device skew is defined as identical transitions on similar paths through a device. 28. skew is measured between outputs under identical transitions. duty cycle skew is defined only for differential operation whe n the delays are measured from the cross point of the inputs to the cross point of the outputs. figure 4. output voltage amplitude / rms jitter vs. input frequency at ambient temperature (typical) input frequency (mhz) 1 2 3 4 5 6 7 8 9 output voltage amplitude (mv) jitter out ps (rms) figure 5. ac reference measurement clk clk q q t phl t plh v inpp = v ih (clk) ? v il (clk) v outpp = v oh (q) ? v ol (q)
mc10ep142, mc100ep142 www. onsemi.com 11 figure 6. typical termination for output driver and device evaluation (see application note and8020/d ? termination of ecl logic devices.) driver device receiver device qd q d z o = 50 z o = 50 50 50 v tt v tt = v cc ? 2.0 v
mc10ep142, mc100ep142 www. onsemi.com 12 ordering information device package shipping ? MC10EP142FAG lqfp?32 (pb?free) 250 units / tray mc10ep142far2g 2000 / tape & reel mc10ep142mng qfn?32 (pb?free) 74 units / rail mc10ep142mnr4g 1000 / tape & reel mc100ep142fag lqfp?32 (pb?free) 250 units / tray mc100ep142far2g 2000 / tape & reel mc100ep142mng qfn?32 (pb?free) 74 units / rail mc100ep142mnr4g 1000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. resource reference of application notes an1405/d ? ecl clock distribution techniques an1406/d ? designing with pecl (ecl at +5.0 v) an1503/d ? eclinps i/o spice modeling kit an1504/d ? metastability and the eclinps family an1568/d ? interfacing between lvds and ecl an1672/d ? the ecl translator guide and8001/d ? odd number counters design and8002/d ? marking and date codes and8020/d ? termination of ecl logic devices and8066/d ? interfacing with eclinps and8090/d ? ac characteristics of ecl devices
mc10ep142, mc100ep142 www. onsemi.com 13 package dimensions 1 8 9 17 25 32 ae ae p detail y base n j d f metal section ae?ae g seating plane r q w k x 0.250 (0.010) gauge plane e c h detail ad detail ad a1 b1 v1 4x s 4x 9 ?t? ?z? ?u? t-u 0.20 (0.008) z ac t-u 0.20 (0.008) z ab 0.10 (0.004) ac ?ac? ?ab? m 8x ?t?, ?u?, ?z? t-u m 0.20 (0.008) z ac 32 lead lqfp case 873a?02 issue c notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. datum plane ?ab? is located at bottom of lead and is coincident with the lead where the lead exits the plastic body at the bottom of the parting line. 4. datums ?t?, ?u?, and ?z? to be determined at datum plane ?ab?. 5. dimensions s and v to be determined at seating plane ?ac?. 6. dimensions a and b do not include mold protrusion. allowable protrusion is 0.250 (0.010) per side. dimensions a and b do include mold mismatch and are determined at datum plane ?ab?. 7. dimension d does not include dambar protrusion. dambar protrusion shall not cause the d dimension to exceed 0.520 (0.020). 8. minimum solder plate thickness shall be 0.0076 (0.0003). 9. exact shape of each corner may vary from depiction. dim a min max min max inches 7.000 bsc 0.276 bsc millimeters b 7.000 bsc 0.276 bsc c 1.400 1.600 0.055 0.063 d 0.300 0.450 0.012 0.018 e 1.350 1.450 0.053 0.057 f 0.300 0.400 0.012 0.016 g 0.800 bsc 0.031 bsc h 0.050 0.150 0.002 0.006 j 0.090 0.200 0.004 0.008 k 0.450 0.750 0.018 0.030 m 12 ref 12 ref n 0.090 0.160 0.004 0.006 p 0.400 bsc 0.016 bsc q 1 5 1 5 r 0.150 0.250 0.006 0.010 v 9.000 bsc 0.354 bsc v1 4.500 bsc 0.177 bsc b1 3.500 bsc 0.138 bsc a1 3.500 bsc 0.138 bsc s 9.000 bsc 0.354 bsc s1 4.500 bsc 0.177 bsc w 0.200 ref 0.008 ref x 1.000 ref 0.039 ref
mc10ep142, mc100ep142 www. onsemi.com 14 package dimensions qfn32 5x5, 0.5p case 488am issue a seating note 4 k 0.15 c (a3) a a1 d2 b 1 9 17 32 e2 32x 8 l 32x bottom view top view side view d a b e 0.15 c pin one location 0.10 c 0.08 c c 25 e notes: 1. dimensions and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.15 and 0.30mm from the terminal tip. 4. coplanarity applies to the exposed pad as well as the terminals. plane *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 0.50 3.35 0.30 3.35 32x 0.63 32x 5.30 5.30 l1 detail a l alternate terminal constructions l ??? 0.80 a1 ??? a3 0.20 ref b 0.18 d 5.00 bsc d2 2.95 e 5.00 bsc 2.95 e2 e 0.50 bsc 0.30 l k 0.20 1.00 0.05 0.30 3.25 3.25 0.50 ??? max ??? l1 0.15 e/2 note 3 pitch dimension: millimeters recommended a m 0.10 b c m 0.05 c on semiconductor and are registered trademarks of semiconductor co mponents industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other inte llectual property. a listing of scillc?s pr oduct/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent?marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typical s? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or us e scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unin tended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyrig ht laws and is not for resale in any manner. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 mc10ep142/d eclinps is a trademark of semiconductor components industries, llc (scillc) literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative

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