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october 2014 docid026822 rev 2 1 / 13 this is information on a product in full production. www.st.com STP140N8F7 n - channel 80 v, 3.5 m typ., 90 a stripfet? f7 power mosfet in a to - 220 package datasheet - production data figure 1 : internal schematic diagram features order code v ds r ds(on) max. i d p tot STP140N8F7 80 v 4.3 m 90 a 200 w ? among the lowest r ds(on) on the market ? excellent figure of merit (fom) ? low c rss /c iss ratio for emi immunity ? high avalanche ruggedness applications ? switching applications description this n - channel power mosfet utilizes stripfet? f7 technology with an enhanced trench gate structure that results in very low on - state resistance, while also reducing internal c apacitance and gate charge for faster and more efficient switching. table 1: device summary order code marking package packaging STP140N8F7 140n8f7 to - 220 tube am01475v1_ t ab d(2, t ab) g(1) s(3)
contents STP140N8F7 2 / 13 docid026822 rev 2 contents 1 electrical ratings ................................ ................................ ............. 3 2 electrical characteristics ................................ ................................ 4 2.1 electrical characteri stics (curves) ................................ ...................... 6 3 test circuits ................................ ................................ ..................... 8 4 package mechanical data ................................ ............................... 9 4.1 to - 220 type a package information ................................ ................ 10 5 revision hist ory ................................ ................................ ............ 12
STP140N8F7 electrical ratings docid026822 rev 2 3 / 13 1 electrical ratings table 2: absolute maximum ratings symbol parameter value unit v ds drain - source voltage 80 v v gs gate - source voltage 20 v i d drain current (continuous) at t c = 25 c 90 (1) a i d drain current (continuous) at t c = 100 c 90 a i dm (2) drain current (pulsed) 360 a p tot total dissipation at t c = 25 c 200 w e as (3) single pulse avalanche energy 515 mj t j operating junction temperature - 55 to 175 c t stg storage temperature notes: (1) limited by package (2) pulse width is limited by safe operating area (3) starting tj =25 c, id = 18.5 a, vdd = 50 v table 3: thermal data symbol parameter value unit r thj - case thermal resistance junction - case 0.75 c/w r thj - amb thermal resistance junction - ambient 62.5 c/w
electrical characteristics STP140N8F7 4 / 13 docid026822 rev 2 2 electrical characteristics (t case = 25 c unless otherwise specified) table 4: on/off states symbol parameter test conditions min. typ. max. unit v (br)dss drain - source breakdown voltage v gs = 0, i d = 250 a 80 v i dss zero gate voltage drain current v gs = 0, v ds = 80 v 1 a v gs = 0, v ds = 80 v, t j =125 c 10 a i gss gate - source leakage current v ds = 0, v gs = 20 v 100 na v gs(th) gate threshold voltage v ds = v gs , i d = 250 a 2.5 4.5 v r ds(on) static drain - source on - resistance v gs =10 v, i d = 45 a 3.5 4.3 m table 5: dynamic symbol parameter test conditions min. typ. max. unit c iss input capacitance v gs = 0, v ds = 40 v, f = 1 mhz - 6340 - pf c oss output capacitance - 1195 - pf c rss reverse transfer capacitance - 105 - pf q g total gate charge v dd = 40 v, i d = 64 a, v gs = 10 v - 96 - nc q gs gate - source charge - 30 - nc q gd gate - drain charge - 26 - nc table 6: switching times symbol parameter test conditions min. typ. max. unit t d(on) turn - on delay time v dd = 40 v, i d = 45 a r g =4.7 , v gs = 10 v - 26 - ns t r rise time - 51 - ns t d(off) turn - off - delay time - 82 - ns t f fall time - 44 - ns
STP140N8F7 electrical charact eristics docid026822 rev 2 5 / 13 table 7: source drain diode symbol parameter test conditions min. typ. max. unit i sd source - drain current - 90 a i sdm (1) source - drain current (pulsed) - 360 a v sd (2) forward on voltage v gs = 0, i sd = 90 a - 1.2 v t rr reverse recovery time i sd = 64 a, di/dt = 100 a/s, v dd = 60 v t j = 150 c - 58 ns q rr reverse recovery charge - 92 nc i rrm reverse recovery current - 3.2 a notes: (1) pulse width is limited by safe operating area (2) pulse test: pulse duration = 300 s, duty cycle 1.5%
electrical characteristics STP140N8F7 6 / 13 docid026822 rev 2 2.1 electrical characteristics (curves) figure 2 : safe operating area figure 3 : thermal impedance figure 4 : output characteristics figure 5 : transfer characteristics figure 6 : normalized v (br)dss vs. temperature figure 7 : static drain - source on resistance i d 100 10 1 0.1 0.1 1 v ds (v) 10 (a) operation in this area is limited by max rds(on) 100s 1ms 10ms tj=175c t c=25c sinlge pulse gipd130920130848m t i d 50 0 0 2 v ds (v) 4 (a) 6 8 100 150 200 4v 6v 7v v gs = 10v 5v 250 300 gipd130920130919m t v (br)dss 0.98 0.96 0.94 -75 t j (c) 25 0 75 125 -25 175 i d = 250a 1 1.02 1.04 k t p (s) single pulse 10 -1 = 0.5 0.2 0.1 0.05 0.02 0.01 10 -2 10 -2 10 -3 10 -4 10 -5 10 -6 10 -7 10 -1 r ds(on) 3.51 3.50 3.49 3.48 20 i d (a) v gs = 10v 3.52 30 40 50 60 70 80 90 i d 50 0 0 2 v gs (v) 4 (a) v ds = 2v 6 8 100 150 200 1 3 5 7 300 9 250
STP140N8F7 electrical characteristics docid026822 rev 2 7 / 13 figure 8 : gate charge vs. gate - source voltage figure 9 : capacitance variations figure 10 : normalized gate threshold voltage vs. temperatur e figure 11 : normalized on resistance vs. temperature figure 12 : source - drain diode forward characteristics v gs(th) 1 0.8 0.6 0.4 -75 t j (c) 25 1.2 0 75 125 -25 175 i d = 250a v gs 6 4 2 0 0 40 q g (nc) 80 (v) 8 10 12 20 60 100 v sd 0.6 20 i d (a) 50 40 60 t j = -55c 30 70 80 90 0.7 0.8 0.9 1 1.1 t j = 25c t j = 175c r ds(on) 0.8 0.6 0.4 -75 t j (c) 25 1.8 0 75 125 -25 175 v gs = 10v 1 1.2 1.4 1.6 c 3000 2000 1000 0 0 20 v ds (v) 40 (pf) c iss 4000 10 30 50 c oss c rss 60 70 5000 6000 7000 8000
test circuits STP140N8F7 8 / 13 docid026822 rev 2 3 test circuits figure 13 : switching times test circuit for resistive load figure 14 : gate charge test circuit figure 15 : test circuit for inductive load switching and diode recovery times figure 16 : unclamped inductive load test circuit figure 17 : unclamped inductive waveform figure 18 : switching time waveform
STP140N8F7 package mechanical data docid026822 rev 2 9 / 13 4 package mechanical data in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packa ges, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark.
package mechanical data STP140N8F7 10 / 13 docid026822 rev 2 4.1 to - 220 type a package information figure 19 : to - 220 type a package outline
STP140N8F7 package mechanical data docid026822 rev 2 11 / 13 table 8: to - 220 type a mechanical data dim. mm min. typ. max. a 4.40 4.60 b 0.61 0.88 b1 1.14 1.70 c 0.48 0.70 d 15.25 15.75 d1 1.27 e 10 10.40 e 2.40 2.70 e1 4.95 5.15 f 1.23 1.32 h1 6.20 6.60 j1 2.40 2.72 l 13 14 l1 3.50 3.93 l20 16.40 l30 28.90 ?p 3.75 3.85 q 2.65 2.95
revision history STP140N8F7 12 / 13 docid026822 rev 2 5 revision history table 9: document revision history date revision changes 25 - aug - 2014 1 first release. 09 - oct - 2014 2 updated figure 3: "thermal impedance"
STP140N8F7 docid026822 rev 2 13 / 13 important notice C please read carefully stmicroelectronics nv and its subsidiaries (st) reserve the right to make changes, corrections, enhancements, modifications , and improvements to st products and/or to this document at any time without notice. purchasers s hould obtain the latest relevant information on st products before placing orders. st products are sold pursuant to sts terms and conditions of sale in place at the time of or der acknowledgement. purchasers are solely responsible for the choice, select ion, and use of st products and st assumes no liability for application assistance or the design of purchasers products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information set forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2014 stmicroelectronics C all rights reserved

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