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IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 1/ 80 features differential pga inputs for sine, cosine, and index input frequency of up to 700 khz ab output frequency of up to 12.5 mhz automatic compensation of amplitude, offset, and phase errors low latency (typ. 1.5 s) differential rs422 line driver outputs for abz or uvw simultaneous single-ended outputs for abz and uvw digital fltering for ultra-low output jitter complete status and fault monitoring capabilities confgured by pins or spi in-feld re-confguration via encoder link interface easy to use with built-in line driver, eeprom, and oscillator push-button automatic calibration for fast commissioning led intensity control by pwm output 10-bit angle data and 14-bit multi-cycle counter available to spi capture register for coded reference marks and touch-probe applications space-saving 5 x 5 mm qfn package single 3.3 v supply applications rotary and linear encoders magnetic or optical sin/cos sensor interface brushless motor commutation (2...64 poles) imbedded motion control packages 32-pin qfn 5 mm x 5 mm x 0.9 mm rohs compliant block diagram copyright ? 2015, 2017 ic-haus http://www.ichaus.com p r e l i m i n a r y p r e l i m i n a r y adc atan a eeprom sin cos adc xss/c0 sclk/c1 si/c2 so/c3 50 mhz oscillator references vc vref power-on reset xrst zero adc abz and uvw generator led intensity control led xirq xcalib pincfg z b rs422 IC-TW28 sin/cos error correction sin/cos adaption zero adaption signal quality monitor position capture multycycle counter fault handling irq generation filter adaption comparator control amplifier offset filter encoder link interface spi pin configuration zero error correction push-button auto-calibration
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 2/ 80 description the IC-TW28 is a general purpose 10-bit applica- tion-specifc interpolator for sine/cosine signals with automatic calibration and adaption of signal path pa- rameters during operation to maintain minimum an- gular error and jitter. angular position is calculated at a programmable resolution of up to 1024 increments per input cycle. automatic calibration and adaption (correction during operation) of sensor offset, sin/cos amplitude match, and phase quadrature is provided. additionally, automatic calibration of gain, offset and phase of the zero inputs allows for rapid commission- ing. the IC-TW28 accepts 20 mv to 2 v differential sin/- cos input signals directly from magnetic or optical sensors C no external signal conditioning is required in most applications. the differential zero input ac- cepts a wide range of digital and analog index gating sources such as hall or mr sensor bridges. the z output width, position relative to the sin/cos inputs, and synchronization to the ab quadrature outputs is fully programmable. in addition to industry-standard incremental abz quadrature output, the IC-TW28 provides optional uvw commutation output modes for 1 to 32 pole- pair motors and spi angle and multi-cycle readout for embedded applications. the incremental abz quadra- ture output can be generated at a frequency of up to 12 mhz (20 ns edge spacing); the maximum output frequency can also be limited so as not to overwhelm connected counters or controllers. in spi mode, the IC-TW28 provides multi-cycle syn- chronization and reference mark capture functions to support absolute position systems. higher input signal frequencies are allowed in spi mode since the abz output frequency limitation is not applicable. the IC-TW28 offers two confguration modes. pin con- fguration mode provides simple, static confguration that does not require any programming or complicated calibration. pin confguration mode uses a subset of the IC-TW28s complete capabilities including abz quadrature output, a limited choice of the most com- monly used interpolation (resolution) and hysteresis values, and one-button calibration. eight resistors set voltage levels at four confguration input pins to select all operating parameters, simplifying product assembly. one-button auto calibration sets input gain and compensates sensor offset and sin/cos channel gain match and phase with just a few input cycles and then stores the compensation values to the internal eeprom. in more sophisticated applications, serial confgura- tion mode allows access to all IC-TW28 features. complete device confguration using the bi-directional spi or encoder link ports provides access to all res- olutions (including fractional interpolation), fully pro- grammable hysteresis, and advanced noise/jitter flter- ing, quality monitoring, and fault detection capabilities. the IC-TW28 requires no external components for op- eration. an eeprom for storage of confguration and calibration data, and rs422 line drivers are already integrated on-chip. an integrated power-on reset cir- cuit can be overridden by an external hardware reset signal if necessary. p r e l i m i n a r y p r e l i m i n a r y
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 3/ 80 contents packaging information 5 pin configuration qfn32-5x5 (top view) . . . . . . . . . . . . . . . . . . . 5 package dimensions . . . . . . . . . . . 6 pin functions . . . . . . . . . . . . . . . 7 absolute maximum ratings 8 thermal data 8 electrical characteristics 9 operating requirements 12 spi interface . . . . . . . . . . . . . . . . . . 12 encoder link interface . . . . . . . . . . . . . 13 functional overview 14 functional block diagram 15 reference . . . . . . . . . . . . . . . . . . . . 15 oscillator . . . . . . . . . . . . . . . . . . . . 15 power-on reset . . . . . . . . . . . . . . . . 15 spi port/confguration pins . . . . . . . . . . 15 encoder link interface . . . . . . . . . . . . . 15 input stage . . . . . . . . . . . . . . . . . . . 15 analog error correction . . . . . . . . . . . . 15 analog-to-digital converters (adcs) . . . . . 15 digital error correction . . . . . . . . . . . . 15 angle calculation (arctan) . . . . . . . . . . . 16 filter . . . . . . . . . . . . . . . . . . . . . . . 16 hysteresis . . . . . . . . . . . . . . . . . . . . 16 interpolation factor . . . . . . . . . . . . . . 16 z signal path . . . . . . . . . . . . . . . . . . 16 abz generator . . . . . . . . . . . . . . . . . 16 post-ab divider . . . . . . . . . . . . . . . . 16 uvw signal path . . . . . . . . . . . . . . . . 16 abz/uvw outputs . . . . . . . . . . . . . . . 16 auto calibration . . . . . . . . . . . . . . . . 16 auto adaption . . . . . . . . . . . . . . . . . 16 fault handling . . . . . . . . . . . . . . . . . 16 ab output frequency limiter . . . . . . . . . 17 amplitude monitor . . . . . . . . . . . . . . . 17 led intensity control (serial only) . . . . . . 17 multi-cycle counter (serial only) . . . . . . . 17 position capture (serial only) . . . . . . . . . 17 filter adaption (serial only) . . . . . . . . . . 17 residual error calculation (serial only) . . . 17 eeprom . . . . . . . . . . . . . . . . . . . . 17 electrical connections 18 power and ground . . . . . . . . . . . . . . . 20 reference outputs . . . . . . . . . . . . . . . 20 xcalib input . . . . . . . . . . . . . . . . . . 20 sin and cos inputs . . . . . . . . . . . . . . 21 zero inputs . . . . . . . . . . . . . . . . . . 21 abz outputs . . . . . . . . . . . . . . . . . . 21 uvw outputs . . . . . . . . . . . . . . . . . . 22 xrst input . . . . . . . . . . . . . . . . . . . 22 xirq output . . . . . . . . . . . . . . . . . . 22 led output . . . . . . . . . . . . . . . . . . . 22 pincfg input . . . . . . . . . . . . . . . . . 22 confguration resistors . . . . . . . . . . . . 23 spi port . . . . . . . . . . . . . . . . . . . . . 23 reserved pins . . . . . . . . . . . . . . . . . 23 configuration overview 24 pin confguration mode . . . . . . . . . . . . 24 interpolation factor . . . . . . . . . . . . . . 24 hysteresis and filtering . . . . . . . . . . . . 24 ab frequency limit and auto adaption . . . 25 input range, interpolation group, and z calibration . . . . . . . . . . . . . . . . 25 serial confguration mode . . . . . . . . . . . 26 calibration overview 27 hardware auto calibration (xcalib) . . . . . 27 software auto calibration . . . . . . . . . . . 28 startup 28 spi communication 29 command packet format . . . . . . . . . . . 30 null write (read only) . . . . . . . . . . . . . 31 multi-cycle counter write . . . . . . . . . . . 31 multi-cycle counter atomic read/write . . . 31 register write . . . . . . . . . . . . . . . . . 32 register data and position read . . . . . . . 32 response packet formats . . . . . . . . . . 32 position and status read . . . . . . . . . . . 32 captured position and status read . . . . . 33 sin, cos, and zero adc read . . . . . . . . 33 register data and position read . . . . . . . 33 p r e l i m i n a r y p r e l i m i n a r y
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 4/ 80 encoder link communication 34 encoder link write . . . . . . . . . . . . . . . 35 encoder link read . . . . . . . . . . . . . . . 35 configuration parameters 36 register map . . . . . . . . . . . . . . . . . . 36 main_cfg . . . . . . . . . . . . . . . . . . . 38 led_cfg . . . . . . . . . . . . . . . . . . . . 39 led_start . . . . . . . . . . . . . . . . . . 40 led_pwm . . . . . . . . . . . . . . . . . . . 40 test . . . . . . . . . . . . . . . . . . . . . . 40 uvw_cfg . . . . . . . . . . . . . . . . . . . 41 inter0 . . . . . . . . . . . . . . . . . . . . . 41 inter1 . . . . . . . . . . . . . . . . . . . . . 41 ab . . . . . . . . . . . . . . . . . . . . . . . . 41 uvw . . . . . . . . . . . . . . . . . . . . . . . 41 falarm . . . . . . . . . . . . . . . . . . . . 41 ablimit . . . . . . . . . . . . . . . . . . . . . 42 zero0 . . . . . . . . . . . . . . . . . . . . . 42 zero1 . . . . . . . . . . . . . . . . . . . . . 42 output . . . . . . . . . . . . . . . . . . . . 42 zphase . . . . . . . . . . . . . . . . . . . . 44 uvwph . . . . . . . . . . . . . . . . . . . . . 44 phase_lsb . . . . . . . . . . . . . . . . . . 44 s_adc . . . . . . . . . . . . . . . . . . . . . 44 c_adc . . . . . . . . . . . . . . . . . . . . . 44 filt_cfg . . . . . . . . . . . . . . . . . . . . 45 filt_lag . . . . . . . . . . . . . . . . . . . . 45 filt_k . . . . . . . . . . . . . . . . . . . . . 45 stat_cfg . . . . . . . . . . . . . . . . . . . 46 stat_val . . . . . . . . . . . . . . . . . . . 46 stat_latch . . . . . . . . . . . . . . . . . . 47 stat_sel . . . . . . . . . . . . . . . . . . . 47 stat_ie . . . . . . . . . . . . . . . . . . . . . 48 stat_hiz . . . . . . . . . . . . . . . . . . . . 48 stat_fatal . . . . . . . . . . . . . . . . . . 48 ee_addr . . . . . . . . . . . . . . . . . . . 49 ee_data . . . . . . . . . . . . . . . . . . . . 49 ee_stat . . . . . . . . . . . . . . . . . . . . 49 command . . . . . . . . . . . . . . . . . . . 50 start . . . . . . . . . . . . . . . . . . . . . 51 adapt_cfg0 . . . . . . . . . . . . . . . . . 51 adapt_cfg1 . . . . . . . . . . . . . . . . . 52 sc_amp_targ . . . . . . . . . . . . . . . . 52 sc_amp_low . . . . . . . . . . . . . . . . . 52 sc_amp_high . . . . . . . . . . . . . . . . 52 cor registers . . . . . . . . . . . . . . . . . 53 base registers . . . . . . . . . . . . . . . . 53 lim registers . . . . . . . . . . . . . . . . . . 53 res registers . . . . . . . . . . . . . . . . . 53 th registers . . . . . . . . . . . . . . . . . . 54 watchdog . . . . . . . . . . . . . . . . . . 54 sc_amp . . . . . . . . . . . . . . . . . . . . 54 s_amp . . . . . . . . . . . . . . . . . . . . . 54 c_amp . . . . . . . . . . . . . . . . . . . . . 54 device_id . . . . . . . . . . . . . . . . . . . 54 rev0 and rev1 . . . . . . . . . . . . . . . . 54 input configuration and signal levels 55 output modes, directions, and polarities 56 spi only . . . . . . . . . . . . . . . . . . . . 56 abz and abzld . . . . . . . . . . . . . . . . 56 uvw and uvwld . . . . . . . . . . . . . . . 56 abzuvw . . . . . . . . . . . . . . . . . . . . 57 startup modes 58 status and fault logic 59 sin/cos amplitude monitor 62 excessive error detection 62 excessive adaption detection 63 device serial number and user data 64 z test mode and calibration 65 multi-cycle counter 67 position capture 69 filter configuration 70 spi only output mode 71 led intensity control 72 post-ab divider 74 bussing multiple IC-TW28s 75 chaining multiple IC-TW28s 76 design review: function notes 77 revision history 78 p r e l i m i n a r y p r e l i m i n a r y
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 5/ 80 packaging information pin configuration qfn32-5x5 (top view) pin functions no. name function 1 sin+ 3 + differential sine input 2 sinC 3 C differential sine input 3 avdd +3.3 v analog power supply input 4 cos+ 3 + differential cosine input 5 cosC 3 C differential cosine input 6 avss analog ground 7 zero+ 4 + differential zero (index) input 8 zeroC 3 C differential zero (index) input 9 vref adc reference voltage output 10 vc bias output (vdd/2) 11 reserved 1 12 reserved 1 13 reserved 1 14 xrst 4 reset input (active low) 15 xcalib 4 auto-calibration input (active low) 16 xirq 4 interrupt request (active low) or fault output 17 zC C differential rs422 z or w output 18 z+ + differential rs422 z or w output 19 iovss i/o ground 20 bC C differential rs422 b or v output 21 b+ + differential rs422 b or v output 22 iovdd +3.3 v i/o power supply input 23 aC C differential rs422 a or u output 24 a+ + differential rs422 a or u output 25 dvdd +3.3 v digital power supply input 26 led 4 led intensity control output 27 dvss digital ground 28 so/c3 spi slave output or confguration input 3 29 si/c2 3 spi slave input or confguration input 2 30 sclk/c1 3 spi clock input or confguration input 1 31 xss/c0 4 spi slave select input or confguration input 0 32 pincfg 5 pin confguration select input tp 2 backside paddle ic top marking: = product code, = assembly code (subject to changes), = date code (subject to changes); 1 must be connected to ground. 2 must be connected to a ground plane at avss potential. can also be used to connect dvss. 3 connect to ground via 10 k ? resistor if not used. do not allow to foat. 4 connect to 3.3 v via 10 k ? resistor if not used. do not allow to foat. 5 connect to 3.3 v (to dvdd for pin confguration) or ground (to dvss for serial confguration). do not allow to foat. p r e l i m i n a r y p r e l i m i n a r y 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 6/ 80 package dimensions p r e l i m i n a r y p r e l i m i n a r y 5 5 top 0.40 3.65 3.65 0.22 0.50 bottom 0.90 0.10 side r 0.15 3.60 4.90 3.60 4.90 0.30 0.50 0.70 recommended pcb-footprint drb_qfn32-5x5-6_pack_1, 10:1 all dimensions given in mm. tolerances of form and position according to jedec mo-220.
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 7/ 80 pin functions no. name i/o function description 1 sin+ analog in sine input + differential sine signal input. for single ended sensors, sinC must be biased to an appropriate dc level. do not allow to foat. 2 sinC analog in sine input C 3 avdd supply analog power supply +3.1 v to +3.6 v supply input for analog circuitry. avdd should be tied together with dvdd and iovdd and supplied from a clean source. 4 cos+ analog in cosine input + differential cosine signal input. for single ended sensors, cosC must be biased to an appropriate dc level. do not allow to foat. 5 cosC analog in cosine input C 6 avss ground analog ground avss must be tied to high quality ground, usually a solid pcb plane. 7 zero+ analog in zero input + differential zero gating input. for single ended sensors, the unused input (either zero+ or zeroC) must be biased to an appropriate dc level. do not allow to foat. 8 zeroC analog in zero input C 9 vref analog out bias output decouple with 100 nf capacitor to avss. do not inject noise into this pin as it directly impacts adc conversion quality. 10 vc analog out bias output decouple with 100 nf capacitor to avss. do not inject noise into this pin as it directly impacts adc conversion quality. 11C reserved digital inputs test inputs reserved pins; must be connected to ground for normal operation. 13 14 xrst digital in, active low reset input the device is reset as long as xrst is low. an external rc network with at least r populated is recommended. do not allow to foat. 15 xcalib digital in, active low calibration control device enters calibration mode on falling edge of calib. this pin must be tied high if not used. do not allow to foat. 16 xirq digital out, active low irq or fault output interrupt request output to external micro controller. output can also be used to directly drive a fault led in stand-alone applications. can be confgured as push-pull or open-drain. do not allow to foat. 17 zC digital/rs422 out zC or wC output in abz output mode these are the differential z outputs. in uvw output mode these are the w outputs. 18 z+ digital/rs422 out z+ or w+ output 19 iovss ground i/o ground all ground pins must be connected to a high quality ground, usually a solid pcb plane. 20 bC digital/rs422 out bC or vC output in abz output mode these are the differential b outputs. in uvw output mode these are the v outputs. in z calibration mode these show the z window used to gate the z output. 21 b+ digital/rs422 out b+ or v+ output 22 iovdd supply output drivers power supply +3.1 v to +3.6 v voltage terminal supplying all pin output drivers includ- ing the rs422 drivers and led current. iovdd and dvdd must be the same voltage level. iovdd can require up to 100ma depending on loads. it is usually suffcient to tie iovdd to the same supply as avdd and dvdd. 23 aC digital/rs422 out aC or uC output in abz output mode these are the differential a outputs. in uvw output mode this these are the u outputs. in z calibration mode these show the un-gated z signal once per input period. with encoder link active, a+ is elclk input and aC is elin input or elout output. 24 a+ digital/rs422 out a+or u+ output 25 dvdd supply digital power supply +3.1 v to +3.6 v supply voltage terminal for digital circuits. dvdd should be tied together with avdd and iovdd to a high quality supply. 26 led digital output led pwm output used to supply the illumination led of optical sensors to maintain constant intensity and constant sin/cos sensor amplitude. can be confgured as push-pull or open-drain. do not allow to foat. 27 dvss ground digital ground pin must tied to high quality ground, usually a solid pcb plane. 28 so/c3 digital out, analog in spi slave output, pin confguration input 3 in serial confguration mode, this is the slave output and connects to an spi master mi pin. in pin confguration mode, this is input c3. do not allow to foat. 29 si/c2 digital in, analog in spi slave input, pin confguration input 2 in serial confguration mode, this is the slave input and connects to an spi master mo pin. in pin confguration mode, this is input c2. do not allow to foat. 30 sclk/c1 digital in, analog in spi slave clock input, pin confguration input 1 in serial confguration mode, this is the slave clock input and connects to an spi master clock output pin. in pin confguration mode, this is input c1. do not allow to foat. 31 xss/c0 digital in, analog in spi slave select input, pin confguration input 0 in serial confguration mode, this is the slave select input and connects to an spi master slave select output pin. in pin confguration mode, this is input c0. do not allow to foat. 32 pincfg digital in confguration mode selection for serial confguration mode, connect pincfg to dvss. for pin confguration mode, connect pincfg to dvdd. p r e l i m i n a r y p r e l i m i n a r y
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 8/ 80 absolute maximum ratings these ratings do not imply operating conditions; functional operation is not guaranteed. beyond these values damage may occur. item symbol parameter conditions unit no. min. max. g001 vdd voltage at dvdd, avdd, and iovdd referenced to dvss, avss, and iovss respectively C0.3 4.1 v g002 vpin pin voltage at any pin referenced to dvss, avss, and iovss C0.3 avdd + 0.3 v g003 ipin input current into any pin C2 2 ma g004 vesd1 esd susceptibility hbm, 100 pf discharged through 1.5 k ? 4 kv g005 tj junction temperature C40 150 c g006 ts storage temperature C40 150 c thermal data item symbol parameter conditions unit no. min. typ. max. t01 ta operating ambient temperature range C40 125 c t02 rthja thermal resistance chip to ambient qfn32 surface mounted to pcb according to jedec 51 40 k/w all voltages are referenced to pin avss unless otherwise stated. all currents fowing into the device pins are positive; all currents fowing out of the device pins are negative. p r e l i m i n a r y p r e l i m i n a r y
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 9/ 80 electrical characteristics operating conditions: avdd = dvdd = iovdd = 3.1...3.6 v, tj = C40...+125 c, reference point avss unless otherwise stated item symbol parameter conditions unit no. min. typ. max. total device 001 vdd permissible supply voltage avdd, dvdd, iovdd 3.1 3.6 v 002 i avdd supply current into avdd avdd, dvdd, iovdd = 3.3 v, f in = 1 khz, inter = x256, abz and uvw outputs active 15 ma 003 i dvdd supply current into dvdd avdd, dvdd, iovdd = 3.3 v, f in = 1 khz, inter = x256, abz and uvw outputs active 22 ma 004 i iovdd supply current into iovdd rs422 drivers enabled (main_cfg.rs422 = 1); quadrature outputs terminated with 120 ? 85 ma quadrature outputs open 2.5 ma signal inputs and amplifers: sin+, sinC, cos+, cosC 101 vin() permissible input voltage refer to figure 1 low input range (main_cfg.input = 0 or 1) 0.35 avdd - 1.1 v high input range (main_cfg.input = 2) 0 avdd v 102 ain()diff permissible differential input amplitude, max(sin+ C sinC) or max(cos+ C cosC) refer to figure 1 low input range (main_cfg.input = 0 or 1) 20 700 mv high input range (main_cfg.input = 2) 65 2000 mv 103 vcm() permissible input common mode range, (sin+ + sinC)/2 or (cos+ + cosC)/2 refer to figures 1 and 2 minimum gain 0.7 avdd - 1.45 v maximum gain 0.35 avdd - 1.1 v 104 fn() permissible input frequency 700 khz 105 vos() amplifer input offset voltage 20 mv 106 ilk() input leakage current 50 na 108 offcorr correctable input offset voltage as percentage of input signal amplitude; input offset voltage is the sum of sensor offset plus amplifer offset (item 105); 100 % (step size: 3.9 mv / gain) 109 acorr correctable balance (amplitude) mismatch max(asin, acos) / min(asin, acos), where asin and acos are the sin/cos input amplitudes respectively. (step size 0.2 %) 25 % 110 phicorr correctable phase error (step size 0.22 ) 26 111 rin()diff differential input resistance low input range (main_cfg.input = 0) 10 1000 m ? low with loss detect. (main_cfg.input = 1) 0.240 m ? high input range (main_cfg.input = 2) 0.670 m ? zero signal inputs and amplifer: zero+, zero- 201 vin() permissible input voltage 0 avdd v 202 vcm() permissible input common mode voltage refer to figures 1 and 2 minimum gain 0.7 avdd - 1.45 v maximum gain 0.35 avdd - 1.1 v 203 vos() input referenced offset voltage 20 mv 204 ilk() input leakage current 50 na 205 offcorr correctable input offset voltage as percentage of input signal amplitude; input offset voltage is the sum of sensor offset plus amplifer offset (item 105) 100 % 206 rin()diff differential input resistance 10 1000 m ? converter performance 303 inl integral nonlinearity refer to figure 4 , 1 vpp-diff sin/cos input with compensated offset, gain and phase 0.7 304 dnl differential nonlinearity refer to figure 4 , 1 vpp-diff sin/cos input with compensated offset, gain and phase 0.35 p r e l i m i n a r y p r e l i m i n a r y
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 10/ 80 electrical characteristics operating conditions: avdd = dvdd = iovdd = 3.1...3.6 v, tj = C40...+125 c, reference point avss unless otherwise stated item symbol parameter conditions unit no. min. typ. max. internal oscillator 401 fosc oscillator frequency tj = 27 c; avdd, dvdd = 3.1 v 48 51 mhz avdd, dvdd = 3.6 v 49 52 mhz 402 tcf temperature coeffcient 225 ppm/k internal eeprom 501 nwrite permissible number of write cycles tj = C40...+85 c; chip release w, w1 7 50 chip release v1 1000 502 tjw write temperature range -40 85 c 503 tjr read temperature range -40 125 c 504 drtraw raw data retension time 10 years reset and start-up: xrst 601 dvddon dvdd power-on threshold increasing voltage at dvdd; xrst tied to dvdd 2.5 2.7 3.0 v 602 dvddoff dvdd undervoltage reset threshold decreasing voltage at dvdd; xrst tied to dvdd 2.2 2.4 v 603 tstart startup time valid eeprom confguration, start.wait = 0 2 ms start.wait = 3 (factory default) 10 ms digital input pins: xrst, xcalib, a+/C (encoder link active), si, sclk, xss, pincfg 701 vt()hi input logic threshold high dvdd = 3.3 v 1.9 v 702 vt()lo input logic threshold low dvdd = 3.3 v 0.8 v 703 ilk() input leakage current at si, sclk, xss 50 na 704 f(sclk) permissible clock frequency at sclk pincfg connected to dvss 20 mhz digital output pins: xirq, so, a+/aC, b+/bC, z+/zC (cmos drivers enabled: main_cfg.rs422 = 0) 801 i()max permissible output current per pin, indefnite 10 ma 803 vs()hi saturation voltage high vs()hi = iovdd - v(); i() = C4 ma, 0.7 v main_cfg.irqpp = 1 (for xirq push-pull) 804 vs()lo saturation voltage low i() = 4 ma 0.7 v 805 isc()hi short-circuit current high any pin shorted to dvss C30 C16 ma 806 isc()lo short-circuit current low any pin shorted to dvdd 16 30 ma 807 tr() rise time dvdd = 3.3 v, cl = 50 pf, 10% 90% vdd 20 ns 808 tf() fall time dvdd = 3.3 v, cl = 50 pf, 90% 10% vdd 20 ns rs422 drivers: a+/aC, b+/bC, z+/zC (rs422 drivers enabled: main_cfg.rs422 = 1) 901 idrv() nominal rs422 driver current rl() = 120 ? between + and C terminals 20 27 ma 902 isc()hi short-circuit current high 8 + or C pin shorted to iovss C55 ma 903 isc()lo short-circuit current low 8 + or C pin shorted to iovdd 35 ma 904 t ab output phase a vs. b refer to figure 3 25 % 905 t whi duty cycle at output a, b refer to figure 3 50 % 906 aarel relative angle accuracy f in = 1 khz, ideal waveform, filt_k.kp = 6, referenced to output period t (see figure 3 ); inter < x50 5 % inter = x50...x100 10 % inter > x100 15 % 907 t mtd time between ab edges (minimum transition distance) refer to figure 3 ; ablimit = 0x00 1/fosc led output (enabled: led_cfg = 1) a01 i()max permissible output current for continuous operation 15 ma a02 vout()hi output voltage high vdd = 3.3 v, tj = 27 c, i() = C10 ma 2.7 v a03 vs()hi saturation voltage high vs()hi = dvdd C v(led); i() = C10 ma 1 v a04 vs()lo saturation voltage low i() = 10 ma 1 v 7 regarding chip release w1, please refer to the design review on page 77 . 8 regarding chip release w, please refer to the design review on page 77 . p r e l i m i n a r y p r e l i m i n a r y
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 11/ 80 electrical characteristics operating conditions: avdd = dvdd = iovdd = 3.1...3.6 v, tj = C40...+125 c, reference point avss unless otherwise stated item symbol parameter conditions unit no. min. typ. max. a05 isc()hi short-circuit current high short to gnd -40 ma a06 isc()lo short-circuit current low short to vdd 40 ma bias outputs: vc, vref b01 vc bias voltage vc i(vc) = 0 50 %avdd b02 dvref adc reference voltage vref versus vc dvref = v(vref) C v(vc); i(vref) = 0 C1.1 C1 C0.9 v figure 1: differential input amplitude ain()diff: max(sin+ C sinC) or max(cos+ C cosC) figure 2: permissible input common mode vcm: (sin+ + sinC)/2 or (cos+ + cosC)/2 figure 3: description of ab output signals figure 4: defnition of integral and differential nonlinearity p r e l i m i n a r y p r e l i m i n a r y 0 v maximum input voltage minimum input voltage nominal vdd max. input amplitude (700 mv) 0 v nominal vdd and maximum input voltage maximum input amplitude (2 v) sin+% cos+% sinC% cosC% sin+% cos+% sinC% cosC% low input range high input range minimum input voltage 2.2 v 0.35 v 3.3 v 3.3 v 0 v nominal vdd 1.85 v 0.7 v 2.2 v 0.35 v 3.3 v minimum gain maximum gain a b t mt d t w h i t (100 %) aarel t ab abrel 0 360 180 converter error inl: the maximum absolute error . d n l : t h e m a x i m u m s t e p between two consecutive samples. ideal converter actual converter angular position
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 12/ 80 operating requirements: spi interface operating conditions: avdd = dvdd = iovdd = +3.1...+3.6 v, avss = dvss = iovss = 0 v, tj = C40...125 c item symbol parameter conditions unit no. min. max. spi interface timing i001 t c1 permissible clock cycle time see elec. char. no.: 704 50 ns i002 t d1 clock signal lo level duration 15 ns i003 t d2 clock signal hi level duration 15 ns i004 t s1 setup time: xss lo before sclk lo hi 80 ns i005 t h1 hold time: xss lo after sclk hi lo 50 ns i006 t w1 wait time: between xss lo hi and xss hi lo 200 ns with adc read as preceding command 600 ns i007 t s2 setup time: si stable before sclk lo hi 5 ns i008 t h2 hold time: si stable after sclk lo hi 10 ns i009 t p1 propagation delay: so stable after xss hi lo 60 ns i010 t p2 propagation delay: so high impedance after xss lo hi 25 ns i011 t p3 propagation delay: so stable after sclk hi lo 20 ns figure 5: spi timing p r e l i m i n a r y p r e l i m i n a r y xss sclk si so t w1 t d1 t d2 t s1 t h2 t s2 t p3 t h1 t p2 hi-z t p1 t c1
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 13/ 80 operating requirements: encoder link interface operating conditions: avdd = dvdd = iovdd = +3.1...+3.6 v, avss = dvss = iovss = 0 v, tj = C40...125 c item symbol parameter conditions unit no. min. max. encoder link activation sequence timing i101 t1 activation sequence interval 1 a+ > 2.4 v, aC > 2.4 v 0.25 2 ms i102 t2 activation sequence interval 2 a+ < 0.8 v, aC > 2.4 v t1 C 10% t1 + 10% ms i103 t3 activation sequence interval 3 a+ < 0.8 v, aC < 0.8 v t1 C 10% t1 + 10% ms i104 t4 activation sequence interval 4 a+ > 2.4 v, aC < 0.8 v t1 C 10% t1 + 10% ms encoder link interface timing (after activation) i105 fclk(a+) elink clock frequency signal driven into a+ 1.0 mhz i106 t d1 (a+) elink clock signal hi level duration signal driven into a+ 200 ns i107 t d2 (a+) elink clock signal lo level duration signal driven into a+ 200 ns i108 t s (aC) elink input setup time signal driven into aC 200 ns i109 t h (aC) elink input hold time signal driven into aC 200 ns i110 t p (aC) elink output propagation delay signal driven out on aC 200 ns figure 6: encoder link activation sequence figure 7: encoder link read and write timing p r e l i m i n a r y p r e l i m i n a r y a + a C external driver starts to overpower ic - tw 28 by forcing a + and a C high . t 1 0 . 25 C 2 ms t 2 t 1 10 % t 3 t 1 10 % t 4 t 1 10 % ic - tw 28 stops driving a + and a C . encoder link interface is now active . normal operation . ic - tw 28 is driving quadrature signals on a + and a C . el ink clk : a + el ink in : a C el ink out : a C t d 1 t d 2 t h t s t p
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 14/ 80 functional overview the IC-TW28 is a general-purpose 10-bit sine/cosine interpolator with sophisticated automatic calibration functions for the abz and uvw signal paths, and a built-in rs422-compatible line driver. it accepts differ- ential analog sin/cos input signals from magnetic or optical sensors and calculates (interpolates) the angu- lar position with the sin/cos cycle, as shown in figure 8 . typical output is industry-standard incremental ab quadrature at programmable resolution and/or uvw commutation signals. auto calibration means that no complicated signal analysis or calibration procedure is required during product design or production. auto adaption monitors and adapts signal path error correc- tion values during operation to maintain optimal perfor- mance with low error and jitter. an internal eeprom to store confguration and calibration data and an accurate internal oscillator are included. figure 8: IC-TW28 functional overview confguration of the IC-TW28 is via dedicated pins, encoder link (using the a+ and aC pins), or the spi interface. in pin-confguration mode, a limited set of the most common operating conditions can be selected for simple stand-alone applications. with spi or en- coder link (serial) confguration, complete fexibility and access to all IC-TW28 features is available for more sophisticated applications. when paired with a local cpu or microcontroller, the IC-TW28s multi-cycle position data and internal status conditions can be monitored. multiple IC-TW28s can be accessed from a single host cpu or microcontroller for cost-effective synchronized multi-axis applications. a confgurable signal path flter provides dynamic re- sponse characteristics, allowing smooth low-jitter out- put as well as fast response to changing operating conditions. an integrated led intensity control allows maintaining signal amplitudes of optical sensors in the presence of led ageing and temperature effects. p r e l i m i n a r y p r e l i m i n a r y a b z zero cos sin interpolation factor of x 5 shown . z output suppressed since zero input is low . u v w uvw signals for 2 pole motor shown . u v w uvw signals for 2 pole motor shown .
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 15/ 80 functional block diagram a functional block diagram of the IC-TW28 is shown in figure 9 and explained on the following pages. figure 9: functional block diagram reference the reference provides reference voltages for the inter- nal analog circuits. these outputs must be capacitively bypassed for proper operation of the IC-TW28. oscillator the oscillator provides a high-accuracy 50 mhz clock that controls all timing within the IC-TW28. power-on reset the power-on reset (por) circuit provides orderly startup of the IC-TW28 when power is applied. an ex- ternal reset source can also be connected to the por to allow independent control of device startup. spi port/confguration pins when the IC-TW28 is in serial confguration mode, the spi port is available for use by an external host proces- sor or microcontroller for initial calibration or general communication. in pin confguration mode, the spi port is disabled and the spi pins are used to directly confgure the IC-TW28. encoder link interface the encoder link interface provides read/write access to the IC-TW28s internal registers using the a+ and a- outputs. this is useful for feld reconfguration or diag- nostics of products incorporating the IC-TW28. encoder link can only be used for confguration and diagnostics, it cannot be used to read the multi-cycle counter or captured position values. in serial confguration mode, encoder link can be disabled to eliminate tampering with fnished products. input stage three programmable gain amplifers are used to am- plify the sin, cos, and zero inputs. the sin/cos pgas also provide confgurable 9 db attenuation to allow high amplitude (rail-to-rail) sensor inputs to be used (from gmr or tmr sensors, for example). a noise flter fol- lows each pga to reduce high-frequency noise coming from the sin/cos inputs. in serial confguration mode, two different settings are available for the sin/cos noise flters. analog error correction coarse analog offset and gain correction is provided to scale and adjust the sin/cos signals prior to a/d con- version. these correction values are determined using auto calibration during initial system calibration. analog-to-digital converters (adcs) 10-bit adcs convert the conditioned analog sin and cos signals into digital values for further processing. an 8-bit adc is used for the zero signal. the remainder of the signal path is completely digital. p r e l i m i n a r y p r e l i m i n a r y adc atan a eeprom sin cos adc xss/c0 sclk/c1 si/c2 so/c3 50 mhz oscillator references vc vref power-on reset xrst zero adc abz and uvw generator led intensity control led xirq xcalib pincfg z b rs422 IC-TW28 sin/cos error correction sin/cos adaption zero adaption signal quality monitor position capture multycycle counter fault handling irq generation filter adaption comparator control amplifier offset filter encoder link interface spi pin configuration zero error correction push-button auto-calibration
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 16/ 80 digital error correction after digital conversion, the sin/cos signals are pro- cessed to remove any remaining offset, equalize signal amplitude, and ensure exact 90 ? shift. correcting these signal errors increases interpolation accuracy for lowest error and jitter. initial error correction values are deter- mined automatically by auto calibration during initial system calibration. during operation, these correction values are monitored and automatically adjusted (au- to-adaption) to provide high accuracy signals under changing application conditions. angle calculation (arctan) the angle within an input cycle indicated by the con- ditioned digital sin/cos signals is next calculated as arctan(sin/cos) with a resolution of 10 bits using a cordic algorithm. filter a confgurable flter is provided in the signal path to re- duce noise and jitter in the ab and uvw outputs. in pin confguration mode, three flter settings (light, medium, and heavy) are available. in serial confguration mode, additional control over the signal path flters character- istics is available. hysteresis hysteresis is available in the ab and uvw signal paths to reduce output dithering (instability) at standstill at the expense of position error on direction reversal. in pin confguration mode, four hysteresis settings are available; serial confguration mode expands this to 32 settings. interpolation factor the 10-bit sensor input angle value is scaled to the resolution required by the desired interpolation factor. in pin confguration mode, 24 interpolation factors (12 each binary and decimal) are available. in serial confg- uration mode, interpolation factors between 2 and 256 may be selected. z signal path the z signal path is similar to the sin/cos signal path. analog offset and gain correction are provided to condi- tion the zero signal. correction values are determined using auto calibration during initial system calibration. an 8-bit adc and confgurable comparator are used to generate the z gating window. the z gating window al- lows producing one and only one z pulse per revolution in applications where there are multiple input cycles per revolution. abz generator the ab generator synthesizes quadrature ab outputs at the interpolated resolution. the output generator also uses the conditioned z gating window signal from the z signal path to generate a programmable-width z output synchronized with the ab outputs. automatic phase correction to center the z output pulse location within the zero input gating window is pro- vided. this z phase correction value is determined automatically using auto calibration during initial sys- tem calibration. post-ab divider an optional programmable divider after the abz gener- ator is available. this provides fractional or non-integer ab output resolutions and interpolation factors for spe- cial applications. uvw signal path in addition to the abz outputs, the IC-TW28 can gen- erate 3-phase uvw outputs for commutating brush- less motors with up to 64 poles (32 pole pairs). pro- grammable phase correction to properly align the uvw signals with the motor and hysteresis to reduce signal noise (jitter) at standstill are provided. abz/uvw outputs the IC-TW28 contains a built-in rs422 compatible dif- ferential line driver for driving 120 ? terminated cables. in serial confguration mode, the line driver can be by- passed to save power in imbedded or short signal-run applications. differential abz or uvw outputs or si- multaneous single-ended abz and uvw outputs are available. auto calibration auto calibration is used at initial calibration to auto- matically determine initial offset, gain, and phase com- pensation values for the sin, cos, and zero channels. activating the xcalib input (pin 15) or sending a serial command initiates auto calibration; deactivating xcalib or a serial command stores the calibrated values to the internal eeprom. in pin confguration mode, it is possible to eliminate cali- bration entirely by permanently grounding xcalib. this permanently enables auto calibration, and the IC-TW28 will calibrate itself at every startup. in this way, no ini- tial calibration is required, greatly simplifying product manufacturing and deployment. auto adaption auto adaption maintains optimal offset, channel bal- ance, and phase compensation values for the sin and cos channels during operation to ensure maximum in- terpolator accuracy under all operating conditions. in serial confguration mode, auto adaption can be dis- abled. p r e l i m i n a r y p r e l i m i n a r y
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 17/ 80 fault handling the IC-TW28 provides comprehensive fault handling features and a fault output to notify external systems of faults and warnings during operation. the fault output is the active-low interrupt request output (xirq) pin (pin 16). in stand-alone applications, xirq can be used to directly drive a fault led. when the IC-TW28 is used with a host processor or microcontroller, xirq is typi- cally used to interrupt the host when a fault occurs. in serial confguration mode, real-time status and fault information is available over the spi port. in pin confguration mode, xirq is activated if there is an internal fault in the signal path or if the sensor input amplitude becomes less than 60% or more than 120% of its calibrated value. in serial confguration mode, additional status conditions (signal path satu- ration/overfow, excessive input frequency, excessive ab output frequency, excessive adaption, and exces- sive position lag) can be monitored and programmed to activate xirq. ab output frequency limiter the IC-TW28 incorporates a programmable ab output frequency limiter that guarantees a minimum separa- tion time between ab edges. this is useful to avoid counting errors with plcs or counters with input fre- quency limits less than the 12.5 mhz maximum output frequency of the IC-TW28. six output frequency limit choices are available in pin confguration mode; serial confguration mode provides 256 choices. when ab output frequency is being limited, the ab out- puts lag behind the sin/cos inputs. if this condition is temporary or transient, the ab outputs catch up when the limiter is no longer active. if this condition persists, however, a fatal fault is generated and the IC-TW28 stops working. in serial confguration mode, the ab output frequency limiter can be programmed to activate xirq. amplitude monitor the IC-TW28 continuously monitors the amplitude of the sin/cos input signals by calculating the quantity sin 2 + cos 2 . in pin confguration mode, this value is used to activate xirq if the input signal amplitude be- comes less than 60% or more than 120% of its cali- brated value. in serial confguration mode, other ampli- tude limits can be set. led intensity control (serial only) in serial confguration mode, the calculated sin/cos am- plitude value can also be used to drive the led output (pin 26) to control the intensity of an optical sensor led. this maintains the sin/cos signals at their calibrated amplitude in the presence of led ageing and varying application conditions. multi-cycle counter (serial only) a 14-bit multi-cycle counter is available in the IC-TW28 to track up to 16,383 input cycles during operation. in serial confguration mode, the multi-cycle counter can be read and written using commands and can be con- fgured to reset on the rising edge of the z output. the multi-cycle counter value can only be read using the spi port. should input cycle counting beyond the range of the built-in multi-cycle counter be required, the IC-TW28 can be confgured to generate an interrupt (activate xirq) when there is an imminent overfow of the mul- ti-cycle counter. in this way, a host processor or mi- crocontroller can extend the counter to any arbitrary length. position capture (serial only) the full 24-bit position value (10 bits of interpolated angle within an input cycle plus 14 bits of multi-cycle count) of the IC-TW28 can be captured and read out over the spi port. this capture can be confgured to take place on the rising edge of the z output or the zero input gating window and can also be confgured to generate an interrupt. this allows touch-probe or distance-coded index applications to be easily imple- mented using the IC-TW28. filter adaption (serial only) in serial confguration mode, the signal path flter can be confgured to dynamically adjust its bandwidth based on sensor input acceleration. this allows heavy flter- ing to be used to provide a smooth output at constant speed while still maintaining fast response to changes in input conditions. residual error calculation (serial only) the IC-TW28 continuously calculates the residual off- set, balance, and phase error of the corrected sin/cos signals. these residues represent the uncorrected sig- nal error in the sin and cos channels, and are typically zero when auto adaption is used. in applications where auto adaption cannot be used, these residual values allow sensor signal quality to be monitored in a host processor or microcontroller. programmable threshold values allow activating xirq should any of the residual values become excessive. eeprom the IC-TW28 provides an internal eeprom to store confguration and initial calibration data for use at startup. in addition to a standard checksum on the eeprom data, sophisticated data encoding allows de- tecting and correcting single-bit errors and detecting two-bit errors for enhanced application protection. the eeprom is usually locked (write protected), but can be unlocked via serial command. p r e l i m i n a r y p r e l i m i n a r y
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 18/ 80 IC-TW28 identifcation data and serial number are also stored in the eeprom. additionally, four bytes of data are available for user information (product id, serial number, etc.) in the eeprom. electrical connections the basic electrical connections for a typical stand-alone application using the IC-TW28 in pin con- fguration mode are shown in figure 10 . other than the sin/cos sensor, only a few bypass capacitors and other components are required for operation. figure 10: typical electrical connections for stand-alone pin confguration application p r e l i m i n a r y p r e l i m i n a r y vref vc 100 nf 1 f avdd avss 3.3v sin+ sin cos+ cos sensor IC-TW28 xss/c0 sclk/c1 si/c2 so/c3 8 configuration resistors xcalib calibration button pincfg tied high for pin configuration mode 3.3v 100 nf 1 f iovdd 3.3v iovss a+ a b+ b z+ z 1 f dvdd dvss 3.3v pincfg zero+ zero xrst 3.3v xirq fault led differential rs422 abz outputs reserved reserved reserved 120 120 120 3.3v 100 nf 1k
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 19/ 80 the basic electrical connections for a typical stand-alone application using the IC-TW28 in serial confguration mode using the spi port are shown in figure 11 . other than the sin/cos sensor, only a few bypass capacitors and other components are required for operation. figure 11: typical electrical connections for stand-alone spi confguration application p r e l i m i n a r y p r e l i m i n a r y vref vc 100 nf 1 f avdd avss 3.3v sin+ sin cos+ cos sensor IC-TW28 xss/c0 sclk/c1 si/c2 so/c3 spi configuration port xcalib calibration button pincfg tied low for spi configuration mode 100 nf 1 f iovdd 3.3v iovss a+ a b+ b z+ z 1 f dvdd dvss 3.3v pincfg zero+ zero 3.3v xirq fault led differential rs422 abz outputs reserved reserved reserved 120 120 120 xss sclk mosi miso 3.3v xrst 3.3v 100 nf 1k
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 20/ 80 the basic electrical connections for a hosted applica- tion using a single IC-TW28 are shown in figure 12 . multiple IC-TW28s can also be bussed or chained to- gether using the same spi port on the host processor or microcontroller. see bussing multiple IC-TW28s on page 75 and chaining multiple IC-TW28s on page 76 for more information. figure 12: typical electrical connections for hosted application power and ground the IC-TW28 requires a high quality ground and clean 3.3 v power supplies. there are three sepa- rate power/ground pin pairs, one each for the analog (avdd/avss), digital (dvdd/dvss), and i/o (iovd- d/iovss) circuitry. in most cases, it is suffcient to connect all three power pins to the same low-impedance power source, prefer- ably an on-board voltage regulator. likewise, the three ground pins can usually be connected to the same solid ground plane on the pc board. if necessary, separate voltage regulators can be used to power each section to provide enhanced noise immunity. in all cases, each power pin should have a dedicated 1 f decoupling capacitor placed as close to the IC-TW28 as possible. reference outputs the reference outputs vref and vc must each be decoupled to ground with separate 100 nf capacitors placed as close to the IC-TW28 as possible. vc should not be used to bias external circuitry or the sin/cos inputs with single-ended sensors. xcalib input the active-low xcalib input is used to activate the au- to-calibration feature of the IC-TW28. a push-button and pull-up resistor can be connected to this input as shown for easy manual calibration. xcalib can also be controlled by a host processor or microcontroller output, if desired. in pin confguration mode, xcalib can be permanently tied to ground to eliminate calibration entirely if de- sired. this permanently enables auto-calibration, and the IC-TW28 will calibrate itself automatically at every start-up. if push-button calibration is not required, xcalib should be connected to 3.3 v to avoid spurious calibration. p r e l i m i n a r y p r e l i m i n a r y differential rs422 abz outputs 120 120 120 vref vc 100 nf 1 f avdd avss 3.3v sin+ sin cos+ cos sensor IC-TW28 xss/c0 sclk/c1 si/c2 so/c3 xcalib pincfg tied low for spi configuration mode 100 nf 1 f iovdd 3.3v iovss a+ a b+ b z+ z 1 f dvdd dvss 3.3v pincfg zero+ zero xrst xirq reserved reserved reserved host p outx irqx xcs sclk mo mi 3.3v
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 21/ 80 sin and cos inputs the IC-TW28 connects directly to magnetic (such as ic-sm2l or ic-sm5l) and optical (such as ic-lshb or ic-pt...h series) sensors providing differential sin/cos outputs, as shown in figure 13 and figure 14 . figure 13: magnetic sensor connection figure 14: optical sensor connection nominal differential signal amplitudes between 20 mv and 2.0 v in two ranges can be accommodated. see input confguration and signal levels on page 55 for more information. single-ended sensors can be connected to the sin+ and cos+ inputs. in this case, the sinC and cosC inputs should be connected to a resistive voltage di- vider to bias them to the zero level of the sensor output (typically half the sensor supply). do not allow any of the sin or cos inputs to foat. zero inputs the IC-TW28 can interface to a wide range of differen- tial or single-ended index or zero sensors to provide a z output which is synchronized with the ab outputs. optical sensors usually provide differential zero or in- dex signals along with the sin/cos signals. in magnetic systems, a separate zero sensor is usually required. digital zero sensors (hall, mr, and others) typically pro- vide a single-ended active-low signal via an open-drain output that pulls low in the presence of a magnetic feld. connect active-low (open drain) digital index sensors to the IC-TW28 zeroC input and connect the zero+ input to vc as shown in figure 15 . figure 15: digital index sensor connection for active-high (open source) digital index sensors, re- verse the zero+ and zeroC connections. analog-output zero sensors, such as mr bridges, can also be used with the IC-TW28 as shown in figure 16 . figure 16: analog index sensor connection to produce a z output once every input cycle, connect zero+ to 3.3 v and zeroC to ground. this is use- ful in on-axis applications where one input revolution produces only one input cycle. if no z output from the IC-TW28 is required, connect zero+ to ground and zeroC to 3.3 v. do not allow the zero+ or zeroC inputs to foat. p r e l i m i n a r y p r e l i m i n a r y vref vc 1 uf 1 uf sensor bridge 0 sensor bridge 1 1 uf avdd avss vdd _ zac 1 uf dvdd dvss vdd _ zac sin + sin - cos + cos - 10 uf vdd _ zac vdd _ main outa outb outz regulator line driver mr sensor ic - tw 28 avdd sin + sin C cos + cos C ic - tw 28 avdd psin nsin pcos ncos ic - smxl sensor sin + sin C cos + cos C ic - tw 28 5 v psin nsin pcos ncos ic - pd sensor zero + z zero C nz sin+ sin cos+ cos IC-TW28 5v pa na pb nb ic-pt? sensor zero+ pz zero nz ic - tw 28 gating window pin outa pin outb pin outz t setup t hold mr sensor pin zero +/ - device internal index window . this signal can be observed on pin outa by setting rb _ test 1 . z _ test to 1 . input z threshold main _ z . ofs [ 4 : 0 ] index position and index width . main _ zpos [ 15 : 0 ] and ab _ zwidth [ 7 : 0 ] zero + zero - dvdd ic - tw 28 digital hall active low mr index sensor zero + zero - avdd main _ z . ofs is set to avoid triggering on side lobes while still maintain a wide enough window . zero + zero - dvdd ic - tw 28 digital hall active low vc + C 100 nf ic - tw 28 gating window pin outa pin outb pin outz t setup t hold mr sensor pin zero +/ - device internal index window . this signal can be observed on pin outa by setting rb _ test 1 . z _ test to 1 . input z threshold main _ z . ofs [ 4 : 0 ] index position and index width . main _ zpos [ 15 : 0 ] and ab _ zwidth [ 7 : 0 ] zero + zero - dvdd ic - tw 28 digital hall active low mr index sensor zero + zero - avdd main _ z . ofs is set to avoid triggering on side lobes while still maintain a wide enough window . zero + zero - dvdd ic - tw 28 digital hall active low vc + C 100 nf
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 22/ 80 abz outputs the IC-TW28 provides differential abz outputs capable of driving 20 ma into a terminated rs422 line. the a+, aC, b+, bC, z+, and zC outputs can be directly connected to the rs422 line as shown in figure 17 . figure 17: abz output connection the three signal pairs should be terminated with a 120 ? resistor at the far (receiving) end of the cable as shown. in serial confguration mode, the rs422-compatible line driver can be disabled to save power for local or short- -run applications. in this case, termination resistors should not be used. uvw outputs in serial confguration mode, the IC-TW28 can be con- fgured to provide differential uvw outputs or simultane- ous single-ended abz and uvw outputs. see output modes, directions, and polarities on page 56 for more information. xrst input the IC-TW28 contains a built-in power-on-reset (por) circuit that controls the safe start-up of the device. in most applications, no external components are required and xrst can be connected directly to 3.3 v. alternatively, an rc network with recommended values of 1 k ? and 100 nf can be connected to the active-low xrst input as shown in figure 18 . this provides a 100 s delay and guarantees proper start-up under all conditions. larger resistances can be used to provide proportionally longer delays. figure 18: xrst connection in stand-alone applications, it is recommended to al- ways provide for an rc network on the pc board and only populate the capacitor if required. without the ca- pacitor, the resistor provides the necessary pull-up. in applications using a host processor or microcontroller, the xrst input is best controlled by the host. xirq output in stand-alone applications, xirq functions as an ac- tive-low fault output. it can be used to directly drive an led with an appropriate current-limiting resistor for fault indication. in hosted applications, xirq is connected to an interrupt request input on the host processor or microcontroller. in this way, when a warning or fault occurs, the host pro- cessor can query the IC-TW28 to determine what action to take. the xirq output can also be confgured as an open-drain output allowing a wired-or connection of multiple IC-TW28s to a single interrupt request input on the host processor. see chaining multiple IC-TW28s on page 76 for more information. if the xirq output is not used, confgure it for push-pull operation so that it does not foat. led output in serial confguration mode, the IC-TW28 can be con- fgured to provide led intensity control. the led output functions as a high-current output to drive the illumina- tion led used with an optical sensor. see led intensity control on page 72 for more information. pincfg input the pincfg input is used to select whether the IC-TW28 is in pin confguration or serial confguration mode. connect pincfg to 3.3 v to select pin confg- uration mode. connect pincfg to ground to select serial confguration mode. do not allow the pincfg input to foat. p r e l i m i n a r y p r e l i m i n a r y 120 120 120 a+ a b+ b IC-TW28 z+ z a+ b+ z+ a b z dvdd xrst IC-TW28 1 k 100 nf
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 23/ 80 confguration resistors in pin confguration mode (pincfg = 3.3 v), the IC-TW28 is confgured by applying different voltages to the confguration inputs c0 C c3. each confgura- tion input recognizes 12 different voltage levels. the desired voltage levels are typically set using a resistive voltage divider on each of the confguration inputs as shown in figure 19 . thus, only 8 resistors are required to completely confgure the IC-TW28. figure 19: pin confguration resistors the resistors should be located as close to the con- fguration input pins as possible and no decoupling capacitors should be used. eia e48 series 2% resis- tors or e96 series 1% resistors are recommended to guarantee reliable operation under all conditions. spi port the IC-TW28 provides a standard spi (serial periph- eral interface) slave port that can be used for de- vice confguration and communication with a host pro- cessor or microcontroller in serial confguration mode (pincfg = 0 v). connect the spi port pins to the host processor or microcontroller as shown in figure 20 . figure 20: spi port connection if the host processor or microcontroller can be discon- nected, the spi port pins must be pulled up or down as shown in figure 20 . do not allow any of the spi port pins to foat. although figure 20 shows a single-device application, multiple IC-TW28s can also communicate over a single spi channel to a host processor or microcontroller. see bussing multiple IC-TW28s on page 75 and chaining multiple IC-TW28s on page 76 for more information. reserved pins all reserved pins must be tied to ground as shown in figures 10 , 11 , and 12 for proper operation. do not allow any of the reserved pins to foat. p r e l i m i n a r y p r e l i m i n a r y xss / c 0 v dd sclk / c 1 ic - tw 28 v dd r 01 r 02 r 11 r 12 do not use decoupling caps ! si / c 2 r 21 r 22 so / c 3 r 31 r 32 v dd v dd avdd so/c3 si/c2 sclk/c1 xss/c0 xcs sclk mo mi IC-TW28 host p or c 3.3v
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 24/ 80 configuration overview the IC-TW28 can be confgured for a specifc applica- tion in one of three ways. for simple, stand-alone ap- plications, a pin confguration interface is available. pin confguration mode provides easy selection of the most common interpolation factors and operating modes. for access to all IC-TW28 features in more sophisti- cated stand-alone or hosted applications, serial confg- uration mode must be used. serial confguration can be done through the spi port or the encoder link interface, which uses the a+ and a- outputs for communication. the encoder link interface can be used in hosted ap- plications to provide factory confguration independent of the host processor or for feld re-confguration. pin confguration mode pin confguration mode is recommended for stand-alone applications since it does not require any programming and is simple and easy to implement for fxed confgurations in production. to select pin confguration mode, connect the pincfg pin to 3.3 v and connect eight resistors to the four confguration inputs as shown in confguration resistors on page 23 . the recommended resistor values for setting the con- fguration levels are shown in table 7 . confguration nominal rx1 rx2 level voltage k ? k ? 11 3.30 0.00 10 3.00 10.0 100 9 2.70 11.5 51.1 8 2.40 11.5 30.1 7 2.10 16.2 28.7 6 1.80 9.53 11.5 5 1.50 11.5 9.53 4 1.20 28.7 16.2 3 0.90 30.1 11.5 2 0.60 51.1 11.5 1 0.30 100 10.0 0 0.00 0.00 table 7: pin confguration resistor values eia e48 series 2% resistors or e96 series 1% resis- tors are recommended to guarantee reliable operation under all conditions. an open circuit is shown as inf- nite ( ) resistance and a short circuit is shown as zero resistance in table 7 . interpolation factor confguration inputs c0 and c3 are used to select the interpolation factor. input c3 selects the desired in- terpolation group i0 or i1 and input c0 selects the de- sired interpolation factor from within the selected group. choose the desired interpolation factor from table 8 and connect the appropriate resistors to confguration input c0 according to table 7 to set the corresponding confguration level. c0 interpolation interpolation level group i0 group i1 11 256 250 10 128 200 9 64 180 8 32 125 7 16 100 6 12 80 5 8 50 4 6 40 3 4 25 2 3 20 1 2 10 0 1 5 table 8: confguration input c0 note: the interpolation factors shown in table 8 are the number or ab output cycles per sin/cos input cy- cle. there are four times as many ab output edges per sin/cos input cycle than shown in the table. hysteresis and filtering confguration input c1 selects the hysteresis and the amount of fltering (smoothing) of the ab outputs of the IC-TW28. choose the desired hysteresis and amount of fltering from table 9 and connect the appropriate resistors to confguration input c1 according to table 7 to set the corresponding confguration level. c1 level hysteresis ab filtering 11 2.8 ? heavy fltering 10 1.4 ? 9 0.7 ? 8 0.35 ? 7 2.8 ? medium fltering 6 1.4 ? 5 0.7 ? 4 0.35 ? 3 2.8 ? light fltering 2 1.4 ? 1 0.7 ? 0 0.35 ? table 9: confguration input c1 the hysteresis level is shown in degrees of a sin/cos input cycle. p r e l i m i n a r y p r e l i m i n a r y
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 25/ 80 the amount of fltering is a compromise between fast response and smoothness of the ab outputs. it is rec- ommended to start with light fltering since this gives the fastest response of the ab outputs to changes in the sin/cos inputs. medium or heavy fltering may be se- lected if the outputs are noisy or jittery. experimentation may be necessary to determine the optimal setting. ab frequency limit and auto adaption confguration input c2 is used to set the ab frequency limit (minimum ab edge separation) and to enable or disable auto adaption. choose the desired confgura- tion from table 10 and connect the appropriate resistors to confguration input c2 according to table 7 to set the corresponding confguration level. c2 max. ab min. edge auto level frequency separation adaption 11 195 khz 1.28 s on 10 390 khz 640 ns 9 781 khz 320 ns 8 1.56 mhz 160 ns 7 3.12 mhz 80 ns 6 6.25 mhz 40 ns 5 195 khz 1.28 s off 4 390 khz 640 ns 3 781 khz 320 ns 2 1.56 mhz 160 ns 1 3.12 mhz 80 ns 0 6.25 mhz 40 ns table 10: confguration input c2 the highest maximum ab output frequency in pin con- fguration mode is 6.25 mhz, which is equivalent to an edge separation of 40 ns. lower maximum output fre- quencies (higher minimum edge separation) can be selected as shown in table 10 if devices connected to the IC-TW28 (counters, plcs, motion controllers, drives, etc.) cannot handle its full output frequency. auto adaption maintains optimal offset, channel bal- ance, and phase compensation values for the sin and cos channels during operation to ensure maximum inter- polator accuracy under all operating conditions. unless specifcally required otherwise, it is recommended to enable auto adaption and to use the highest maximum ab frequency (confguration level 6). the sin/cos sensor input frequency (fnput) that corre- sponds to a given ab output frequency can be calcu- lated using the following formula: fnput = abfrequency interpolation where interpolation is the interpolation factor set using confguration inputs c0 and c3. for example, if an interpolation factor of 250 is selected using c0 and c3, and c2 is at confguration level 8 (1.56 mhz), the maximum ab frequency will be reached at a sensor input frequency of fnput = 1.56 mhz 250 = 0.00624 mhz = 6.24 khz if the sin/cos sensor input exceeds this frequency, the ab output position can no longer keep up with the sen- sor position. in this case, the IC-TW28 keeps gener- ating output pulses at the maximum ab frequency. if this condition is temporary or transient, the ab outputs catch up when the sin/cos input frequency decreases. if this condition persists, however, a fatal fault is gener- ated and the IC-TW28 stops working. input range, interpolation group, and z calibra- tion confguration input c3 selects the input signal range, the interpolation group, and whether z channel auto calibration is used. choose the desired setting from table 11 and connect the appropriate resistors to con- fguration input c3 according to table 7 to set the corre- sponding confguration level. c3 input interpolation auto z level range group calibration 11 reserved i1 yes 10 high 9 low 8 reserved i0 7 high 6 low 5 reserved i1 no 4 high 3 low 2 reserved i0 1 high 0 low table 11: confguration input c3 select low input range for mr or hall effect sensors pro- ducing differential outputs of up to 700 mv peak. se- lect high input range for gmr, tmr, or optical sensors with outputs of up to 2 v peak. see input confgura- tion and signal levels on page 55 for more information. do not select a reserved input range. select the interpolation group corresponding to the de- sired interpolation chosen using confguration input c0. p r e l i m i n a r y p r e l i m i n a r y
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 26/ 80 auto z calibration determines whether the zero chan- nel is automatically calibrated along with the sin and cos channels when the xcalib input is activated. it is recommended to use auto z calibration in all applica- tions using the zero inputs. in applications where the zero inputs are not used, select no auto z calibration. for example, to confgure an interpolation factor of 80, normal input mode, and auto z calibration, set c0 to confguration level 6 and c3 to confguration level 9. values for IC-TW28 registers in pin confguration mode are shown in table 12 and 13 . register.bit(s) val. description main_cfg.input determined by c3 main_cfg.flter 0 500 khz max. input freq. main_cfg.rs422 1 rs422 abz outputs main_cfg.irqpp 0 open-drain xirq output main_cfg. elinkoff 0 encoder link available led_cfg 0 led pwm disabled uvw_cfg 0 uvw disabled inter determined by c0/c3 inter1.div 0 no post-ab divider ab.hyst determined by c1 uvw.hyst 0 0 ? uvw hysteresis falarm 0 no input freq.alarm ablimit determined by c2 zero0.threshold 10 42% of signal amplitude zero0.mode 0 position capture on z zero0.clr 0 never clear mcc zero1.zwidth 0 1ab edge (quad. state) output.apol 0 normal polarity output.bpol 0 normal polarity output.zpol 0 z is active high output.abzdir 0 normal ab direction output.uvwpol 0 normal uvw polarity output.uvwdir 0 normal uvw rotation output.abzen 1 abz outputs output.uvwen 0 no uvw outputs zphase 0 affected by c3 uvwph 0 no uvw phase shift filt_cfg.auto 0 static kp filt_cfg.fb 0 no feedback delay filt_cfg.kpmax 6 max. dynamic kp limit filt_lag. threshold 12 filter lag threshold filt_k.kp determined by c1 filt_k.ki 3 maximum ki stat_cfg.flter 3 2.5 ms status flter stat_cfg 1 irq extended by 40 ms stat_cfg.enc 0 no irq on mcc ofow stat_cfg.enz 0 no irq on pos. capture stat_sel 0 stat_val for irq stat_ie.ofow 0 no irq on overfow stat_ie.falarm 0 no irq on falarm stat_ie.laglim 0 no irq on excess lag stat_ie.inclim 1 irq on ab/uvw limit stat_ie.lagfatl 1 irq on fatal lag stat_ie.scamp 1 irq on amplitude lo/hi stat_ie.adapt 0 no irq on excess adapt stat_ie.res 0 no irq on residuals stat_hiz 0 outputs always enabled table 12: pin confguration mode register values start.wait 3 10 ms startup wait time start.mode 1 same phase startup start.nostart 0 automatic startup adapt_cfg0 determined by c2 adapt_cfg1.p 1 slow auto adaption rate adapt_cfg1.stop 1 stop auto adaption on scamp adapt_cfg1. zcal determined by c3 adapt_cfg1.xcalee 1 store to eeprom when xcalib de-activates sc_amp_targ 150 sin/cos amplitude target sc_amp_low 90 C40% sc_amp_targ sc_amp_high 180 +20% sc_amp_targ s_ofs_base 0 not used c_ofs_base 0 not used sc_ofs_lim 127 not used sc_ofs_th 0 not used sc_bal_base 0 not used sc_bal_lim 127 not used sc_bal_th 0 not used sc_ph_base 0 not used sc_ph_lim 127 not used sc_ph_th 0 not used z_ph_th 0 not used z_gna_cor 8 affected by c3 table 13: pin confguration mode register values (continued) serial confguration mode in serial confguration mode (pincfg = 0 v), confgu- ration values for all static registers must be written to the tw28s internal eeprom using the spi port or the encoder link interface before the device can be used. for stand-alone applications, the easiest way to accomplish this is to use the IC-TW28 demo board and the free graphical user interface (gui) software. the IC-TW28 tw28_1d evaluation board implements the IC-TW28 and a usb interface for direct communi- cation with the gui software running on a windows pc. a functional prototype encoder can thus be quickly as- sembled and confgured. see the tw28_1d evaluation board documentation for more information. the tw28_1d evaluation board can also be used for prototype development to confgure an external IC-TW28 via the spi or encoder link interfaces using the free gui software. in series production, the eval- uation board can be employed to download pre-engi- neered confgurations to IC-TW28s embedded in prod- ucts. in hosted applications (where the spi port is used to communicate with the host processor or microcon- troller), the IC-TW28 must be confgured via the host or using the encoder link interface. communication protocols for the spi port and encoder link interface as well as internal registers are explained in subsequent sections of this document. p r e l i m i n a r y p r e l i m i n a r y
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 27/ 80 calibration overview once the IC-TW28 has been confgured, the sin and cos channels must be calibrated to determine proper values for gain, offset correction, channel balance, and phase correction. this is most easily done using the auto calibration feature of the IC-TW28 to automatically determine optimum values for these parameters. if the zero inputs are used, the z channel must also be calibrated for gain, offset correction, and phase. auto calibration is also available for the z channel. auto calibration can be initiated in hardware using the xcalib input or via software commands using the spi port or the encoder link interface. with auto calibration initiated, provide sensor input of a few hundred sin/cos cycles and the IC-TW28 tunes the correction parame- ters to provide lowest error and jitter in the interpolated ab and/or uvw outputs. z channel auto calibration can be accomplished along with ab/uvw auto calibration or separately. the sensor input used for auto calibration does not need to be at a constant frequency nor must it be unidi- rectional. a rotary encoder can be calibrated by moving the disc or wheel back and forth by a few revolutions; a linear encoder by moving the sensor back and forth on the scale by a few centimeters. if z auto calibration is used, input motion must include generation of a zero input signal. after providing suffcient input signals, auto calibration is terminated using the xcalib input or software com- mands and the tuned correction values are stored to the internal eeprom for use on subsequent startups. hardware auto calibration (xcalib) hardware auto calibration can be used in both pin and serial confguration modes and is initiated by pulling the xcalib input low. a push-button switch and pull-up resistor connected between xcalib (as shown in fig- ure 10 on page 18 ) is an easy way to achieve this in series production. auto calibration can also tune the z channel. in pin confguration mode, this is controlled by confguration input c3. in serial confguration mode, auto calibration can be confgured to tune or not tune the z channel and to automatically store or not store the calibrated parameters to eeprom when xcalib is released. the recommended sequence for hardware auto calibra- tion in pin confguration mode is: 1. pull xcalib input low. 2. provide sensor input signals as explained in cali- bration overview. 3. release the xcalib input (it is pulled high by the external pull-up resistor) to store all calibrated values to the eeprom. the recommended sequence for hardware auto calibra- tion in serial confguration mode is: 1. ensure all static (confguration) registers have valid values for the desired application, espe- cially sc_amp_targ (the recommended value is 150). 2. pull xcalib input low. 3. provide sensor input signals as explained in cali- bration overview. 4. release the xcalib input (it is pulled high by the external pull-up resistor). if adapt_cfg1.xcalee = 1, the calibrated values are automatically stored to the eeprom. 5. if adapt_cfg1.xcalee = 0, store the calibrated cor register values to the base registers by writing 0x12 to the command register. then store the calibrated cor and base register val- ues to the internal eeprom by writing 0x11 to the command register. p r e l i m i n a r y p r e l i m i n a r y
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 28/ 80 software auto calibration software auto calibration is accomplished using either the spi port or the encoder link interface to send auto calibration commands to the command register (see table 95 on page 50 ). after sending the appropriate command, provide sensor input signals as for hardware auto calibration. when calibration is complete, stop auto calibration and write the calibrated values to the eeprom for use on subsequent startups. after auto calibration, all the er- ror correction residue values (res registers) should be zero (or near zero). if this is not the case, auto calibration should be repeated. the recommended sequence for software auto calibra- tion is: 1. ensure all static (confguration) registers have valid values for the desired application, espe- cially sc_amp_targ (the recommended value is 150). 2. initiate auto calibration by writing 0x23 to the command register (0x4000). 3. provide sensor input signals as explained in cali- bration overview. 4. terminate auto calibration by writing 0x20 to the command register. 5. store the calibrated cor register values to the base registers by writing 0x12 to the command register. 6. store the calibrated cor and base register val- ues to the internal eeprom by writing 0x11 to the command register. startup in operation, the startup sequence is initiated when power is applied to the IC-TW28. however, a startup sequence can also be initiated by external hardware connected to the xrst input, or by a command via the spi port or the encoder link interface. at startup, the IC-TW28s por circuit monitors the sup- ply voltage and waits until it has reached 2.7...2.9 v. in pin confguration mode, the IC-TW28 then waits 10 ms, reads the confguration data from eeprom, and starts abz/uvw output generation. in serial confguration mode, the wait time is pro- grammable between 0 and 84 ms and the IC-TW28 can be confgured not to start abz output generation after reading the confguration data. this is useful in hosted applications to allow the host processor or mi- crocontroller to start the IC-TW28. also in serial confguration mode, the state of the ab outputs relative to the z output at startup is pro- grammable. see startup modes on page 58 for more information. if any errors are detected during the start-up cycle, the IC-TW28 does not enable the outputs but goes into an idle state with xirq asserted. p r e l i m i n a r y p r e l i m i n a r y
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 29/ 80 spi communication the spi port is a 4-wire slave interface which operates in cpol = 0 and cpha = 0 mode only. this means that the base (resting) value of sclk is low, si is sampled on the rising edge of sclk, and so is changed on the falling edge of sclk. the active-low slave select input, xss, is used by the host p to enable the spi port to initiate communication. spi communication uses an overlapped packet struc- ture where the response to a command is returned while the next command is being sent. figure 21 shows this for a single-device application, where the host controls a single IC-TW28 slave (see figure 20 ). see bussing multiple IC-TW28s on page 75 and chaining multiple IC-TW28s on page 76 for information on multiple-device applications. figure 21: spi overlapped packet structure spi command and response packets are always 32 bits long and sent most-signifcant bit frst. the host initi- ates communication with the IC-TW28 by driving slave select (xss) low and then clocking a 32-bit command (1) to the slave input, si. the serial clock (sclk) signal is not shown in figure 21 . the host drives xss high at the end of the command packet and the IC-TW28 executes the command. after waiting for the command to be executed, the host again drives xss low and sends the next command packet (2) to si while at the same time reading the 32-bit response (1) to the initial command (1) on the slave output, so. the IC-TW28 always returns a response packet while reading a command packet. the response packet (0) returned while writing the frst command packet (1) is not defned. the available read and write commands are shown in figure 22 and explained in detail on the following pages. p r e l i m i n a r y p r e l i m i n a r y response response response response si so xss 32 bits 32 bits 32 bits 32 bits 32 bits command command command command command 3 command 2 command 1 32 bits 32 bits 32 bits command 3 command 2 command 1 response 3 response 2 response 1 32 bits 32 bits 32 bits response 3 response 2 response 1 xss si so 1 1 2 2 3 0 4 4 5 command 3 extended response packet to previous extended command packet extended response packet to extended command packet response si so xss 32 bits 32 bits command command 1 1 2 0 response to command 1 sampled here
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 30/ 80 figure 22: spi command reference command packet format command packets sent to the IC-TW28 by the host are formatted as shown below. figure 23: command packet format because of the IC-TW28s overlapped packet structure, it is possible to write data to a register or the multiturn counter and request read-back of position or other val- ues in the same command. the control byte handles this, as shown below. command spi control byte bit bit name description 31 7 st start (must be 1) 30:29 6:5 rm read mode 28:27 4:3 wm write mode 26:24 2:0 C reserved (must be 0) table 14: spi control byte a read-only command is one in which the write mode (wm) is 0. the type of data read is determined by the read mode (rm) encoded in the control byte. a read- /write command is one in which the write mode (wm) is 1, 2, or 3. p r e l i m i n a r y p r e l i m i n a r y 3 1 3 0 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 1 9 1 8 1 7 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 8 7 6 5 4 3 2 1 0 bit st r m wm null write ignored 1 3 0 0 0 0 multi-cycle counter write reserved (0) 1 3 0 0 0 1 multi-cycle counter value (0 16,383) multi-cycle counter atomic read/write reserved (0) 1 3 0 0 0 2 multi-cycle counter value (0 16,383) mcs register write register address 1 3 0 0 0 3 register data position and status read 1 0 0 0 0 x depends on write mode (wm) captured position and status read 1 1 0 0 0 x depends on write mode (wm) sin, cos, and zero adc read 1 2 0 0 0 x depends on write mode (wm) register data and position read 1 3 0 0 0 0 register address ignored bit name position and status read captured position and status read sin, cos, and zero adc read register data and position read 0 0 fflt irq zcl bit name zc mcrl mcr multi-cycle counter value (0 16,383) angle value (0 1023) x x x x x x 0 0 captured multi-cycle counter value captured angle value x x x x x x 0 0 corrected sin adc value corr. zero adc value multi-cycle counter value (0 16,383) angle value (0 1023) 0 0 corrected cos adc value register data all values, addresses, and data are read and written msb first. mcs 0 0 0 response to previous command xss sclk si so address = 0 : angle register command 0 1 0 data from previous request xss sclk si so addr = 3 , this is a 0 sensor read not used s next command word 0 [ 9 : 0 ] b 1 data from previous request xss sclk si so addr = 32 , read device id register not used s next command data [ 7 : 0 ] if s = 0 , start a new conversion on rising edge of xss . data to be returned is latched on falling edge of xss if s = 0 , start a new conversion on rising edge of xss . 0 0 0 3 0 w 1 0 0 0 0 0 0 0 w response to previous command xss sclk si so data next command undefined response addr [ 5 : 0 ] 3 1 w = 0 : read address = 0 x 21 : config register s = 1 : suppress new sample . w = 1 : write 5 s 1 0 1 1 1 0 0 0 data is writ ten on rising edge of xss . s data spi control byte 3 0 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 1 9 1 8 1 7 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 8 7 6 5 4 3 2 1 0 bit response to previous command
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 31/ 80 the type of data written by an spi read/write command is determined by the write mode encoded in the control byte of the command packet as shown below. spi write modes wm description 0 null write (read only) 1 multi-cycle counter write 2 multi-cycle counter atomic read/write 3 register write table 15: spi write modes the type of data returned by an spi read-only or read- /write command is determined by the read mode en- coded in the control byte of the command packet as shown below. spi read modes rm description 0 position and status read (20 ns or 320 ns) 1 captured position and status read 2 sin, cos, and zero adc read (320 ns) 3 register data and position read table 16: spi read modes the requested values are returned in the subsequent response packet. position (angle) is always returned at the full 10-bit resolution of the IC-TW28, regardless of the interpolation value (inter). all values are read on the falling edge of xss. how- ever, the internal update rates of the various values are different. in all cases, the value read is the most recently updated internal value. see response packet formats on page 32 for more details on the internal update rates. null write (read only) the null write command packet is formatted as shown below. null write: wm = 0 bits description 31:24 spi control byte 23:0 ignored (register address if rm = 3) table 17: null write command packet the null write (read only) command does not write any data to the IC-TW28. the data specifed by the read mode in the control byte is returned with the next spi command. if rm = 0, 1, or 2, the command bits in the command packet are ignored, but must be present to complete the 32-bit packet. if rm = 3 (register data and posi- tion read), the command bits in the command packet are used to specify the register address to read. see register data and position read on page 32 for more information. multi-cycle counter write the multi-cycle counter write command packet is for- matted as shown below. multi-cycle counter write: wm = 1 bits description 31:24 spi control byte 23:15 reserved (must be 0) 14:1 multi-cycle counter value (0 C 16,383) 0 multi-cycle counter synchronization bit (mcs) table 18: multi-cycle counter write command packet the specifed multi-cycle counter value is written imme- diately to the multi-cycle counter and the data specifed by the read mode in the control byte is returned with the next spi command. the multi-cycle counter synchronization bit (mcs) allows synchronization between an external absolute system and the multi-cycle counter in the IC-TW28, even when the sin/cos inputs are moving. see multi-cycle counter on page 67 for more information. multi-cycle counter atomic read/write the multi-cycle counter atomic read/write command packet is formatted as shown below. multi-cycle counter atomic read/write: wm = 2 bits description 31:24 spi control byte 23:15 reserved (must be 0) 14:1 multi-cycle counter value (0 C 16,383) 0 multi-cycle counter synchronization bit (mcs) table 19: multi-cycle counter atomic read/write com- mand packet the multi-cycle counter atomic read/write command is like the multi-cycle counter write command except that the specifed multi-cycle counter value is written to the multi-cycle counter at the same instant as the data specifed by the read mode in the control byte is read. writing of the multi-cycle counter value is delayed until the next spi command to allow simultaneous reading of the position and writing of the multi-cycle counter value for synchronization confrmation when using external absolute systems. see multi-cycle counter on page 67 for more information. p r e l i m i n a r y p r e l i m i n a r y
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 32/ 80 register write the register write command packet is formatted as shown below. register write: wm = 3 bits description 31:24 spi control byte 23:8 register address 7:0 register data table 20: register write command packet the specifed register data is written to the register at the specifed register address and the data specifed by the read mode in the control byte is returned with the next spi command. register data and position read the register data and position read command packet is formatted as shown below. register data and position read: rm = 3, wm = 0 bits description 31:24 spi control byte 23:8 register address 7:0 ignored table 21: register data and position read command packet the data at the specifed register address as well as the multi-cycle counter and angle values are returned with the next spi command. note that the register data and position read com- mand requires the write mode in the spi control byte (wm) to be zero. non-zero wm values result in unde- fned operation. response packet formats the format of the response packet is determined by the read mode specifed in the control byte of the previous command packet. position and status read the position and status read response packet is for- matted as shown below. position and status read response: rm = 0 bits description 31:24 spi status byte 23:10 multi-cycle counter value (0 C 16,383) 9:0 angle value (0 C 1023) table 22: position and status read response packet the spi status byte reports the status of the signal path, the most recent capture, and the multi-cycle counter as shown below. response spi status byte bit bit name description 31:30 7:6 C 0 (reserved) 29 5 fft fatal fault occurred 28 4 irq interrupt request active 27 3 zcl zero capture lost 26 2 zc zero capture occurred 25 1 mcrl multi-cycle counter rollover lost 24 0 mcr multi-cycle counter rollover occurred table 23: spi status byte the fatal fault (fft) bit is set if one or more of the bits in the stat_fatal register is set, indicating that a fatal fault occurred. the interpolator is disabled after a fatal fault and must be restarted by a serial command or by cycling power. the interrupt request (irq) bit indicates that there is a pending internal interrupt request or fault. the zero capture occurred (zc) bit is set whenever a zero capture event occurs. this bit is reset when the captured position is read. a zero capture event can also be confgured to request an interrupt to the host processor by asserting xirq. see stat_cfg on page 46 for more information. the zero capture lost (zcl) bit is set whenever a zero capture event occurs while the zero capture event (zc) bit is still active. this condition indicates that the cap- tured position from a previous capture event has been lost. this bit is reset when the captured position is read. see position capture on page 69 for more information. the multi-cycle counter rollover occurred (mcr) bit is set whenever the multi-cycle counter passes through a multiple of 4,096 cycles. this bit is reset whenever the position is read. a multi-cycle counter rollover can also be confgured to request an interrupt to the host processor by asserting xirq. see stat_cfg on page 46 for more information. the multi-cycle counter rollover lost (mcrl) bit is set whenever the multi-cycle counter passes through a multiple of 4,096 cycles while the multi-cycle counter rollover (mcr) bit is still active. this condition indicates that a previous multi-cycle counter rollover was not ac- knowledged. this bit is reset whenever the position is read. see multi-cycle counter on page 67 for more information. p r e l i m i n a r y p r e l i m i n a r y
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 33/ 80 the multi-cycle counter value is a 14-bit number repre- senting the number of input cycles seen by the IC-TW28 since the IC-TW28 was started (or restarted) or since the multi-cycle counter was reset. if the multi-cycle counter is not used, this value can be ignored. if the abz outputs are enabled (output.abzen = 1), this value is updated internally every 320 ns. if the abz outputs are disabled (output.abzen = 0), this value is updated internally every 20 ns, but is only correct if inter = 0 (interpolation of 256). the angle value is the angular position within an input cycle as indicated by the sin/cos sensor. it is always returned at the full 10-bit resolution of the IC-TW28, regardless of the inter value. if the abz outputs are enabled (output.abzen = 1), this value is updated internally every 320 ns. if the abz outputs are disabled (output.abzen = 0), this value is updated internally ev- ery 20 ns, but is only correct if inter = 0 (interpolation of 256). captured position and status read the captured position and status read response packet is formatted as shown below. captured position and status read response: rm = 1 bits description 31:24 spi status byte 23:10 captured multi-cycle counter value 9:0 captured angle value (0 C 1023) table 24: captured position and status read re- sponse packet the spi status byte reports the status of the signal path, the most recent capture, and the multi-cycle counter as described previously. the captured multi-cycle counter value is a 14-bit number representing the number of input cycles seen by the IC-TW28 since the IC-TW28 was started or restarted as of the occurrence of the last z pulse or z gating window as determined by register zero0.mode. this value is only correct if inter = 0 (interpolation of 256). the captured angle value is the angular position within an input cycle as indicated by the sin/cos sensor as of the occurrence of the last z pulse or zero input gating window signal as determined by zero0.mode. this value is only correct if inter = 0 (interpolation of 256). see position capture on page 69 for more information. sin, cos, and zero adc read the sin, cos, and zero adc values read response packet is formatted as shown below. sin, cos, and zero adc read response: rm = 2 bits description 31:28 reserved (0) 27:18 corrected sin adc value 17:8 corrected cos adc value 7:0 corrected zero adc value table 25: sin, cos, and zero adc read response packet the corrected sin adc value is a signed (2s com- plement) 10-bit value representing the most recently sampled sine adc value after offset, gain, and phase correction. the corrected cos adc value is a signed (2s complement) 10-bit value representing the most recently sampled cosine adc value after offset, gain, and phase correction. the corrected zero adc value is a signed (2s complement) 8-bit value representing the most recently sampled zero adc value after offset and gain correction. the adc values are updated every 320 ns. register data and position read the register data and position read response packet is formatted as shown below. register data and position read response: rm = 3, wm = 0 bits description 31:24 register data 23:10 multi-cycle counter value (0 C 16,383) 9:0 angle value (0 C 1023) table 26: register data and position read response packet register data contains the value of the register at the address specifed in the previous register data and position read command packet. the multi-cycle counter value is a 14-bit number repre- senting the number of input cycles seen by the IC-TW28 since the IC-TW28 was started or restarted. this value is only correct if inter = 0 (interpolation of 256). if the multi-cycle counter is not used, this value can be ignored. if the abz outputs are enabled (out- put.abzen = 1), this value is updated internally ev- ery 320 ns. if the abz outputs are disabled (out- put.abzen = 0), this value is updated internally every 20 ns, but is only correct if inter = 0 (interpolation of 256). the angle value is the angular position within an input cycle as indicated by the sin/cos sensor. it is always p r e l i m i n a r y p r e l i m i n a r y
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 34/ 80 returned at the full 10-bit resolution of the IC-TW28, regardless of the inter value. if the abz outputs are enabled (output.abzen = 1), this value is updated internally every 320 ns. if the abz outputs are disabled (output.abzen = 0), this value is updated internally ev- ery 20 ns, but is only correct if inter = 0 (interpolation of 256). encoder link communication the encoder link interface provides read/write access to the IC-TW28s internal registers using the a+ and aC outputs. this is useful for feld reconfguration or diagnostics of products incorporating the IC-TW28. the encoder link interface can be used for confguration and diagnostics; it cannot be used to read the sensor position (angle), the multi-cycle counter, or the captured position values. to enable the encoder link interface, the IC-TW28 output drivers must be externally over-driven in the activation sequence shown in figure 24 . figure 24: encoder link activation sequence the external drivers used to overpower the IC-TW28 must be capable of sourcing and sinking at least 40 ma while driving the a+ and aC outputs to voltage levels < 0.8 v and > 2.4 v. the complete encoder link activa- tion sequence takes between 1 and 8 milliseconds (t1 + t2 + t3 + t4) to execute. at the end of the activation sequence, the a+ and aC outputs are both low and the encoder link interface is active. once activated, the encoder link interface provides bidirectional two-wire spi-like serial communication with the IC-TW28. to deactivate the encoder link inter- face and return to normal operating mode, cycle power to the IC-TW28 or toggle the xrst input. in spi only output mode (where the outputs are foating in a high impedance state) or abzuvw output mode (where the a+ and aC outputs are independent of each other), it is possible to accidentally activate encoder link. in these modes, it is recommended to disable the encoder link interface by setting main_cfg.elinkoff = 1. see output modes, directions, and polarities on page 56 and main_cfg on page 38 for more informa- tion. p r e l i m i n a r y p r e l i m i n a r y a + a C external driver starts to overpower ic - tw 28 by forcing a + and a C high . t 1 0 . 25 C 2 ms t 2 t 1 10 % t 3 t 1 10 % t 4 t 1 10 % ic - tw 28 stops driving a + and a C . encoder link interface is now active . normal operation . ic - tw 28 is driving quadrature signals on a + and a C .
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 35/ 80 encoder link write the encoder link write command is 32 bits long and formatted as shown in figure 25 . figure 25: encoder link write the host supplies a serial clock signal to the a+ pin and writes the command bits (msb frst) to the aC pin. command bits are latched on the rising edge of a+. the elink command byte determines whether the com- mand is a read or a write. command elink control byte bit bit name description 31 7 st start (must be 1) 30 6 wr write 29:24 5:0 C reserved (must be 0) table 27: elink control byte a write command is one in which the write bit (wr) is 1. the data byte specifed in the write command (bits 7:0) is written to the register address specifed in the command (bits 23:8). encoder link read the encoder link read command is 40 bits long and formatted as shown in figure 26 . figure 26: encoder link read a read command is one in which the write bit (wr) of the elink control byte is 0. as with the write command, the host supplies a serial clock signal to the a+ pin and writes the command bits (msb frst) to the aC pin. command bits are latched on the rising edge of a+. during the wait byte, the host must stop driving aC. the IC-TW28 then drives the data from the register address specifed in the read command (bits 31:16) to the a- pin (bits 7:0). the host must sample the data on the rising edge of a+. at the end of the read command, the aC pin reverts to being an input and the host must drive it low to be ready to send the next command. p r e l i m i n a r y p r e l i m i n a r y a+ a register address 3 1 data elink control byte 3 0 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 1 9 1 8 1 7 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 8 7 6 5 4 3 2 1 0 bit a+ a register address 3 1 data elink control byte 3 0 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 1 9 1 8 1 7 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 8 7 6 5 4 3 2 1 0 bit 3 9 3 8 3 7 3 6 3 5 3 4 3 3 3 2 wait
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 36/ 80 configuration parameters register map the IC-TW28 contains two types of registers, static and dynamic, as shown in table 28 and table 29 . static registers are not changed or updated by the IC-TW28 during operation. static registers generally contain con- fguration data and their values are saved in the internal eeprom and restored after each startup. static reg- isters may be read or written using the spi port or the encoder link interface. reserved bits in static registers must be zero for proper operation, as shown. dynamic registers are updated by the IC-TW28 during operation or auto calibration to refect current operat- ing conditions or status. in general, dynamic registers are read-only, but the correction value registers can be written and startup values are stored in the internal eeprom. dynamic registers may be read via the spi port or the encoder link interface. reserved bits in dynamic registers are undefned. registers not shown are reserved and must not be ac- cessed. changes to static register values take effect immediately. description address register name bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 type 0x0000 main_cfg 0 0 elinkoff irqpp rs422 noise input static 0x0001 led_cfg buffer freq auto odrain pol en static 0x0002 led_start initial (starting) led pwm value static 0x000b test 0 0 0 0 0 z 0 we static 0x0010 led_pwm actual led pwm value dyn 0x0100 uvw_cfg 0 0 0 pairs static 0x0101 inter0 interlsb static 0x0102 inter1 0 0 0 div intermsbs static 0x0103 ab 0 0 0 hyst static 0x0104 uvw 0 0 0 hyst static 0x0105 falarm input frequency alarm level static 0x0106 ablimit ab frequency limit static 0x0107 zero0 mode clr threshold static 0x0108 zero1 0 0 0 0 zwidth static 0x0109 output uvwen abzen uvwdir uvwpol abzdir zpol bpol apol static 0x010a zphase msb dyn 0x010b uvwph msb static 0x010c phase_lsb 0 0 0 0 uvw z s/d 0x021a s_adc sine adc msb dyn 0x021c c_adc cosine adc msb dyn 0x0300 filt_cfg 0 0 0 kpmax fb auto static 0x0301 filt_lag 0 0 0 threshold static 0x0302 filt_k 0 0 ki kp s/d 0x0400 stat_cfg 0 0 enz enc long flter static 0x0401 stat_sel res adapt scamp lagfatl inclim laglim falarm ofow static 0x0402 stat_ie res adapt scamp lagfatl inclim laglim falarm ofow static 0x0403 stat_hiz res adapt scamp lagfatl inclim laglim falarm ofow static 0x0404 stat_val res adapt scamp lagfatl inclim laglim falarm ofow dyn 0x0405 stat_latch res adapt scamp lagfatl inclim laglim falarm ofow dyn 0x0406 stat_fatal interr ee2bit eechk dyn 0x0601 ee_addr eeprom address to read or write static 0x0602 ee_data eeprom data dyn 0x0603 ee_stat validity of read eeprom data dyn table 28: IC-TW28 register map p r e l i m i n a r y p r e l i m i n a r y
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 37/ 80 description address register name bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 type 0x4000 command command register dyn 0x4001 start 0 0 nostart mode wait static 0x4002 adapt_cfg0 zphase zgain zofs scgain scofsa scph scbal scofs static 0x4003 adapt_cfg1 0 0 xcalee zcal stop p static 0x4004 sc_amp_targ sin/cos amplitude monitor target (0...180) static 0x4005 sc_amp_low sin/cos amplitude monitor low limit (0...sc_amp_targ) static 0x4006 sc_amp_high sin/cos amplitude monitor high limit (sc_amp_targ...180) static 0x4007 s_ofs_base sin channel digital offset base value ( 127) static 0x4008 c_ofs_base cos channel digital offset base value ( 127) static 0x4009 sc_ofs_lim sin and cos channels digital offset limit (0...255) static 0x400a sc_ofs_th sin and cos channels offset residue threshold (0...255) static 0x400b sc_bal_base sin/cos balance base value ( 127) static 0x400c sc_bal_lim sin/cos balance limit (0...255) static 0x400d sc_bal_th sin/cos balance residue threshold (0...255) static 0x400e sc_ph_base sin/cos phase base value ( 127) static 0x400f sc_ph_lim sin/cos phase limit (0...255) static 0x4010 sc_ph_th sin/cos phase residue threshold (0...255) static 0x4011 z_ph_th z channel phase residue threshold (0...255) static 0x4012 s_ofs_cor sin channel digital offset correction value ( 127) dyn 0x4013 s_ofsa_cor sin channel analog offset correction value ( 31) dyn 0x4014 c_ofs_cor cos channel digital offset correction value ( 127) dyn 0x4015 c_ofsa_cor cos channel analog offset correction value ( 31) dyn 0x4016 sc_bal_cor sin/cos balance correction value ( 127) dyn 0x4017 sc_gn_cor sin/cos digital gain correction value (0...255) dyn 0x4018 sc_gna_cor sin/cos analog gain correction value (0...23) dyn 0x4019 sc_ph_cor sin/cos phase correction value ( 127) dyn 0x401a z_ofsa_cor z channel analog offset correction value ( 31) dyn 0x401b z_gna_cor z channel analog gain correction value (0...23) dyn 0x401c watchdog watchdog (31) dyn 0x4020 sc_amp sin/cos amplitude (0...255) dyn 0x4021 s_amp sin channel amplitude (0...255) dyn 0x4022 c_amp cos channel amplitude (0...255) dyn 0x4023 s_ofs_res sin channel offset residue ( 127) dyn 0x4024 c_ofs_res cos channel offset residue ( 127) dyn 0x4025 sc_bal_res sin/cos balance residue ( 127) dyn 0x4026 sc_ph_res sin/cos phase residue ( 127) dyn 0x4028 z_ph_res z channel phase residue ( 127) dyn 0xe000 device_id IC-TW28 device id read-only 0xe002 rev0 IC-TW28 revision lsb read-only 0xe003 rev1 IC-TW28 revision msb read-only table 29: IC-TW28 register map (continued) p r e l i m i n a r y p r e l i m i n a r y
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 38/ 80 main_cfg main_cfg.input confgures the input stage of the sin/- cos inputs. main_cfg.input (0x0000 bits 1:0) value description 0 low range signals (0 db) 1 low range signals with sensor loss detection 2 high range signals (-9 db) with sensor loss detection 3 reserved (do not use) table 30: input stage confguration see input confguration and signal levels on page 55 for more information. main_cfg.noise selects the amount of noise fltering applied to the input signals, which also affects the la- tency of the IC-TW28. main_cfg.noise (0x0000 bit 2) value description 0 less fltering, 1.5 s latency 1 more fltering, 1.9 s latency table 31: input noise filter latency in the amount of time it takes for a change in the sin/cos inputs to show up in the ab or uvw out- puts. see filter confguration on page 70 for more information. main_cfg.rs422 enables and disables the rs422-compatible line driver on the abz/uvw out- puts. main_cfg.rs422 (0x0000 bit 3) value description 0 line driver disabled (standard digital outputs) 1 line driver enabled table 32: rs422 line driver enable when the line driver is disabled, the abz/uvw outputs are standard digital outputs. see output modes, direc- tions, and polarities on page 56 for more information. main_cfg.irqpp determines whether the xirq output is open-drain or push-pull. main_cfg.irqpp (0x0000 bit 4) value description 0 xirq output is open-drain 1 xirq output is push-pull table 33: interrupt output confguration normally, the xirq output is push-pull. in multidevice chained applications, the xirq output can be set to open-drain to allow wire-oring multiple IC-TW28 xirq outputs using a pull-up resistor. see chaining multiple IC-TW28s on page 76 for more information. main_cfg.elinkoff disables the encoder link inter- face. main_cfg.elinkoff (0x0000 bit 5) value description 0 encoder link interface available 1 encoder link interface disabled table 34: encoder link interface disable when main_cfg.elinkoff = 1, the encoder link inter- face cannot be activated by the sequence shown in figure 24 . set main_cfg.elinkoff = 1 when operating in spi only or abzuvw output modes. see output modes, directions, and polarities on page 56 for more information. p r e l i m i n a r y p r e l i m i n a r y
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 39/ 80 led_cfg led_cfg is a static register used to confgure the led intensity control feature of the IC-TW28. see led inten- sity control on page 72 for more information on using this feature. led_cfg.en enables or disables the led pin. led_cfg.en (0x0001 bit 0) value description 0 led pin disabled 1 led pin enabled table 35: led output enable if led_cfg.en = 0, the led output pin is in the state shown below. led pin state (led_cfg.en = 0) led_cfg.odrain led_cfg.pol state 0 0 low 0 1 high 1 x hi-z table 36: led pin state (led_cfg.en = 0) led_cfg.pol selects the polarity of the led pwm signal. led_cfg.pol (0x0001 bit 1) value description 0 positive polarity 1 negative polarity table 37: pwm polarity with positive led polarity, a larger pwm value results in more high time in the led pwm signal. with nega- tive led polarity, a larger pwm value results in more low time in the led pwm signal. if led_cfg.en = 0, led_cfg.pol has no effect. led_cfg.odrain selects whether the led output is open-drain or push-pull. led_cfg.odrain (0x0001 bit 2) value description 0 push-pull led output 1 open-drain led output table 38: led output confguration if led_cfg.en = 0, led_cfg.odrain has no effect. led_cfg.auto enables and disables the led intensity control. led_cfg.auto (0x0001 bit 3) value description 0 led intensity control off 1 led intensity control on table 39: led intensity control if led_cfg.en = 0, led_cfg.auto has no effect. if led_cfg.en = 1 and led_cfg.auto = 0, the signal on the led output is the value of led_start. led_cfg.freq selects the dsm (delta-sigma modu- lation) frequency of the led intensity control output. the corresponding pwm frequency is shown for use in selecting flter components. led_cfg.freq (0x0001 bits 5:4) value dsm frequency pwm frequency 0 3.125 mhz 12.2 khz 1 6.25 mhz 24.4 khz 2 12.5 mhz 48.8 khz 3 25 mhz 97.6 khz table 40: led modulation frequency led_cfg.buffer is used to set the hysteresis of the led intensity control. led_cfg.buffer (0x0001 bits 7:6) value buffer 0 8 1 16 2 24 3 32 table 41: led control loop buffer if led_cfg.en = 1 and led_cfg.auto = 1, the led intensity control increases the duty cycle of the led pwm signal whenever sc_amp < (sc_amp_low + led_cfg.buffer) and decreases it whenever sc_amp > (sc_amp_high C led_cfg.buffer). for proper operation, led _ cfg . buffer < sc _ amp _ high ? sc _ amp _ low 2 if led_cfg.en = 0, or if led_cfg.en = 1 and led_cfg.auto = 0, led_cfg.buffer has no effect. p r e l i m i n a r y p r e l i m i n a r y
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 40/ 80 led_start led_start is a static register containing the initial (starting) value for the duty cycle of the led pwm out- put. led_start (0x0002) value description 0...255 starting led pwm duty cycle table 42: starting led pwm duty cycle if led_cfg.en = 1, led_start is loaded from the internal eeprom at startup and used as the initial value for the led pwm output. if led_cfg.en = 1 and led_cfg.auto = 0, the led output stays at this value. if led_cfg.en = 1 and led_cfg.auto = 1, the led output is adjusted by the led intensity control to maintain optimum illumination of an optical sin/cos sensor. if led_cfg.en = 0, led_start has no effect. see led intensity control on page 72 for more information. the led_start value is also used during calibration (xcalib input low or command 0x21 C 0x23 active) regardless of the settings of the led_cfg register bits. led_pwm led_pwm is a dynamic register containing the actual current operating duty cycle of the led pwm output. led_pwm (0x0010) value description 0...255 actual led pwm duty cycle table 43: actual led pwm duty cycle if led_cfg.en = 1, led_pwm is loaded from led_start at startup. if led_cfg.en = 1 and led_cfg.auto = 0, the led_pwm stays equal to led_start and the led output stays at this value. if a new value is written to led_pwm, the led output is immediately set to this level. if led_cfg.en = 1 and led_cfg.auto = 1, led_pwm (and thus the led output) is adjusted by the led in- tensity control to maintain optimum illumination of an optical sin/cos sensor. if led_cfg.en = 0, led_pwm has no effect. see led intensity control on page 72 for more information. test test is a static register used to unlock the internal eeprom and enable z test mode. the test register value is not stored in eeprom and is set to 0 at every startup. test.we (0x000b bit 0) value description 0 eeprom locked (write protection enabled) 1 eeprom unlocked (write prot. disabled) table 44: eeprom unlock the eeprom must be unlocked (test.we = 1) to write to it using command register commands. the eep- rom can be written at the rising edge of the xcalib input regardless of the value of test.we. see hard- ware auto calibration (xcalib) on page 27 for more information. test.z (0x000b bit 2) value description 0 normal operating mode 1 z test mode table 45: zero test mode in z test mode, the a outputs show the un-gated z signal once per input period, the b outputs show the internal z gating signal derived from the zero inputs, and the z outputs show the gated z output pulse. z test mode is only available if output.abzen = 1. see z test mode and calibration on page 65 for more infor- mation. p r e l i m i n a r y p r e l i m i n a r y
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 41/ 80 uvw_cfg uvw_cfg is a static register used to confgure the uvw outputs (if used). uvw_cfg.pairs (0x0100 bits 4:0) value description 0 32 uvw cycles per input cycle 1...31 1...31 uvw cycles per input cycle table 46: uvw pole pairs if output.uvwen = 0, uvw_cfg.pairs has no effect. inter0 inter0 is a static register containing the least signif- cant byte of the interpolation factor, inter. inter0.interlsb (0x0101) value description 0...255 interpolation factor lsb (inter [7:0]) table 47: interpolation factor lsb inter1 inter1 is a static register containing the most signif- icant bits of the interpolation factor and the post-ab divider. inter1.msbs (0x0102 bits 1:0) value description 0...3 interpolation factor msbs (inter [9:8]) table 48: interpolation factor msb the interpolation factor, inter, is calculated as inter = 256 inter 1. msbs + inter 0. lsb and is the number of ab output edges per sin/cos input cycle. inter (9:0) value description 0 inter = 256 1...7 reserved (do not use) 8...1023 inter = inter/4 table 49: inter (9:0) inter is the actual interpolation factor in ab output cy- cles per sin/cos input cycle. inter1.div (0x0102 bits 4:2) value description 0 post-ab divider disabled 1...7 minimum...maximum post-ab divider table 50: post-ab divider the actual value used by the post-ab divider, div , is calculated as div = inter 1. div + 1 when using the post-ab divider, the effective interpola- tion factor, intereff , is intereff = inter div the ab output frequency limit specifed by ablimit applies to the ab frequency prior to the post-ab divider. see post-ab divider on page 74 for more information. ab ab is a static register used to set the hysteresis of the ab outputs. ab.hyst (0x0103 bits 4:0) value description 0 C 31 minimum C maximum ab hysteresis table 51: ab output hysteresis the hysteresis in sin/cos input degrees, abhyst , is cal- culated as abhyst[ ? ] = ab . hyst 360 ? 2048 the equivalent hysteresis in output ab edges is a func- tion of the interpolation factor and the ab divider. uvw uvw is a static register used to set the hysteresis of the uvw outputs. uvw.hyst (0x0104 bits 4:0) value description 0 C 31 minimum C maximum uvw hysteresis table 52: uvw output hysteresis the hysteresis in sin/cos input degrees, uvwhyst , is calculated as uvwhyst = uvw . hyst 360 ? 2048 p r e l i m i n a r y p r e l i m i n a r y
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 42/ 80 falarm falarm is a static register used to set the level of the input frequency alarm. falarm (0x0105) value description 0 C 128 min. C max. input frequency alarm level 129 C 255 reserved (do not use) table 53: input frequency alarm level an input frequency alarm (stat_val.falarm) is acti- vated if the sin/cos input frequency, fnput , exceeds fnput [ mhz ] = 1.56 falarm 256 falarm is intended as a high input frequency alarm; not for accurate detection of input frequency. ablimit ablimit is a static register used to set the level of the ab output frequency limiter. ablimit (0x0106) value description 0 C 255 max. C min. ab output frequency limit table 54: ab output frequency limit the actual ab output frequency limit fab , is calculated as fab [ mhz ] = 12.5 mhz ( ablimit + 1) div the equivalent minimum time between ab edges, tedge , is calculated as tedge [ ns ] = 20( ablimit + 1) div the ab output frequency limit specifed by ablimit applies to the ab frequency prior to the post-ab di- vider ( div ). see post-ab divider on page 74 for more information. zero0 zero0 is a static register used to set the threshold of the z channel comparator, the capture mode, and the multi-cycle counter mode. zero0.threshold (0x0107 bits 5:0) value description 31 z channel comparator threshold table 55: z comparator threshold zero0.threshold is a signed, 2s complement value used to defne the width of the internal z gating window. the internal z gating window is active whenever the value of the conditioned zero input is greater than four times the comparator threshold. see z test mode and calibration on page 65 for more information. zero0.clr (0x0107 bit 6) value description 0 multi-cycle counter is never cleared (reset) 1 multi-cycle counter cleared on z output table 56: multi-cycle counter clear mode see multi-cycle counter on page 67 for more informa- tion. zero0.mode (0x0107 bit 7) value description 0 position captured on z output 1 position captured on z gating window table 57: position capture mode if zero0.mode = 0, the 24-bit position (multi-cycle counter plus angle) is captured whenever the z outputs are activated. if zero0.mode = 1, the 24-bit position (multi-cycle counter plus angle) is captured whenever the internal z gating window is activated. see position capture on page 69 for more information. zero1 zero1 is a static register used to set the width of the z output pulse. zero1.zwidth (0x0108 bits 3:0) value description 0 C 15 min. C max. z pulse width table 58: z pulse width the actual width of the z output pulse, zwidth , in ab output edges, is calculated as zwidth [ edges ] = zero 1. zwidth + 1 div zero1.zwidth must be less than inter. see z test mode and calibration on page 65 for more information. p r e l i m i n a r y p r e l i m i n a r y
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 43/ 80 output output is a static register used to enable and dis- able and set the polarity and direction of the abz/uvw outputs. see output modes, directions, and polarities on page 56 for more information on setting the output mode. output.apol determines whether the polarity of the a output is normal or inverted. output.apol also de- termines the state of the a output when the z output is active. see startup modes on page 58 for more information. output.apol (0x0109 bit 0) value description 0 normal a polarity 1 inverted a polarity table 59: a output polarity if output.abzen = 0, output.apol has no effect. output.bpol determines whether the polarity of the b output is normal or inverted. output.bpol also de- termines the state of the b output when the z output is active. see startup modes on page 58 for more information. output.bpol (0x0109 bit 1) value description 0 normal b polarity 1 inverted b polarity table 60: b output polarity if output.abzen = 0, output.bpol has no effect. output.zpol determines whether the polarity of the z output is normal or inverted. output.zpol (0x0109 bit 2) value description 0 normal z+ polarity (active high) 1 inverted z+ polarity (active low) table 61: z output polarity if output.abzen = 0, output.zpol has no effect. output.abzdir determines the counting direction of the ab outputs. output.abzdir (0x0109 bit 3) value description 0 normal counting direction 1 reversed counting direction table 62: ab counting direction if output.abzen = 0, output.abzdir has no effect. output.uvwpol determines whether the polarity of the uvw outputs is normal or inverted. output.uvwpol (0x0109 bit 4) value description 0 normal uvw polarity 1 inverted uvw polarity table 63: uvw output polarity if output.uvwen = 0, output.uvwpol has no effect. output.uvwdir determines the rotation direction (phase sequence) of the uvw outputs. output.uvwdir (0x0109 bit 5) value description 0 normal uvw phase sequence 1 reversed uvw phase sequence table 64: uvw rotation direction if output.uvwen = 0, output.uvwdir has no effect. output.abzen enables or disables the abz outputs. output.abzen (0x0109 bit 6) value description 0 abz outputs disabled 1 abz outputs enabled table 65: abz output enable see output modes, directions, and polarities on page 56 for more information. output.abzen also determines the internal update rate of the angle and multi-cycle counter values read via the spi port. see response packet formats on page 32 for more information. output.uvw enables or disables the uvw outputs. output.uvwen (0x0109 bit 7) value description 0 uvw outputs disabled 1 uvw outputs enabled table 66: uvw output enable see output modes, directions, and polarities on page 56 for more information. p r e l i m i n a r y p r e l i m i n a r y
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 44/ 80 zphase zphase is a dynamic register containing the most sig- nifcant byte of the z output phase (z output location within an input cycle). zphase.msb (0x010a) value description 0 C 255 z phase msb (zphase [9:2]) table 67: z phase msb uvwph uvwph is a static register containing the most signif- cant byte of the uvw output phase shift relative to the sin/cos input cycle. uvwph.msb (0x010b) value description 0 C 255 uvw phase msb (uvwph [9:2]) table 68: uvw phase msb phase_lsb phase_lsb is a static register containing the least signifcant bits of the z and uvw phase. phase_lsb.z (0x010c bits 1:0) value description 0 C 3 z phase ls bits (zphase [1:0]) table 69: z phase lsb the z output phase, zph, is calculated as zph = 4 zphase . msb + phase _ lsb . z the actual z channel phase, zphase , in sin/cos input cycle degrees, is calculated as zphase [ ? ] = zph 360 ? 1024 if z auto calibration is used, zph is tuned by the IC-TW28 during auto calibration. phase_lsb.uvw (0x010c bits 3:2) value description 0 C 3 uvw phase ls bits (uvwph [1:0]) table 70: uvw phase lsb the uvw phase shift, uvwps, is calculated as uvwps = 4 uvwph . msb + phase _ lsb . uvw the actual uvw phase, uvwph , in sin/cos input cycle degrees, is calculated as uvwph [ ? ] = uvwph 360 ? 1024 s_adc s_adc is a dynamic register containing the msb of the 12-bit sin channel adc value. s_adc (0x021a) value description 0 C 255 min. C max. sin adc value table 71: sin adc value this value can be read using the encoder link inter- face to check the rough value of the sin channel adc for diagnostic purposes. the full 12-bit adc value is available using the spi interface. see sin, cos, and zero adc read on page 33 for more information. c_adc c_adc is a dynamic register containing the msb of the 12-bit cos channel adc value. c_adc (0x021c) value description 0 C 255 min. C max. cos adc value table 72: cos adc value this value can be read using the encoder link inter- face to check the rough value of the cos channel adc for diagnostic purposes. the full 12-bit adc value is available using the spi interface. see sin, cos, and zero adc read on page 33 for more information. p r e l i m i n a r y p r e l i m i n a r y
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 45/ 80 filt_cfg filt_cfg is a static register used to confgure the sig- nal path flter. see filter confguration on page 70 for more information. filt_cfg.auto (0x0300 bit 0) value description 0 filter kp is static 1 filter kp is dynamic table 73: dynamic filtering enable filt_cfg.fb (0x0300 bit 1) value description 0 no feedback loop delay (normal lag) 1 600 ns feedback loop delay (reduced lag) table 74: lag reduction filt_cfg.kpmax (0x0300 bits 4:2) value description 0 C 2 reserved (do not use) 3 C 6 minimum - maximum dynamic kp limit 7 reserved (do not use) table 75: dynamic filter limit filt_lag filt_lag is a static register used to set the lag thresh- old of the signal path flter when dynamic kp is used (filt_cfg.auto = 1). see filter confguration on page 70 for more information. filt_lag.threshold (0x0301 bit 4:0) value description 0 reserved 1 C 31 minimum C maximum flter lag threshold table 76: dynamic filtering adaption threshold when dynamic kp is used, if flter lag is greater than the flter lag threshold, kp is reduced to make the flter more responsive. if flter lag is less than the flter lag threshold, kp is increased to increase flter smoothing. filt_k filt_k is a static register used to set the flter coeff- cients. see filter confguration on page 70 for more information. filt_k.kp (0x0302 bits 2:0) value description 0 C 6 minimum - maximum flter kp 7 reserved (do not use) table 77: filter p-coeffcient when dynamic kp is used, filt_k.kp is dynamic and updated by the IC-TW28 based on sin/cos input accel- eration. filt_k.ki (0x0302 bits 5:4) value description 0 C 3 minimum C maximum flter ki table 78: filter i-coeffcient p r e l i m i n a r y p r e l i m i n a r y
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 46/ 80 stat_cfg stat_cfg is a static register used to confgure the status/fault monitoring features of the IC-TW28. stat_cfg.flter determines how long a status condi- tion must persist before the corresponding bit in the stat_val register is set. stat_cfg.flter (0x0400 bits 2:0) value description 0 0 (none) 1 10 s 2 150 s 3 2.5 ms 4 40 ms 5 C 7 reserved (do not use) table 79: status event filtering stat_cfg.long determines how long xirq is active when a confgured status condition or fault occurs. stat_cfg.long (0x0400 bit 3) value description 0 xirq active for duration of condition 1 xirq prolonged by 40 ms table 80: interrupt extension prolonging xirq is useful when it is used to drive a fault led to ensure that transient conditions are visible. stat_cfg.enc determines whether or not an overfow of the multi-cycle counter activates xirq. stat_cfg.enc (0x0400 bit 4) value description 0 no interrupt on counter overfow 1 interrupt on multi-cycle counter overfow table 81: interrupt enable for counter overfow stat_cfg.enc does not affect the multi-cycle counter rollover occurred (mcr) or multi-cycle counter rollover lost (mcrl) bits in the spi status byte. see multi-cycle counter on page 67 for more information. stat_cfg.enz determines whether or not a position capture event (as confgured in zero0.mode) activates xirq. stat_cfg.enz (0x0400 bit 5) value description 0 no interrupt on position capture 1 interrupt on position capture table 82: interrupt enable for position capture stat_cfg.enz does not affect the zero capture oc- curred (zc) or zero capture lost (zcl) bits in the spi status byte. see position capture on page 69 for more information. p r e l i m i n a r y p r e l i m i n a r y
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 47/ 80 stat_val stat_val is a dynamic register containing bits that indicate the status of the signal path. these bits are active for the duration of the specifed condition. stat_val (0x0404) bit name description 0 ofow signal path overfow 1 falarm input frequency alarm 2 laglim excessive position lag 3 inclim output frequency limited 4 lagfatl fatal position lag 5 scamp input amplitude out of range 6 adapt adaption limit exceeded 7 res correction residue threshold exceeded table 83: status register stat_val.ofow indicates that the signal path is sat- urated somewhere, most likely due to adc overfow. this condition is not fatal, but does result in reduced interpolation accuracy. stat_val.falarm indicates that the sin/cos input fre- quency is above the limit set in the falarm register. stat_val.laglim indicates that the ab outputs are lag- ging behind the input by more than 45 ? of a sin/cos input cycle. in this condition, the flter is disabled, but the ab outputs are still valid. this condition can be avoided by reducing input acceleration or by reducing the filt_k.kp value. stat_val.inclim indicates that either the ab output frequency is being limited to the ab output frequency limit set in the ablimit register, or the uvw output fre- quency is greater than 8.33 mhz. this condition is not fatal and the ab/uvw outputs are still valid, although if it persists, it will eventually cause a fatal lag limit (stat_val.lagfatl) condition. stat_val.lagfatl indicates a fatal lag condition and the ab and uvw outputs are not valid. this occurs if a stat_val.inclim condition persists for too long. stat_val.scamp indicates that the sin/cos signal am- plitude as calculated by sin 2 + cos 2 is outside the lim- its specifed by the amplitude limit registers. stat_val.scamp sin/cos amplitude register amplitude low limit register amplitude high limit regester sc_amp sc_amp_low sc_amp_high table 84: input amplitude out of range stat_val.adapt indicates that one or more of the cor- rection parameters has deviated from its base value by more than its specifed limit. stat_val.adapt correction register base register limit register s_ofs_cor s_ofs_base sc_ofs_lim c_ofs_cor c_ofs_base sc_bal_cor sc_bal_base sc_bal_lim sc_ph_cor sc_ph_base sc_ph_lim table 85: adaption limit exceeded stat_val.res indicates that one or more of the correc- tion residue values has exceeded its residue threshold. stat_val.res residue register residue threshold register s_ofs_res sc_ofs_th c_ofs_res sc_bal_res sc_bal_th sc_ph_res sc_ph_th z_ph_res z_ph_th table 86: correction residue threshold exceeded stat_latch the stat_latch register contains the same status bits as the stat_val register, except that the bits are latched and stay active until cleared. stat_latch (0x0405) bit name description 0 ofow signal path overfow 1 falarm input frequency alarm 2 laglim excessive position lag 3 inclim output frequency limited 4 lagfatl fatal position lag 5 scamp input amplitude out of range 6 adapt adaption limit exceeded 7 res correction residue threshold exceeded table 87: latched status register latched status bits are cleared by writing 0 to the bit. writing 1 to a bit does nothing, allowing bits to be cleared individually. p r e l i m i n a r y p r e l i m i n a r y
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 48/ 80 stat_sel stat_sel is a static register is used to select whether the status value bits in stat_val or the latched status bits in stat_latch are used to generate an interrupt (activate xirq). stat_sel (0x0401) bit name description 0 ofow signal path overfow 1 falarm input frequency alarm 2 laglim excessive position lag 3 inclim output frequency limited 4 lagfatl fatal position lag 5 scamp input amplitude out of range 6 adapt adaption limit exceeded 7 res correction residue threshold exceeded table 88: latched status selection if a given stat_sel bit is zero, the corresponding stat_val condition is used to generate the interrupt. if a given stat_sel bit is one, the corresponding stat_latch condition is used to generate the inter- rupt. see status and fault logic on page 59 for more information. stat_ie the stat_ie register is used to enable the bits se- lected by the stat_sel register to actually generate an interrupt (activate xirq). stat_ie (0x0402) bit name description 0 ofow signal path overfow 1 falarm input frequency alarm 2 laglim excessive position lag 3 inclim output frequency limited 4 lagfatl fatal position lag 5 scamp input amplitude out of range 6 adapt adaption limit exceeded 7 res correction residue threshold exceeded table 89: interrupt enable if a bit in the stat_ie register is 1, the corresponding bit selected by the stat_sel register generates an interrupt when active. if a bit in the stat_ie register is 0, the corresponding bit selected by the stat_sel reg- ister does not generate an interrupt when active. see status and fault logic on page 59 for more information. stat_hiz stat_hiz is a static register used to enable the bits selected by the stat_sel register to disable the abz/uvw outputs. stat_hiz (0x0403) bit name description 0 ofow signal path overfow 1 falarm sin/cos input frequency too high 2 laglim filter lag limit exceeded 3 inclim ab or uvw frequency limit exceeded 4 lagfatl fatal lag condition 5 scamp sin/cos amplitude out of range 6 adapt adaption limit exceeded 7 res correction residue threshold exceeded table 90: output disable if a bit in the stat_hiz register is 1, the correspond- ing bit selected by the stat_sel register disables the abz/uvw outputs when active. when disabled, the abz/uvw outputs are in a high-impedance state. if a bit in the stat_hiz register is 0, the corresponding bit selected by the stat_sel register does not disable the abz/uvw outputs when active. see status and fault logic on page 59 for more information. stat_fatal stat_fatal is a read-only register containing bits that indicate fatal errors. stat_fatal (0x0406) bit name description 0 eechk eeprom checksum error 1 ee2bit eeprom read double bit error 2 interr internal error 3 C 7 reserved table 91: fatal errors stat_fatal.eechk indicates an error in the checksum of the internal eeprom. stat_fatal.ee2bit indicates a double bit error oc- curred when reading the internal eeprom. stat_fatal.interr indicates that a fatal error occurred in the IC-TW28. any of these errors will inhibit startup of the IC-TW28 or stop it during operation, requiring a power cycle to reset. fatal errors activate xirq and disable the abz and uvw outputs. see status and fault logic on page 59 for more information. p r e l i m i n a r y p r e l i m i n a r y
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 49/ 80 ee_addr ee_addr is a static register used to store the internal eeprom address to read or write using commands 0x13 and 0x14 respectively. eight user-accessible bytes in the eeprom are available. eeprom memory map address description 0x00 C 0x03 device serial number (do not write) 0x04 C 0x3b reserved (do not write) 0x3c C 0x3f user data (read/write) 0x40 C 0xff reserved (do not write) table 92: eeprom memory map see device serial number and user data on page 64 for more information. do not write to ee_addr while the eeprom is be- ing accessed (commands 0x11, 0x14, or 0x17) or the eeprom may be corrupted. ee_data ee_data is a dynamic register used to store the data read from or written to the internal eeprom using com- mands 0x13 and 0x14 respectively. see device serial number and user data on page 64 for more informa- tion. ee_data (0x0602) value description 0...255 eeprom data table 93: eeprom data ee_stat ee_stat is a dynamic register which indicates the validity of the data read from the internal eeprom. after an eeprom read command (0x13), the value of the ee_stat register indicates the validity of the data in the ee_data register. ee_stat (0x0603) value description 0 no error, ee_data valid 1 single-bit error corrected, ee_data valid 2 double-bit error, ee_data invalid 3 C 255 reserved table 94: eeprom data validity status see device serial number and user data on page 64 for more information. p r e l i m i n a r y p r e l i m i n a r y
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 50/ 80 command the command register is used to start or stop the IC-TW28, save the confguration parameters to eep- rom, individually perform any of the auto calibration routines, etc. to execute a command, write the ap- propriate value to the command register. when the command has been executed, the command register is reset to 0x00 by the IC-TW28 and a new command may be sent. command (0x4000) value description 0x00 command register ready/idle 0x01 start/restart interpolation 0x02 stop interpolation 0x03 C 0x0f reserved (do not use) 0x10 load confguration and cor registers from eeprom 0x11 write confguration and cor register values to eeprom* 0x12 copy cor values to base registers 0x13 read eeprom address 0x14 write eeprom address* 0x15 reserved (do not use) 0x16 load confguration and cor registers from eeprom and start interpolation 0x17 write cor register values to eeprom* 0x18 C 0x1f reserved (do not use) 0x20 stop auto calibration 0x21 auto calibrate sin and cos parameters 0x22 auto calibrate z channel parameters 0x23 auto calibrate all parameters 0x24 C 0xff reserved (do not use) table 95: command register *these commands do nothing if the eeprom is locked (test.we = 0). unlock the eeprom (test.we = 1) before executing these commands. see test on page 40 for more information. also, do not write to ee_addr while these commands are active or the eeprom may be corrupted. command 0x01 starts or restarts the interpolator using the currently loaded confguration values. command 0x02 stops the interpolator. when the in- terpolator is stopped, the abz and uvw are in a high impedance state and the led output is deactivated as if led_cfg.en = 0. the xirq output remains opera- tional. command 0x10 loads the static confguration and cor registers from the internal eeprom but does not start the interpolator. command 0x11 writes the values of the static confgura- tion registers to the internal eeprom. the value of the dynamic led register and the values of the dynamic correction parameter registers (0x4012 - 0x401b) are also written to the eeprom, but the value of static register test is not. this command may take up to 1 second to complete. do not write to ee_addr while this commands is active or the eeprom may be cor- rupted. command 0x11 does nothing if the eeprom is locked (test.we = 0). unlock the eeprom (test.we = 1) before executing this command. see test on page 40 for more information. command 0x12 copies the values in the correction pa- rameter registers to the corresponding base registers as shown below. command 0x12 correction register base register s_ofs_cor (0x4012) s_ofs_base (0x4007) c_ofs_cor (0x4014) c_ofs_base (0x4008) sc_bal_cor (0x4016) sc_bal_base (0x400b) sc_ph_cor (0x4019) sc_ph_base (0x400e) table 96: command 0x12 command 0x13 reads the eeprom address specifed in register ee_addr and returns the value in register ee_data and the status (validity) of the data in regis- ter ee_stat. the eeprom read command requires a minimum of 1 ms to load the ee_data and ee_stat registers. see device serial number and user data on page 64 for more information. command 0x14 writes the data in register ee_data to the eeprom address specifed in ee_addr. the eeprom write command requires a minimum of 20 ms to complete. see device serial number and user data on page 64 for more information. do not write to ee_addr while this commands is active or the eep- rom may be corrupted. command 0x14 does nothing if the eeprom is locked (test.we = 0). unlock the eeprom (test.we = 1) before executing this command. see test on page 40 for more information. command 0x16 loads the static confguration and cor registers from the internal eeprom and starts the in- terpolator. command 0x17 writes the values of the correction pa- rameter registers to the internal eeprom. do not write to ee_addr while this commands is active or the eep- rom may be corrupted. command 0x17 does nothing if the eeprom is locked (test.we = 0). unlock the eeprom (test.we = 1) p r e l i m i n a r y p r e l i m i n a r y
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 51/ 80 before executing this command. see test on page 40 for more information. command 0x20 stops auto calibration initiated by com- mand 0x21, 0x22, or 0x23. command 0x21 initiates auto calibration of the sin/cos offset, gain, balance, and phase correction parameters. this command must be manually terminated after cali- bration is complete by writing 0x20 to the command register. command 0x11 or 0x17 can then be used to store the calibrated values to eeprom. command 0x22 initiates auto calibration of the z chan- nel offset, gain, and phase correction parameters. this command must be manually terminated after calibration is complete by writing 0x20 to the command register. command 0x11 or 0x17 can then be used to store the calibrated values to eeprom. command 0x23 initiates auto calibration of the sin/cos offset, gain, balance, and phase correction parame- ters, as well as the z channel offset, gain, and phase correction parameters. this command must be manu- ally terminated after calibration is complete by writing 0x20 to the command register. command 0x11 or 0x17 can then be used to store the calibrated values to eeprom. start start is a static register used to set the startup wait time and the startup mode. start.wait (0x4001 bits 2:0) value startup wait time 0 2 ms 1 2.5 ms 2 4 ms 3 10 ms 4 34 ms 5 130 ms 6 514 ms 7 reserved (do not use) table 97: startup wait time start.mode determines how the ab and z outputs behave at startup. start.mode (0x4001 bits 4:3) value description 0 relative startup mode 1 same phase startup mode 2 absolute burst startup mode 3 reserved (do not use) table 98: startup mode see startup modes on page 58 for more information. start.nostart determines whether or not interpolation starts automatically at startup. start.nostart (0x4001 bit 5) value description 0 start interpolation at startup 1 do not start interpolation at startup table 99: interpolation startup inhibiting interpolation at startup is useful in hosted applications to allow the host processor to control inter- polation startup. adapt_cfg0 adapt_cfg0 is one of the two static registers used to confgure auto adaption. adapt_cfg0 (0x4002) bit name description 0 scofs s/c offset adaption 1 scbal s/c balance adaption 2 scph s/c phase adaption 3 scofsa s/c analog offset adaption 4 scgain s/c gain adaption 5 zofs z offset adaption 6 zgain z gain adaption 7 zphase z phase adaption table 100: auto adaption confguration sin/cos analog offset and gain adaption as well as all z channel adaption are meant to be used only for ini- tial calibration and not during operation. it is therefore recommended to set adapt_cfg0 7. p r e l i m i n a r y p r e l i m i n a r y
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 52/ 80 adapt_cfg1 adapt_cfg1 is the other static register used to con- fgure auto adaption. adapt_cfg1.p sets the auto adaption rate. adapt_cfg1.p (0x4003 bits 2:0) value description 0 1/32 increment per sin/cos input period 1 1/16 x error per sin/cos input period 2 1/8 x error per sin/cos input period 3 1/4 x error per sin/cos input period 4 1/2 x error per sin/cos input period 5 reserved (do not use) 6 1 increment per sin/cos input period 7 reserved (do not use) table 101: adaption rate higher adapt_cfg1.p values result in faster adaption and calibration. lower adapt_cfg1.p values require more input cycles for calibration. adapt_cfg1.stop determines whether or not auto adaption continues when the sensor input amplitude is out of range. adapt_cfg1.stop (0x4003 bit 3) value description 0 auto adaption always active 1 auto adaption stopped when stat_val.scamp = 1 table 102: adaption fault mode adapt_cfg1.zcal determines whether or not the z channel is calibrated when pin xcalib is active. adapt_cfg1.zcal (0x4003 bit 4) value description 0 sin/cos calibration only when xcalib active 1 sin/cos and z calibration when xcalib active table 103: auto z calibration disable z calibration (adapt_cfg1.zcal = 0) if the zero inputs are not used. adapt_cfg1.xcalee determines whether or not the calibrated correction values are stored to the internal eeprom when pin xcalib is deactivated. adapt_cfg1.xcalee (0x4003 bit 5) value description 0 confguration values not stored to eeprom when xcalib deactivated 1 confguration values stored to eeprom when xcalib deactivated table 104: xcalib storage function sc_amp_targ sc_amp_targ is a static register used to set the de- sired sensor amplitude sin 2 + cos 2 value (target) for sin/cos gain calibration. sc_amp_targ (0x4004) value description 0 C 180 min. C max. sin/cos amplitude target 150 recommended sin/cos amplitude target 181 C 255 reserved (do not use) table 105: sin/cos amplitude calibration target sc_amp_low sc_amp_low is a static register used to set the low limit for the sin/cos amplitude monitor and led intensity control during operation. sc_amp_low (0x4005) value description 0 C 180 min. C max. sin/cos amplitude low limit 181 C 255 reserved (do not use) table 106: sin/cos amplitude low limit during operation, stat_val.scamp is active whenever sc_amp < sc_amp_low. see sin/cos amplitude monitor on page 62 and led intensity control on page 72 for more information. sc_amp_high sc_amp_high is a static register used to set the high limit for the sin/cos amplitude monitor and led intensity control during operation. sc_amp_high (0x4006) value description 0 C 180 min. C max. sin/cos amplitude high limit 181 C 255 reserved (do not use) table 107: sin/cos amplitude high limit during operation, stat_val.scamp is active whenever sc_amp > sc_amp_high. see sin/cos amplitude monitor on page 62 and led intensity control on page 72 for more information. p r e l i m i n a r y p r e l i m i n a r y
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 53/ 80 cor registers the 10 cor registers are dynamic registers containing the error correction parameters. the correction val- ues are determined when auto calibration is performed and are updated during operation by auto adaption as confgured in adapt_cfg0. correction registers address name description 0x4012 s_ofs_cor sin offset correction 0x4013 s_ofsa_cor sin analog offset corr. 0x4014 c_ofs_cor cos offset correction 0x4015 c_ofsa_cor cos analog offset corr. 0x4016 sc_bal_cor sin/cos balance corr. 0x4017 sc_gn_cor sin/cos gain correction 0x4018 sc_gna_cor s/c analog gain corr. 0x4019 sc_ph_cor sin/cos phase corr. 0x401a z_ofsa_cor z analog offset corr. 0x401b z_gna_cor z analog gain corr. table 108: correction registers values for the cor registers can also be written directly if auto calibration or auto adaption is not used. this is also useful to provide initial values for auto calibration to provide faster calibration. base registers the four base registers are static registers that set the base levels of the sin/cos error correction parameters for detection of an excessive adaption status condition (stat_val.adapt). base registers address name description 0x4007 s_ofs_base sin offset base value 0x4008 c_ofs_base cos offset base value 0x400b sc_bal_base sin/cos balance base 0x400e sc_ph_base sin/cos phase base table 109: base registers base register values are signed, 2s complement num- bers. see excessive adaption detection on page 63 for more information. lim registers the three lim registers are static registers that set the deviation limits of the sin/cos error correction pa- rameters for detection of an excessive adaption status condition (stat_val.adapt). auto adaption of the cor- responding error correction parameter stops when its limit is reached. limit registers address name description 0x4009 sc_ofs_lim sin/cos offset limit 0x400c sc_bal_lim sin/cos balance limit 0x400f sc_ph_lim sin/cos phase limit table 110: limit registers limit register values are positive integers. see exces- sive adaption detection on page 63 for more informa- tion. res registers the fve res registers are dynamic registers containing the error correction residue (uncorrected error) used for detection of an excessive error status condition (stat_val.res). after auto calibration, all residue val- ues should be zero (or near zero). auto adaption (as confgured in adapt_cfg0) keeps the corresponding residue values at or near zero during operation. residue registers address name description 0x4023 s_ofs_res sin offset residue 0x4024 c_ofs_res cos offset residue 0x4025 sc_bal_res sin/cos balance residue 0x4026 sc_ph_res sin/cos phase residue 0x4028 z_ph_res z phase residue table 111: residue registers residue register values are signed, 2s complement numbers. see excessive error detection on page 62 for more information. p r e l i m i n a r y p r e l i m i n a r y
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 54/ 80 th registers the four th registers are static registers containing the error correction residue thresholds used for detection of an excessive error status condition (stat_val.res). residue threshold registers address name description 0x400a sc_ofs_th sin/cos offset threshold 0x400d sc_bal_th sin/cos balance threshold 0x4010 sc_ph_th sin/cos phase threshold 0x4011 z_ph_th z phase threshold table 112: residue threshold registers residue threshold register values are positive integers. see excessive error detection on page 62 for more information. watchdog the watchdog register is a dynamic register con- tinuously updated by the IC-TW28 while it is operating correctly. watchdog (0x401c) value description 0 C 30 IC-TW28 not ok 31 IC-TW28 ok 32 C 255 IC-TW28 not ok table 113: watchdog clear the watchdog register by writing 0 to it. after a minimum wait time of 1 ms, it should read 31 (0x1f) if the IC-TW28 is operating correctly. any other value indicates a serious internal malfunction. sc_amp sc_amp is a dynamic register containing the current sin/cos sensor input amplitude sin 2 + cos 2 . it is up- dated every 500 s. sc_amp (0x4020) value description 0 C 255 minimum C maximum sin/cos amplitude table 114: sin/cos amplitude s_amp s_amp is a dynamic register containing the current sin channel amplitude. it is updated once per input cycle, or less at high input speeds. s_amp (0x4021) value description 0 C 255 min. C max. sin channel amplitude table 115: sin amplitude c_amp c_amp is a dynamic register containing the current cos channel amplitude. it is updated once per input cycle, or less at high input speeds. c_amp (0x4022) value description 0 C 255 min. C max. cos channel amplitude table 116: cos amplitude device_id device_id is a read-only register containing the IC-TW28 device (chip) id for identifcation purposes. device_id (0xe000) value description 0x0c IC-TW28 device id table 117: IC-TW28 device id rev0 and rev1 rev0 and rev1 are read-only registers which together contain the IC-TW28 device (chip) revision level. rev0 (0xe002) and rev1 (0xe003) rev1 rev0 description 0x11 0x14 IC-TW28 x 0x11 0x15 IC-TW28 w and w1 table 118: IC-TW28 revision p r e l i m i n a r y p r e l i m i n a r y
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 55/ 80 input configuration and signal levels the IC-TW28s analog sin/cos inputs accept sensor sig- nals with differential peak amplitudes between 20 mv and 2.0 v in two ranges. it is important to confgure the input properly to ensure best performance of the device. available input confgurations are shown in table 119 . IC-TW28 input confgurations differential input input confguration mode amplitude loss pin serial input range (peak) detection input impedance c3 level main_cfg.input low 20 mv C 700 mv no >10 m ? 0, 3, 6, 9 0 yes 220 k ? 1 high 65 mv C 2.0 v yes 620 k ? 1, 4, 7, 10 2 table 119: IC-TW28 input confgurations low input range accepts 20 C 700 mv peak amplitude differential sin/cos signals (10 C 350 mv peak amplitude per + or C input), as shown in figure 27 . in pin confguration mode, low input range is selected via confguration input c3 level 0, 3, 6, or 9. in se- rial confguration mode, low input range is selected by setting main_cfg.input = 0 or 1. figure 27: low input range signals high input range accepts 65 mv C 2.0 v peak ampli- tude differential sin/cos signals (32.5 mv C 1.0 v peak amplitude per + or C input) as shown in figure 28 . in pin confguration mode, high input range is selected via confguration input c3 level 1, 4, 7, or 10. in se- rial confguration mode, high input range is selected by setting main_cfg.input = 2. high input range is implemented in the IC-TW28 using a resistive attenuator before the programmable gain amplifer. thus, input impedance of the sin/cos inputs is different for the two ranges. figure 28: high input range signals the common-mode (dc) voltage of the individual sen- sor inputs must not exceed the specifed common mode range (spec. item 103) or be such that the peaks of the sin/cos signals exceed the maximum input voltages shown in figure 27 and figure 28 . note: 1 v pp signals with 2.5 v common mode cannot be connected directly to the IC-TW28 as the common mode voltage is too high. sensor loss detection is accomplished by placing high value resistors between the + and C inputs of the sin and cos channels. in this way, foating inputs are pulled together causing a loss of signal amplitude. this results in a sin/cos amplitude out of range error (stat_val.scamp = 1). sensor outputs are typically differential, but can also be single-ended. in this case, the sinC and cosC inputs must be biased to vdd/2 using an external voltage di- vider. do not use vc (pin 10) for this purpose as the sensor input attenuator will draw too much current. p r e l i m i n a r y p r e l i m i n a r y 0 1v 2v 3v maximum input voltage (2.2 v) minimum input voltage (0.35 v) nominal vdd (3.3 v) maximum input amplitude (700 mv) 0 1v 2v 3v nominal vdd and maximum input voltage (3.3 v) maximum input amplitude (2 v) 0 1v 2v 3v maximum input voltage (2.2 v) minimum input voltage (0.35 v) nominal vdd (3.3 v) maximum input amplitude (700 mv) 0 1v 2v 3v nominal vdd and maximum input voltage (3.3 v) maximum input amplitude (2 v)
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 56/ 80 output modes, directions, and polarities the IC-TW28 is capable of operating in six different output modes, as shown below. IC-TW28 output modes output main_cfg output .uvwen .abzen .rs422 mode format driver 0 0 x spi only hi-z 0 1 0 abz differential cmos 0 1 1 abzld differential rs422 1 0 0 uvw differential cmos 1 0 1 uvwld differential rs422 1 1 x abzuvw single-ended cmos table 120: IC-TW28 output modes spi only in spi only output mode, all six output drivers are dis- abled and the output pins are in a high impedance state. in this mode, position (angle) must be read via the spi interface. see spi only output mode on page 71 for more information. the abz outputs should be tied low as shown in figure 29 to minimize noise pickup and to avoid accidentally enabling the encoder link interface. figure 29: spi only output connections spi only output mode allows higher sensor input frequencies because the ab output frequency limit (ablimit) is no longer in effect. the input frequency alarm (stat_val.falarm), however, is still in effect in spi only output mode. falarm should be set to 128 to allow maximum input frequency. other falarm set- tings can be used according to the application require- ments. stat_ie.inclim and stat_hiz.inclim should be set to 0 to avoid spurious interrupt requests. finally, in- ter must be set to 0 (interpolation of 256) to allow the multi-cycle counter to be used. position is updated every 20 ns in spi only output mode, compared to 320 ns in other modes. abz and abzld in abz and abzld output modes, the apol, bpol, zpol, and abzdir bits in the output register can be used to set the output polarities and directions to match the application requirements. note that setting apol or bpol (but not both) also reverses the counting direction of the ab outputs. in this case, set the abzdir bit to restore the original ab output counting direction. setting both apol and bpol does not change the ab output counting direction. see figure 17 on page 22 for abz output connections. uvw and uvwld in uvw and uvwld output modes, the uvwpol and uvwdir bits in the output register can be used to set the output polarity and phase sequence direction of the uvw outputs to match the application requirements. note that setting uvwpol shifts the phase of the uvw outputs by 180 ? . in uvwld mode, connect the abz outputs as shown in figure 30 . figure 30: uvw output connections the three signal pairs should be terminated with a 120 ? resistor at the far (receiving) end of the cable as shown. p r e l i m i n a r y p r e l i m i n a r y a+ a b+ b IC-TW28 z+ z 120 120 120 a+ a b+ b IC-TW28 z+ z u+ v+ w+ u v w
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 57/ 80 in uvw output mode, the connections are the same but termination resistors should not be used. abzuvw in abzuvw mode, both abz and uvw signals are available as single-ended standard cmos outputs as shown in figure 31 . figure 31: abzuvw output connections note that the uvw outputs are inverted; set the uvw- pol bit to provide normal uvw output polarity. the apol, bpol, zpol, abzdir, and uvwdir bits can be used as explained previously to set the desired polarities and directions of the abz and uvw outputs. it is strongly recommended to disable the encoder link interface (main_cfg.elinkoff = 1) in abzuvw mode to avoid accidentally triggering the encoder link activation sequence. p r e l i m i n a r y p r e l i m i n a r y IC-TW28 a+ a b+ b z+ z a+ b+ z+ u v w
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 58/ 80 startup modes in serial confguration mode, the start.mode regis- ter value determines how the ab outputs behave at startup. start.mode is only effective if the incremental abz outputs are enabled (output.abzen = 1). if out- put.abzen = 0, the start.mode value has no effect. start.mode (0x4001 bits 4:3) value description 0 relative startup mode 1 same phase startup mode 2 absolute burst startup mode 3 reserved (do not use) table 121: startup mode in relative startup mode, the state of the a+ and b+ out- puts is always the same after startup, regardless of the sin/cos inputs (sensor angle). in same phase startup mode, the state of the a+ and b+ outputs at a given sensor angle is always the same after every startup. this is similar to the operation of a non-interpolated en- coder. absolute burst startup mode is like same phase, except that the sensor angle within an input cycle is counted out on the a and b outputs at startup. for example, figure 32 shows the ab output behavior in the three different startup modes with inter = 9, out- put.apol = 0, output.bpol = 0, and a sensor angle of 70 ? with no motion at startup. figure 32: IC-TW28 startup modes prior to startup, the ab outputs are in a high-impedance state regardless of the startup mode. in relative startup mode, the a+ and b+ outputs are both 0 after startup because output.apol = 0 and output.bpol = 0. in same phase startup mode, the a+ output is low and the b+ output is high after startup since these are the states that correspond to an input sensor angle of 70 ? with inter = 9. in absolute burst startup mode, the a+ and b+ out- puts are both 0 at the beginning of startup (because output.apol = 0 and output.bpol = 0) and then 7 ab edges are generated, leaving the a+ output low and the b+ output high (the same as in same phase startup mode). with inter = 9, each ab edge repre- sents 360 ? /(9 4) = 10 ? of the input sin/cos cycle. thus 70 ? /10 ? = 7 ab edges are required to represent the sin/cos sensor startup angle of 70 ? . in all startup modes, the actual state of the outputs after startup can be changed using output.apol and out- put.bpol. see output modes, directions, and polarities on page 56 for more information. same phase startup mode should only be used if in- ter1.div = 0, 1, 3, or 7 (post-ab divider disabled or power of 2), and inter is an integer. if inter1.div = 2, 4, 5, or 6, or inter is not an integer, then the state of the a+ and b+ outputs at a given sensor angle are not always be the same during operation. in absolute burst startup mode, a maximum of 2 inter ab edges ( 180 ? ) may be generated during startup. these edges are output at a rate determined by the value of the ablimit register. in pin confguration mode, same phase startup mode with output.apol = 0 and output.bpol = 0 is used, as shown in figure 32 . p r e l i m i n a r y p r e l i m i n a r y a + b + relative startup mode z + outa outb outz outa outb outz same phase ab startup burst ab startup a + b + same phase startup mode z + absolute burst startup mode z + startup begins a + b + startup ends
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 59/ 80 status and fault logic the status and fault logic for a single condition is shown schematically in figure 33 . figure 33: single condition status and fault logic the IC-TW28 continuously monitors 8 internal condi- tions and reports these status values in the stat_val register. before activating a bit in the stat_val register, however, the specifc condition must have been continuously active for the time specifed by stat_cfg.flter. this fltering avoids nuisance trip- ping of the status bits. see stat_val on page 47 for more information on the individual status conditions. the eight status values are also latched into the stat_latch register where they remain active even if the specifc condition is no longer active. the host processor or microcontroller can read and then individ- ually clear these latched status bits by writing to the stat_latch register. status conditions can also be individually confgured to indicate a fault and/or interrupt the host processor or microcontroller when activated. the stat_sel register selects whether the dynamic bits in the stat_val reg- ister or the latched bits in the stat_latch register are used to generate an interrupt request. in general, select the stat_val register in stand-alone applications (to avoid latching up the fault led) and stat_latch in hosted applications where the IC-TW28 status is polled (to avoid missing an event). the stat_ie register enables the selected status con- ditions to actually activate the interrupt request output, xirq. the internal interrupt request is also available as part of the spi status byte in the spi command response packet. see response packet formats on page 32 for more information. finally, the stat_hiz register provides an indepen- dent selection of which of the selected status condi- tions disable the abz outputs by putting them in a high impedance state. thus each status condition can be individually confgured to interrupt the host processor or disable the abz outputs, do neither, or do both. p r e l i m i n a r y p r e l i m i n a r y stat _ val stat _ latch x x x x x x x x stat _ sel x x x x x x x x stat _ ie x x x x x x x x stat _ hiz res adapt scamp lagfatl inclim laglim falarm oflow read - only status latched status ( write to clear ) interrupt source select interrupt enable 0 0 0 0 0 stat _ fatal interr ee 2 bit eechk abz output disable ( hi - z ) xirq 0 0 x x filter stat _ cfg enz enc irq ( spi status byte ) z capture event multi - cycle counter rollover stat _ val . x stat _ latch . x stat _ sel . x stat _ ie . x xirq irq ( spi status byte ) stat _ hiz . x abz output disable ( hi - z )
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 60/ 80 the complete status and fault logic of the IC-TW28 is shown in figure 34 . bits shown with an "x" indicate that these bits function as switches or gates as shown in figure 33 . figure 34: IC-TW28 status and fault logic the stat_fatal register contains three bits that in- dicate fatal internal conditions (interrupt error, eeprom double-bit error, eeprom checksum error) . if any of these conditions are active, the IC-TW28 activates the interrupt request bit (irq), activates the interrupt request output (xirq), and disables the abz outputs (output shutdown, output tristate). in stand-alone applications, these fatal fault conditions must be cleared by cycling power to the IC-TW28. in hosted applications, the host processor can reset the IC-TW28 by toggling the reset input (xrst) or by using the start/restart command. see command on page 50 . a position capture event and/or multi-cycle counter rollover can also be confgured to interrupt the host pro- cessor. stat_cfg.enc enables an interrupt when the multi-cycle counter rolls over; stat_cfg.enz enables an interrupt on a position capture event (as confgured by zero0.mode). p r e l i m i n a r y p r e l i m i n a r y stat _ val stat _ latch x x x x x x x x stat _ sel x x x x x x x x stat _ ie x x x x x x x x stat _ hiz res adapt scamp lagfatl inclim laglim falarm oflow read - only status latched status ( write to clear ) interrupt source select interrupt enable 0 0 0 0 0 stat _ fatal interr ee 2 bit eechk abz output disable ( hi - z ) xirq 0 0 x x filter stat _ cfg enz enc irq ( spi status byte ) z capture event multi - cycle counter rollover stat _ val . x stat _ latch . x stat _ sel . x stat _ ie . x xirq irq ( spi status byte ) stat _ hiz . x abz output disable ( hi - z )
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 61/ 80 the status and fault logic of the IC-TW28 in pin confgu- ration mode is shown in figure 35 . figure 35: IC-TW28 pin confguration mode status and fault logic in pin confguration mode, xirq is typically used to drive a fault led. stat_sel = 0x00, selecting the stat_val register as the fault source for all conditions. faults are enabled for scamp, lagfatl, and laglim; any fatal condi- tion also activates xirq. thus, the fault led is activated only when the input amplitude is out of bounds or there is a fatal condition. for stat_hiz = 0x00 only a fatal condition disables the abz outputs. p r e l i m i n a r y p r e l i m i n a r y stat _ val stat _ sel 0 0 1 1 0 1 0 0 stat _ ie res adapt scamp lagfatl inclim laglim falarm oflow read - only status interrupt source select interrupt enable 0 0 0 0 0 stat _ fatal interr ee 2 bit eechk abz output disable ( hi - z ) 0 x 00 xirq
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 62/ 80 sin/cos amplitude monitor the IC-TW28 continuously monitors the amplitude of the sin/cos input signals by calculating the quantity sin 2 + cos 2 . in pin confguration mode, this value is used to activate xirq if the input signal amplitude be- comes less than 60% or more than 120% of its cali- brated value. in serial confguration mode, the ampli- tude monitor must be specifcally confgured and cali- brated. to confgure the amplitude monitor, enter a value for the desired sin/cos amplitude sin 2 + cos 2 in the sc_amp_targ register. during auto calibration, the IC-TW28 adjusts the sin/cos analog and digital gain values to provide this sin/cos level after analog- to-digital conversion. the recommended value is sc_amp_targ = 150 (0x96). next, enter values for the amplitude limits in the sc_amp_low and sc_amp_high registers. these values should be the lowest and highest acceptable sin/cos amplitudes respectively. for example, to set the amplitude monitor limits at 10% with an amplitude target of 150, enter the following values: sc _ amp _ high = 150 + 10% = 165 sc _ amp _ low = 150 ? 10% = 135 in operation, the scamp bit (bit 5) in the stat_val and stat_latch registers is set whenever the measured sin/cos amplitude, sc_amp, is outside these limits: 135 > sc _ amp > 165 confgure the desired action to take when this condition occurs using the scamp bit (bit 5) in the stat_sel, stat_ie, and stat_hiz registers. finally, calibrate the sin/cos amplitude to the target value using auto calibration: activate the xcalib pin or send an auto calibrate sin/cos (0x21) or auto cali- brate all (0x23) command. after calibration, verify that sc_amp = sc_amp_targ. excessive error detection the IC-TW28 continuously calculates the residual off- set, balance, and phase error of the corrected sin/cos signals. these residues represent the uncorrected sig- nal error in the sin and cos channels, and are typically zero when auto adaption is used. in applications where auto adaption cannot be used, the error residue values allow sensor signal quality to be monitored in a host processor or microcontroller. programmable threshold values allow activating xirq should any of the residue values become excessive. this excessive error condition is indicated by the res bits (bit 7) in the stat_val and stat_latch regis- ters. stat_val.res residue register residue threshold register s_ofs_res sc_ofs_th c_ofs_res sc_bal_res sc_bal_th sc_ph_res sc_ph_th z_ph_res z_ph_th table 122: correction residue threshold exceeded to confgure excessive error detection, enter values for the four threshold (th) registers. these values are the maximum error residue that should be allowed during operation. in operation, stat_val.res and stat_latch.res are set whenever the absolute value of one of the residues exceeds its corresponding threshold. specif- cally, whenever | s _ ofs _ res | > sc _ ofs _ th | c _ ofs _ res | > sc _ ofs _ th | sc _ bal _ res | > sc _ bal _ th | sc _ ph _ res | > sc _ ph _ th | z _ ph _ res | > z _ ph _ th confgure the desired action to take when this condi- tion occurs using the res bit (bit 7) in the stat_sel, stat_ie, and stat_hiz registers. store all these val- ues to the internal eeprom using the write confgura- tion to eeprom command (0x11). p r e l i m i n a r y p r e l i m i n a r y
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 63/ 80 excessive adaption detection in serial confguration mode, the IC-TW28 can be confg- ured to detect when one or more of the error correction parameters changes too much due to auto-adaption during operation. this excessive adaption condition is indicated by the adapt bits (bit 6) in the stat_val and stat_latch registers. to confgure excessive adaption detection, values for the four base registers and three limit registers must be entered and stored in the eeprom. stat_val.adapt correction register base register limit register s_ofs_cor s_ofs_base sc_ofs_lim c_ofs_cor c_ofs_base sc_bal_cor sc_bal_base sc_bal_lim sc_ph_cor sc_ph_base sc_ph_lim table 123: adaption limit exceeded after auto calibration has been used to set the nominal error correction values in the correction (cor) regis- ters, use the write cor to base command (0x12) to copy these values to the corresponding base registers. then enter values for the three limit (lim) registers representing the maximum error correction parameter deviation that should be allowed. in operation, stat_val.adapt and stat_latch.adapt are set whenever the absolute value of the difference between one of the correction values and its corre- sponding base value exceeds the corresponding limit. specifcally, whenever | s _ ofs _ cor ? s _ ofs _ base | > sc _ ofs _ lim | c _ ofs _ cor ? c _ ofs _ base | > sc _ ofs _ lim | sc _ bal _ cor ? sc _ bal _ base | > sc _ bal _ lim | sc _ ph _ cor ? sc _ ph _ base | > sc _ ph _ lim confgure the desired action to take when this condi- tion occurs using the adapt bit (bit 6) in the stat_sel, stat_ie, and stat_hiz registers. store all these val- ues to the internal eeprom using the write confgura- tion to eeprom command (0x11). p r e l i m i n a r y p r e l i m i n a r y
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 64/ 80 device serial number and user data each IC-TW28 comes from ic-haus programmed with a unique serial number. this can be used for tracking devices or when contacting ic-haus for support. the device serial number is a four-byte value stored at addresses 0x00 - 0x03 in the internal eeprom. this value may be read via the spi port or the encoder link interface using the following sequence: 1. write 0x00 (frst address of four-byte serial num- ber) to ee_addr (0x0601). 2. write 0x13 (eeprom read command) to com- mand (0x4000). 3. wait 1 ms or until command = 0. 4. read serial number byte value from ee_data (0x0602). 5. read ee_stat (0x0603) to determine if ee_data is valid. if ee_stat 1, the value in ee_data is valid. if ee_stat > 1, the value in ee_data is not valid. see ee_stat on page 49 for more information. repeat this sequence for all four bytes, incrementing the address written to ee_addr in step 1 each time. do not write to the serial number bytes 0x00 - 0x03 in the internal eeprom. four additional bytes are available in the internal eep- rom for storing user data. these can be used to store the product model and serial number, manufacturing date, etc. the four user data bytes are stored at addresses 0x3c - 0x3f in the internal eeprom. these values can be written via the spi port or the encoder link interface using the following sequence: 1. write 0x01 to the test register (0x000b) to un- lock the eeprom. 2. write 0x3c (address of frst user data byte) to ee_addr (0x0601). 3. write the desired user data byte value to ee_data (0x0602). 4. write 0x14 (eeprom write command) to com- mand (0x4000). 5. wait 20 s or until command = 0. repeat this sequence for all four bytes, incrementing the address written to ee_addr in step 1 each time. after writing the user data bytes, lock the eeprom by writing 0x00 to the test register (0z000b) or by cycling the xrst input. these four user data bytes may be read via the spi port or the encoder link interface using the following sequence: 1. write 0x3c (address of frst user data byte)to ee_addr (0x0601). 2. write 0x13 (eeprom read command) to com- mand (0x4000). 3. wait 1 ms or until command = 0. 4. read user data byte value from ee_data (0x0602). 5. read ee_stat (0x0603) to determine if ee_data is valid. if ee_stat 1, the value in ee_data is valid. if ee_stat > 1, the value in ee_data is not valid. see ee_stat on page 49 for more information. repeat this sequence for all four bytes, incrementing the address written to ee_addr in step 1 each time. p r e l i m i n a r y p r e l i m i n a r y
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 65/ 80 z test mode and calibration when a zero or index sensor is used, the z channel must be properly confgured and calibrated to ensure one and only one z output pulse per input revolution,. confguration consists of setting the z channel com- parator threshold; calibration is performed automati- cally using auto calibration. see calibration overview on page 27 for more information. in serial confguration mode, the z channel comparator threshold is set via zero0.threshold and the result- ing internal z gating window can be observed on the b outputs in z test mode. the width of the z output pulse is set via zero1.zwidth. in pin confguration mode, the z channel comparator threshold is fxed at zero0.threshold = 10 (42% of the amplitude of the zero input signal) and zero1.zwidth = 0 (z output is 1 ab edge wide). figure 36: z calibration to confgure the z channel in serial confguration mode, enter values for zero0.threshold and zero1.zwidth using the spi port or the encoder link interface. the recommended starting values are 10 and 0 respectively C the same values used in pin confguration mode. calibrate the z channel by initiating auto calibration and providing sin/cos and zero inputs as explained in cali- bration overview on page 27 . during z auto calibration, the IC-TW28 tunes the z offset (z_ofsa_cor) and gain (z_gna_cor) so that the calibrated zero input signal (blue) spans 75% of the 8-bit z channel adc range. this results in a digitized amplitude of 96 as shown in figure 36 . auto z calibration also tunes zphase (not shown) to cen- ter the z output pulse in the z gating window such that t 1 = t 2 as shown in figure 36 . this provides the widest possible margin for changes in the width of the z gating window (gatewidth) during operation due to tempera- ture and other operating conditions. see phase_lsb on page 44 for more information on zphase . when calibration is complete, terminate auto calibration as explained in calibration overview on page 27 . as shown in figure 36 , the internal z gating window is high when the calibrated zero input signal is above zthreshold and low otherwise. zthreshold = 4 zero 0. threshold the actual threshold in percent of the amplitude of the zero signal is 4 zero 0. threshold 96 100% thus, if zero0.threshold = 10, zthreshold = 40 and the actual z threshold is at 42% of the zero signal. p r e l i m i n a r y p r e l i m i n a r y internal z gating window pin outa pin outb z t 1 t 2 calibrated zero input available on b outputs in z test mode 96 C 96 0 zthreshold zwidth gatewidth
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 66/ 80 zthreshold C along with the form of the zero input signal C determines the width of the internal z gating window (gatewidth) . to guarantee one and only one z output pulse per revolution, gatewidth must be at least as wide as the desired width of the z output pulse and no longer than two input cycles minus the width of the z output pulse under all operating conditions as shown in figure 37 . figure 37: z gating window requirements the z gating window transitions may occur anywhere in the gray area shown. specifcally, zwidth [ ? ] < gatewidth ? < 720 ? ? zwidth [ ? ] where zwidth [ ? ] is the width of the z output pulse and gatewidth [ ? ] is the width of the internal z gating window, both in input cycle degrees. note that the width of the z output pulse is confgured in ab edges in the IC-TW28 and must be converted to input cycle degrees for use in the formula above. zwidth [ ? ] = 90 ? inter zwidth to ensure that the internal z gating window is the proper width, it can be observed on the b outputs using z test mode. invoke z test mode by setting test.z = 1 using the spi port or the encoder link interface. adjust the zero0.threshold value for the desired gatewidth [ ? ] and then run auto calibration for the z channel again and verify that the z output pulse is centered in the z gating window. it is important to always run z channel auto cal- ibration after making any changes to zero0.threshold to guarantee proper centering of the z output pulse in the z gating window. terminate z test mode by setting test.z = 0. see test on page 40 for more information. when a zero or index sensor is not used and a z output once per input cycle is required, connect zero+ to 3.3 v and zero- to ground. this is useful in on-axis applications where one input revolution produces only one input cycle. in this case, the z gating window is always high ( gatewidth = 360 ), automatic z calibration cannot be used, and zphase must be set manually to place the z output in the desired relationship to the sin and cos inputs. see phase_lsb on page 44 for more information on zphase . in same phase or absolute burst startup modes, the state of the ab outputs when the z output is active is determined by the polarity bits output.apol and out- put.bpol. the polarity of the z output is determined by output.zpol. see startup modes on page 58 and output modes, directions, and polarities on page 56 for more information. p r e l i m i n a r y p r e l i m i n a r y zwidth sin cos 360 0 sensor input angle outz zpos zwidth outa outb 1 input cycle zpos z gating signal sin cos z output 1 input cycle zphase z gating window 90 180 270 0 360 internal z pulse zthreshold
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 67/ 80 multi-cycle counter the IC-TW28s 14-bit multi-cycle counter continuously tracks up to 16,383 input cycles during operation. in serial confguration mode, the multi-cycle counter can be read and written via the spi port and can be confg- ured to reset on the rising edge of the z output. the multi-cycle counter cannot be read using the encoder link interface. to use the multi-cycle counter, select whether or not the multi-cycle counter is to be reset whenever the z output is activated using zero0.clr. if zero0.clr = 0, the mul- ti-cycle counter is never cleared. if zero0.clr = 1, the multi-cycle counter is cleared (set to zero) whenever the z outputs are activated. clearing the counter on the z output is useful to ensure that multi-cycle counter never rolls over and is always in sync with the external system. the multi-cycle counter value is a 14-bit number repre- senting the number of input cycles seen by the IC-TW28 since it was started or restarted or since the multi-cy- cle counter was reset. the multi-cycle counter value and the 10-bit interpolated angle within an input cycle are always read together as a 24-bit position value. see response packet formats on page 32 for more information. the multi-cycle counter rollover occurred (mcr) bit in the spi status byte is set whenever the multi-cycle counter passes through a multiple of 4,096 cycles. for example, with continuous positive rotation, the mcr bit is set when the counter passes through values of 4,096, 8,192, 12,288, and 0. hysteresis of 4,096 cycles is employed to avoid setting the mcr bit multiple times due to direction reversals. for example, after the mcr bit is set at 4,096 cycles with positive rotation, if the direction of rotation reverses, mcr will not be set again passing through 4,096, but will be set again when pass- ing through 0. the multi-cycle counter rollover occurred bit is reset whenever the position is read. if multiple rollovers occur before the position is read, the multi-cycle counter rollover lost (mcrl) bit is set. this indicates that a previous multi-cycle counter rollover was not acknowledged. this bit is reset whenever the position is read. the host microprocessor or microcontroller can poll the multi-cycle counter rollover occurred (mcr) bit in the spi status byte to determine when a counter rollover has occurred. a multi-cycle counter rollover can also be confgured to interrupt the host processor by asserting xirq. see stat_cfg on page 46 for more information. the multi-cycle counter can be preset by writing a value to it. this is useful to synchronize the multi-cycle counter with an external absolute system, for exam- ple. write the new value for the multi-cycle counter and the multi-cycle counter synchronization bit using the multi-cycle counter write command via the spi port. see multi-cycle counter write on page 31 for more information. the multi-cycle counter synchronization bit is used to ensure proper updating of the multi-cycle counter when the sin/cos inputs are moving or if the external absolute system in misaligned. it indicates in which sector (half period) of an input cycle the sensor angle is expected to be when the multi-turn position is updated. this al- lows correcting the new multi-turn counter value if the external absolute system in misaligned by up to 90 ? of an input cycle or if the sin/cos inputs move during the presetting of the multi-cycle counter. multi-cycle counter synchronization bit: mcs value description 0 0 ? (0) sensor angle < 180 ? (511) 1 180 ? (0) sensor angle < 360 ? (1023) table 124: multi-cycle counter synchronization bit if the sin/cos input sector indicated by the multi-cycle counter synchronization bit matches the actual sin/cos input sector, the multi-turn counter is preset to the value in the command. if not, the multi-turn counter is preset to the value in the command 1 because the input has moved to the next (or previous) cycle. specifcally, if mcs = 0 and 270 ? (768) sensor angle < 360 ? (1023), the multi-cycle counter is preset to the value in the command C 1. if mcs = 1 and 0 ? (0) sensor angle 90 ? (256), the multi-cycle counter is preset to the value in the command + 1. otherwise, the multi-cycle counter is preset with the value in the command, as shown in figure 38 . figure 38: multi-cycle counter synchronization p r e l i m i n a r y p r e l i m i n a r y 0 90 180 270 0 90 180 270 mcs = 0 mcs = 1 0 C 1 + 1 0
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 68/ 80 for example, if the sensor angle is between 0 ? and 180 ? when the multi-cycle counter write command is initiated, then mcs is set to 0 in the command. when the command is executed by the IC-TW28 and the mul- ti-cycle counter is preset, if the sensor angle is between 0 ? and 270 ? , it must have moved clockwise across 0 ? and into the previous input cycle. thus, the multi-cycle counter is preset to one cycle less than the commanded value (-1). therefore, it is necessary to know the sensor angle sector (half-period) prior to executing the multi-cycle counter write command. in the absence of an exter- nal absolute system, the sin/cos input sector can be determined by the msb of the 10-bit sensor angle. an external absolute system must supply its own sector information. the complete sequence for presetting the multi-cycle counter using the multi-cycle counter write command in the absence of an external absolute system is as follows: 1. host sends a null write (wm = 0) command with rm = 0 (position and status read) or rm = 3 (regis- ter value and angle read) in the spi control byte. 2. host sends another command while reading back the response packet. 3. host sends a multi-cycle counter write command (wm = 1) with the new multi-cycle counter value and mcs = step 2 response packet bit 9. see spi communication on page 29 for more infor- mation. if an external absolute system supplies the multi-cycle counter synchronization bit, steps 1 and 2 above are omitted. the multi-cycle counter atomic read/write command presets the multi-turn counter and reads back the sen- sor/angle at the same instant to verify that the multi-cy- cle counter was properly preset. the complete sequence for presetting the multi-cycle counter using the multi-cycle counter atomic read/write command in the absence of an external absolute sys- tem is as follows: 1. host sends a null write (wm = 0) command with rm = 0 (position and status read) or rm = 3 (reg- ister value and position read) in the spi control byte. 2. host sends another command while reading back the response packet. 3. host sends a multi-cycle counter atomic write command (wm = 2) with the new multi-cycle counter value and mcs = step 2 response packet bit 9. 4. host sends a null write (wm = 0) command with rm = 0 (position and status read) or rm = 3 (reg- ister value and position read) in the spi control byte. the multi-cycle counter is preset at the same instant as the position is read. 5. host sends another command while reading back the response packet. the returned sensor angle is the angle indicated by the sin/cos inputs when the multi-turn counter was preset. 6. host verifes that the sin/cos input sector (half-pe- riod) when the multi- turn counter was preset was correct. if not, the multi-cycle counter must be preset again. see spi communication on page 29 for more infor- mation. if an external absolute system supplies the multi-cycle counter synchronization bit, steps 1 and 2 above are omitted. p r e l i m i n a r y p r e l i m i n a r y
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 69/ 80 position capture in serial confguration mode, the full 24-bit position value (10 bits of interpolated angle within an input cycle plus 14 bits of multi-cycle count) of the IC-TW28 can be captured on the rising edge of the z output or the zero input gating window and read out over the spi port. to use the position capture feature of the IC-TW28, the interpolation factor must be set to 256 (inter = 0). see inter1 on page 41 for more information. select the desired position capture event using zero0.mode. if zero0.mode = 0, the position is captured whenever the z outputs are activated. if zero0.mode = 1, it is captured whenever the internal z gating window is activated. capturing position on the z output is useful with distance-coded index quasi-ab- solute systems or to ensure that the distance (angle) between z pulses is correct and consistent. inconsis- tent distance or angle between successive z pulses may indicate a fault in the external system. capturing position on the z gating window allows the zero inputs to be used for touch probe or registration applications. the position value captured is the most-recently up- dated internal position when the selected capture event occurs. the position value is updated internally every 320 ns, synchronously with the activation of the z out- puts. thus, if zero0.mode = 1 (position capture on z gating window active), the captured position may be in error by the distance traveled during the update time. if zero0.mode = 0 (position capture on z outputs active), there is no uncertainly in the captured position. after the confgured capture event has occurred, the captured position can be read via the spi port. see spi communication on page 29 for more information. captured position cannot be read using the encoder link interface. the zero capture occurred (zc) bit in the spi status byte indicates that a capture event has occurred and that the captured position is valid. this bit is reset after the captured position is read. if multiple capture events occur before the captured position is read, the zero capture lost (zcl) bit in the spi status byte is set. this indicates that the captured position from one or more previous zero capture events has been lost. this bit is also reset after the captured position is read. the host microprocessor or microcontroller can poll the zero capture (zc) bit in the spi status byte to de- termine when a zero capture event has occurred. a zero capture event can also be confgured to inter- rupt the host processor by asserting xirq by setting stat_cfg.enz = 1. see stat_cfg on page 46 for more information. p r e l i m i n a r y p r e l i m i n a r y
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 70/ 80 filter configuration the signal path flter is used to reduce noise and jitter in the ab and uvw outputs and the position value read via the spi port. it can also reduce angle lag at constant speed due to interpolator latency. in pin confguration mode, three flter settings (light, medium, and heavy) are available. in serial confguration mode, the flter must be confgured. the flter is implemented as a pi servo loop with op- tional feedback path delay as shown below. figure 39: signal path filter filt_k.kp determines the proportional (p) gain of the loop, which sets the noise and jitter bandwidth of the flter. lower filt_k.kp values provide higher p gain and higher flter bandwidth (less fltering). higher val- ues provide more fltering and less output noise and jitter. filt_k.ki determines the integral (i) gain of the loop, which affects the amount of flter lag under acceler- ation. any non-zero filt_k.ki value also provides zero flter lag at constant sensor input velocity. lower filt_k.ki values provide higher i gain and less flter lag under acceleration. however, lower filt_k.ki values can also produce position overshoot on deceleration. filt_k.ki = 3 is the recommended value. note that filt_k.kp = 0 with filt_k.ki = 1 is unstable and therefore should not be used. also, if filt_k.ki = 0, filt_k.kp must also be 0. filt_cfg.fb determines whether or not the loop feed- back path includes the 640 ns delay or not. this delay is used to reduce the position lag at constant sensor input velocity due to interpolator latency. the intrinsic interpolator latency of the IC-TW28 depends on the value of main_cfg.noise. if filt_cfg.fb = 1, position lag at constant input velocity due to interpolator latency is reduced by 40% when main_cfg.noise = 0 and by 22% when main_cfg.noise = 1. note that when feed- back delay is used (filt_cfg.fb = 1), filt_k.kp 3 is required, otherwise the flter may become unstable. filt_cfg.auto determines whether the p gain of the flter is static or dynamic. the normal setting is filt_cfg.auto = 0, in which case the p gain of the flter loop is static and as set by filt_k.kp. in general, flter confguration is a compromise between fast response to sensor input changes and smoothness of the outputs. it is recommended to start with maxi- mum flter bandwidth (least fltering) since this gives the fastest response of the outputs to changes in the sin/- cos inputs. filtering can then be increased as required to reduce output noise and jitter. experimentation may be necessary to determine the optimal confguration. to confgure the signal path flter for fastest response (least fltering), use the settings shown below. fastest response filter confguration parameter value description filt_k.kp 0 maximum p gain filt_k.ki 3 nominal i gain filt_cfg.fb 0 no feedback path delay filt_cfg.auto 0 static flter kp table 125: fastest response filter confguration increase filt_k.kp as required to reduce output noise and jitter. enable the feedback path delay (filt_cfg.fb = 1) as required to reduce the position lag at constant sensor input velocity due to interpolator latency. the recommended flter confgurations that correspond to light, medium, and heavy fltering in pin confguration mode are shown below. recommended filter confgurations filtering filt_k.kp filt_k.ki filt_k.fb filt_k.auto light 2 3 0 0 medium 4 3 0 0 heavy 6 3 0 0 table 126: recommended filter confgurations p r e l i m i n a r y p r e l i m i n a r y filt _ k . kp filt _ k . ki - pgain - 1 s pgain - igain 1 s 1 s pgain 14 16 from lut to hysteresis delay - igain 1 s 1 s delay 640 ns delay filter lag filt _ cfg . auto filt _ cfg . fb filter input filter output
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 71/ 80 spi only output mode in spi only output mode, the abz/uvw outputs are dis- abled and position (angle) is read via the spi interface. see spi only on page 56 for information on confguring spi only output mode. spi only output mode is useful in embedded applica- tions because the ab output frequency limit (12.5 mhz) is no longer in effect, enabling higher input frequen- cies to be used. in addition, the integrated multi-cy- cle counter allow the host processor or microcontroller to sample the position less frequently than would oth- erwise be necessary while still preserving directional information. position is read via the spi port by sending an spi command with rm = 0 or 3 in the spi control byte. see spi communication on page 29 for more information. because of the overlapped packet structure used by the spi port, it takes two commands to read the posi- tion: one command to request the position, and another command to read it back, as shown in figure 40 . figure 40: spi position read note that the data in response packet 1 is sampled on the falling edge of xss at the beginning of command packet 2, not command packet 1. therefore, the com- munication latency in reading position via the spi port is the length of one 32-bit spi command, not two. when multiple IC-TW28s are chained together with a single host microprocessor or microcontroller, the ex- tended communication packet structure provides simul- taneous position sampling for all devices. see chaining multiple IC-TW28s on page 76 for more information. in spi only output mode, the 24-bit position is internally updated every 20 ns. thus, the position value read via the spi port may be up to 20 ns old at any given read. therefore, sequential position values may exhibit a jitter equivalent to the distance (angle) moved by the sin/cos inputs in 20 ns. in most applications, position needs to be read back by the host microprocessor or microcontroller at a fxed rate. this is most easily accomplished using a se- quence of null write (read only) commands with rm = 0. at maximum spi clock frequency, a new command can be sent C and a new position value read C every 2 s. if the sin/cos inputs are moving at 500 khz, they cover a distance of 1 input cycle per spi sample. 2 s spisample 500, 000 inputcycles second = 1.0 cycles the position uncertainty due to the internal position update rate is 0.01 input cycles (3.6 ? ). 20 ns update 500, 000 inputcycles second = 0.01 cycles thus the sampled position values will have a jitter of 3.6 ? or 0.01 100% = 1%. slower input speeds and/or lower spi sampling rates provide a proportionally lower jitter percentage. note that the adc values are internally updated only every 320 ns. thus, when reading a sin, cos, and zero adc read response packet, the jitter is 0.16 cycles (57.6 ? ) or 0.16 100% = 16%. 320 ns update 500, 000 inputcycles second = 0.16 cycles p r e l i m i n a r y p r e l i m i n a r y response si so xss 32 bits 32 bits command command 1 1 2 0 response to command 1 sampled here
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 72/ 80 led intensity control in serial confguration mode, the calculated sin/cos am- plitude value, sc_amp, can also be used to drive the led output to control the intensity of an optical sensor led. this maintains the sin/cos signals at their cali- brated amplitude in the presence of led ageing and varying application conditions. to use led intensity control, enable the led output by setting led_cfg.en = 1 and enable led intensity con- trol by setting led_cfg.auto = 1. set led_start to provice a nominal led current at startup as explained following. confgure the amplitude monitor as explained in sin/cos amplitude monitor on page 62 to set the desired amplitude limits for led control. set led_cfg.buffer as required to provide the desired led intensity hysteresis as explained following. in operation, the led intensity control increases the duty cycle of the led pwm signal whenever sc _ amp < ( sc _ amp _ low + led _ cfg . buffer ) and decreases it whenever sc _ amp > ( sc _ amp _ high ? led _ cfg . buffer ) select an led_cfg.buffer value to provide the desired hysteresis for the led intensity as shown in figure 41 . see led_cfg.buffer on page 39 for more information on the available buffer values. figure 41: led intensity hysteresis in operation, the led intensity control changes the led pwm value by 1 at a rate of 500 hz as required to maintain sc_amp within the led intensity hysteresis area shown in figure 41 . specifcally, the led intensity hysteresis is sc _ amp _ high ? sc _ amp _ low ? 2 led _ cfg . buffer for example, if sc_amp_low = 135 and sc_amp_high = 165, a cfg_led.buffer value of 0 provides led intensity hysteresis of 165 ? 135 ? 2 8 = 14 in this case, led intensity is controlled so that sc _ amp = 165 + 135 2 14 2 = 150 7. note that the calculated led intensity hysteresis must be a positive value, otherwise the buffer zones overlap resulting in undefned operation of the led intensity control. thus, for proper operation, led _ cfg . buffer < sc _ amp _ high ? sc _ amp _ low 2 continuing the example above, led_cfg.buffer = 0 is the only possible choice, since 165 ? 135 2 = 15 to use a larger buffer value, sc_amp_low must be decreased, sc_amp_high must be increased, or both. if maximum led current is less than 15 ma under all operating conditions and can be supplied by a 3.3 v supply, connect the led directly to the IC-TW28 as shown in figure 42 . this is typically the case for red leds. figure 42: direct led connection confgure the led output as open-drain by setting led_cfg.odrain = 1. confgure the led polarity to match the specifc connection as shown. if maximum led current is more than 15 ma or the maximum led current cannot be supplied by a 3.3 v supply, use an external fet to connect the led to the IC-TW28 as shown in figure 43 . this is typically the case for blue leds due to their higher v f . p r e l i m i n a r y p r e l i m i n a r y sc_amp_low sc_amp_high led_cfg.buffer led_cfg.buffer led intensity hysteresis led 3 . 3 v ic - tw 28 c r led ic - tw 28 c r negative polarity led _ cfg . pol = 1 positive polarity led _ cfg . pol = 0 3 . 3 v led ic - tw 28 c r positive polarity led _ cfg . pol = 0 led ic - tw 28 3 . 3 v c r negative polarity led _ cfg . pol = 1
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 73/ 80 figure 43: high current/voltage led connection confgure the led output as push-pull by setting led_cfg.odrain = 0. confgure the led polarity to match the specifc connection as shown. select the desired led pwm frequency using led_cfg.freq (see led_cfg.freq on page 39 ). in general, use the highest pwm frequency (97.6 khz) to minimize flter capacitor size by select- ing led_cfg.freq = 3. lower pwm frequencies may be selected if interference is a problem. size the current-limiting resistor and flter capacitor us- ing the following formulas: r [ k ? ] = 3.3 ? v f [ volts ] i max [ ma ] c [ f ] > 1 2 (led_cfg.freq+3) r [ k ? ] where v f is the forward voltage drop of the led and i max is the maximum forward current of the led or 15 ma, whichever is less. this gives a flter cutoff one decade below the pwm frequency. for example, with the ic-sd85 infrared led ( v f = 1.4 v and i max = 20 ma), r = 127 ? and c > 120 nf for led_cfg.freq = 3. once the current-limiting resistor has been chosen to enforce the maximum led current, led_start can be calculated to provide the desired nominal led oper- ating current as led _ start = int i nom i max 256 for example, for a nominal led current of 8 ma with the ic-sd85, led _ start = int 8 15 256 = 137 note: as the IC-TW28 runs at 3.3 v, the led output may not be able to power a blue led because v f may exceed 3 v. to operate the led from 5 v, use an external n-channel fet as shown in figure 43 (right side). this circuit also avoids an overvoltage at pin led (v(led) < avdd + 0.3 v is required). p r e l i m i n a r y p r e l i m i n a r y led 3 . 3 v ic - tw 28 c r led ic - tw 28 c r negative polarity led _ cfg . pol = 1 positive polarity led _ cfg . pol = 0 3 . 3 v ... 5 v led ic - tw 28 c r positive polarity led _ cfg . pol = 0 led ic - tw 28 3 . 3 v c r negative polarity led _ cfg . pol = 1 led ic - tw 28 c r negative polarity led _ cfg . pol = 1 3 . 3 v 5 v
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 74/ 80 post-ab divider the IC-TW28 includes an optional divider after the in- ternal abz output generator that can be used to reduce (divide) the confgured interpolation by a factor of 1-8. this is useful when the desired output resolution is not an integer multiple of the input resolution. for example, with an input resolution of 24 sin/cos cy- cles per revolution, it is impossible to achieve an output resolution of 1,024 ab cycles per revolution (cpr) with- out the post-ab divider since (4 1024)/24 is not an integer. the required interpolation factor in this case is 1024/24 = 42. 6 . this value can be achieved, how- ever, using an interpolation factor of 128 and a post-ab divider value of 3 since 128/3 = 42. 6 . thus, an output resolution of 512 cpr is possible with an input reso- lution of 24 using inter = 128 (inter(9:0) = 512) and div = 3 (inter1.div = 2). see inter1 on page 41 for more information. the post-ab divider can also be used to achieve low value and fractional interpolation factors that are not na- tive to the IC-TW28. the lowest interpolation factor that can be directly programmed is inter = 2 (inter(9:0)) = 8). lower effective interpolation values (intereff) can be achieved as shown below. intereff value inter div inter(9:0) inter1.div 0.25 2 8 8 7 0.50 2 4 8 3 0.75 3 4 12 3 1.00 2 2 8 1 1.25 5 4 20 3 1.50 3 2 12 1 1.75 7 4 28 3 table 127: effective interpolation note that the maximum ab output frequency (fab) is inversely proportional to the post-ab divider value (div) . see inter1 on page 41 and ablimit on page 42 for more information. figure 44: post-ab divider as shown in figure 44 , the z output bypasses the post-ab divider. therefore, any confgured synchro- nization of the z output to the a and b outputs may be lost when using the post-ab divider. see startup modes on page 58 for more information. note also that the actual width of the z output (zwidth) in ab edges is inversely proportional to the post-ab divider value (div) . see zero1 on page 42 for more information. p r e l i m i n a r y p r e l i m i n a r y post - ab divider ab generator outa outb divide by 2 shown . outz
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 75/ 80 bussing multiple IC-TW28s multiple IC-TW28 slaves can be used with a single spi host in a traditional spi bus connection. in this case, sclk, si, and so on all devices are connected to- gether and each device uses a separate slave select (xss) signal, as shown below. figure 45: spi bus connection of multiple IC-TW28s in operation, the host initiates communication with one of the IC-TW28s by activating the appropriate chip se- lect (xcs) and then clocking a 32-bit spi command to the slave input, si, while at the same time reading the 32-bit response to the previous command on the slave output, so. this behavior is the same as with a single IC-TW28. note that with a bussed connection, the host communicates with only one IC-TW28 slave at a time. as shown, the interrupt request outputs (xirq pins) of the bussed IC-TW28s are connected to their own interrupt request input on the host processor. it is recommended to use push-pull xirq outputs (main_cfg.irqpp = 1) with bussed ic- tw28s. p r e l i m i n a r y p r e l i m i n a r y xss sclk si xss sclk si xss sclk si xcs 1 sclk mo xirq 1 host p ic - tw 28 1 ic - tw 28 2 ic - tw 28 3 so so so mi xss sclk si so xss sclk si so xss sclk si so xcs sclk mo mi host p ic - tw 28 1 ic - tw 28 2 ic - tw 28 3 xirq xirq xirq xirq xcs 2 xcs 3 xirq xirq xirq xirq 2 xirq 3 3 . 3 v
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 76/ 80 chaining multiple IC-TW28s multiple IC-TW28 slaves can also be chained together using a single spi host. in this case, all devices are accessed together as a group and all data is read back together by the host in an extended response packet. in a chained confguration, sclk and xss on all de- vices are connected together while si and so, are linked from one device to the next, as shown below. the xirq outputs are confgured as open-drain and wire-ord together to a common interrupt request input on the host. figure 46: chained connection of multiple IC-TW28s in operation, the host initiates communication with all of the IC-TW28s by activating the chip select output (xcs) and sending three consecutive spi commands by clocking 3 32 = 96 bits to the beginning of the si/so chain (mo), while at the same time reading the 96-bit response to the previous command from the end of the si/so chain (mi). as long as the xss input of the IC-TW28s is held low, data is shifted through the chained devices from si to so. after all commands have been loaded to the chained devices, the host de-activates xss to execute the commands simultane- ously. this extended packet communication structure is shown in figure 47 . with the interrupt request outputs wire-ord as shown in figure 46 , the xirq outputs of all IC-TW28s must be confgured as open-drain (main_cfg.irqpp = 0) and an external pull-up resistor is required, as shown. figure 47: extended communication packet structure with chained IC-TW28s p r e l i m i n a r y p r e l i m i n a r y xss sclk si xss sclk si xss sclk si xcs 1 sclk mo xirq 1 host p ic - tw 28 1 ic - tw 28 2 ic - tw 28 3 so so so mi xss sclk si so xss sclk si so xss sclk si so xcs sclk mo mi host p ic - tw 28 1 ic - tw 28 2 ic - tw 28 3 xirq xirq xirq xirq xcs 2 xcs 3 xirq xirq xirq xirq 2 xirq 3 3 . 3 v response response response response si so xss 32 bits 32 bits 32 bits 32 bits 32 bits command command command command command 3 command 2 command 1 32 bits 32 bits 32 bits command 3 command 2 command 1 response 3 response 2 response 1 32 bits 32 bits 32 bits response 3 response 2 response 1 xss si so 1 1 2 2 3 0 4 4 5 command 3 extended response packet to previous extended command packet extended response packet to extended command packet response si so xss 32 bits 32 bits command command 1 1 2 0 response to command 1 sampled here
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 77/ 80 design review: function notes IC-TW28 x no. function, parameter/code description and application notes refer to IC-TW28 datasheet release b1, 2016. table 128: notes on chip functions regarding IC-TW28 chip release x. IC-TW28 w no. function, parameter/code description and application notes 1 power supply rise time extending the power-on reset by rc components at pin xrst is recommended for all designs (see fig. 10 and 11). if pin xrst is directly connected to vdd, vdd rise time (from 0 v to 3.3 v) should be no less than 40 s. 2 elec. characteristics: items 902, 903 the specifed short-circuit current limits can be exceeded at low/high temperatures. table 129: notes on chip functions regarding IC-TW28 chip release w. IC-TW28 w1 no. function, parameter/code description and application notes 1 power supply rise time extending the power-on reset by rc components at pin xrst is recommended for all designs (see fig. 10 and 11). if pin xrst is directly connected to vdd, vdd rise time (from 0 v to 3.3 v) should be no less than 40 s. 2 elec. characteristics: item 501 the permissible number of write cycles is limited to 16 cycles. table 130: notes on chip functions regarding IC-TW28 chip release w1. IC-TW28 v1 no. function, parameter/code description and application notes none at time of printing. table 131: notes on chip functions regarding IC-TW28 chip release v1. p r e l i m i n a r y p r e l i m i n a r y
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 78/ 80 revision history rel. rel. date 9 chapter modifcation page a1 2015-11-13 all initial release all rel. rel. date 9 chapter modifcation page b1 2016-03-03 refer to datasheet release b1. rel. rel. date 9 chapter modifcation page c1 2016-07-20 electrical characteristics items 105, 203: max value item 301 moved to 907 item 601: max value, item 603: condition added item 902: min value, items 904 to 906 supplemented as new items items a01 to a06: changed 9 ff configuration parameters led_pwm register renamed to led_start, description changed led_pwm register description changed led_cfg.buffer register added s_adc and c_adc registers added (to read rough adc values using encoder link) 36 ff led intensity control section updated 72 design review: function notes chip release w taken up; entry added for elec.char. 901 77 rel. rel. date 9 chapter modifcation page d1 2017-04-28 block diagram block diagram updated 1 packaging information updated packaging info, pin functions, and electrical connections to warn against foating inputs. 5 , 7 electrical characteristics item 004: max value item 102: min values supplemented item 501 to 504: new items item 601, 901, 903: max value item 805, 806: typ and max values item 902: min value item 906: condition item 907: relative to fosc items a02: condition and value, items a03, a04: condition changed items a05, a06: max value figures 3 and 4 updated 9 ff electrical connections figure 20 updated 23 spi communication new fig. 22: spi command reference register data and position read section added 30 , 32 configuration parameters added device id (0xe000) and rev (0xe002 and 0xe003) registers to register map and confguration parameters. 37 , 54 input configuration and signal levels note added that a 1 vpp-diff signal with 2.5 vcm is not compatible. 55 led intensity control description of direct led connection updated. 73 design review: function notes update of chip releases 77 rel. rel. date 9 chapter modifcation page d2 2017-10-10 features text update regarding input and output frequency 1 electrical characteristics items 004, 901: condition changed to 120 ? termination items 102, 103: names of parameter and symbols item 501: inclusion of chip release v1 item 602: typ. value moved to max. value fig. 1 and 2 captions edited 9 ff operating requirements: spi interface items i006: condition added 12 functional block diagram and subsequent chapters rs422 termination resistors changed to 120 ? 15 ff input configuration and signal levels correction of input signal values to match elec.char. 102 55 design review: function notes update of chip releases 77 9 release date format: yyyy-mm-dd p r e l i m i n a r y p r e l i m i n a r y
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 79/ 80 ic-haus expressly reserves the right to change its products and/or specifcations. an infoletter gives details as to any amendments and additions made to the relevant current specifcations on our internet website www.ichaus.com/infoletter and is automatically generated and shall be sent to registered users by email. copying C even as an excerpt C is only permitted with ic-haus approval in writing and precise reference to source. the data specifed is intended solely for the purpose of product description and shall represent the usual quality of the product. in case the specifcations contain obvious mistakes e.g. in writing or calculation, ic-haus reserves the right to correct the specifcation and no liability arises insofar that the specifcation was from a third party view obviously not reliable. there shall be no claims based on defects as to quality in cases of insignifcant deviations from the specifcations or in case of only minor impairment of usability. no representations or warranties, either expressed or implied, of merchantability, ftness for a particular purpose or of any other nature are made hereunder with respect to information/specifcation or the products to which information refers and no guarantee with respect to compliance to the intended use is given. in particular, this also applies to the stated possible applications or areas of applications of the product. ic-haus products are not designed for and must not be used in connection with any applications where the failure of such products would reasonably be expected to result in signifcant personal injury or death (safety-critical applications) without ic-haus specifc written consent. safety-critical applications include, without limitation, life support devices and systems. ic-haus products are not designed nor intended for use in military or aerospace applications or environments or in automotive applications unless specifcally designated for such use by ic-haus. ic-haus conveys no patent, copyright, mask work right or other trade mark right to this product. ic-haus assumes no liability for any patent and/or other trade mark rights of a third party resulting from processing or handling of the product and/or any other use of the product. software and its documentation is provided by ic-haus gmbh or contributors "as is" and is subject to the zvei general conditions for the supply of products and services with ic-haus amendments and the zvei software clause with ic-haus amendments ( www.ichaus.com/eula ). p r e l i m i n a r y p r e l i m i n a r y
IC-TW28 10-bit sin/cos interpolator with auto-calibration and line driver rev d2, page 80/ 80 ordering information type package options order designation IC-TW28 qfn32, 5 mm x 5 mm IC-TW28 qfn32 evaluation board pcb, approx. 68 mm x 102 mm IC-TW28 eval tw28_1d IC-TW28 gui evaluation software for windows pc (entry of ic parameters, fle storage, and transfer to dut) for download link refer to www.ichaus.com/tw28 please send your purchase orders to our order handling team: fax: +49 (0) 61 35 - 92 92 - 692 e-mail: dispo@ichaus.com for technical support, information about prices and terms of delivery please contact: ic-haus gmbh tel.: +49 (0) 61 35 - 92 92 - 0 am kuemmerling 18 fax: +49 (0) 61 35 - 92 92 - 192 d-55294 bodenheim web: http://www.ichaus.com germany e-mail: sales@ichaus.com appointed local distributors: http://www.ichaus.com/sales_partners p r e l i m i n a r y p r e l i m i n a r y

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