? semiconductor components industries, llc, 2016 january, 2017 ? rev. 1 1 publication order number: esd7462/d esd7462, szesd7462 ultra-low capacitance esd protection micro?packaged diodes for esd protection the esd7462 is designed to protect voltage sensitive components that require ultra?low capacitance from esd and transient voltage events. it has industry leading capacitance linearity over voltage making it ideal for rf applications. this capacitance linearity combined with the extremely small package and low insertion loss makes this part well suited for use in antenna line applications for wireless handsets and terminals. features ? industry leading capacitance linearity over voltage ? ultra?low capacitance: 0.3 pf typ ? insertion loss: 0.05 db at 1 ghz; 0.10 db at 3 ghz ? low leakage: < 1 na typ ? protection for the following iec standards: ? iec61000?4?2 (esd): level 4 ? iec61000?4?4 (eft): 40 a ?5/50 ns ? iec61000?4?5 (lightning): 1 a (8/20 s) ? protection for iso 10605 (esd) ? sz prefix for automotive and other applications requiring unique site and control change requirements; aec?q101 qualified and ppap capable ? these devices are pb?free, halogen free/bfr free and are rohs compliant typical applications ? rf signal esd protection ? rf switching, pa, and antenna esd protection ? near field communications ? usb 2.0, usb 3.0 maximum ratings (t a = 25 c unless otherwise noted) rating symbol value unit iec 61000?4?2 contact (note 1) iec 61000?4?2 air iso 10605 contact (330 pf / 330 ) iso 10605 contact (330 pf / 2 k ) iso 10605 contact (150 pf / 2 k ) esd 18 18 13 29 30 kv total power dissipation (note 2) @ t a = 25 c thermal resistance, junction?to?ambient p d r ja 300 400 mw c/w junction and storage temperature range t j , t stg ?55 to +150 c lead solder temperature ? maximum (10 second duration) t l 260 c stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. non?repetitive current pulse at t a = 25 c, per iec61000?4?2 waveform. 2. mounted with recommended minimum pad size, dc board fr?4 device package shipping ? ordering information www. onsemi.com ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our t ape and reel packaging specification s brochure, brd8011/d. esd7462n2t5g x2dfn2 (pb?free) 8000 / tape & reel marking diagram 4 = specific device code m = date code x2dfn2 case 714ab 4 m SZESD7462N2T5G x2dfn2 (pb?free) 8000 / tape & reel
esd7462, szesd7462 www. onsemi.com 2 electrical characteristics (t a = 25 c unless otherwise noted) symbol parameter i pp maximum reverse peak pulse current v c clamping voltage @ i pp v rwm working peak reverse voltage i r maximum reverse leakage current @ v rwm v br breakdown voltage @ i t i t test current *see application note and8308/d for detailed explanations of datasheet parameters. bi?directional tvs i pp i pp v i i r i t i t i r v rwm v c v br v rwm v c v br electrical characteristics (t a = 25 c unless otherwise noted) parameter symbol condition min typ max unit reverse working voltage v rwm 16 v breakdown voltage v br i t = 1 ma (note 3) 16.5 22 28 v reverse leakage current i r v rwm = 5 v 100 na clamping voltage v c iec 61000?4?2, 8 kv contact see figures 1 and 2 v clamping voltage, tlp (note 4) v c i pp = 8 a i pp = 16 a 34 47 v dynamic resistance r dyn tlp pulse 1.6 junction capacitance c j v r = 0 v, f = 1 mhz v r = 0 v, f = 1 ghz 0.30 0.25 0.55 0.55 pf insertion loss f = 1 ghz f = 3 ghz 0.05 0.10 db product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 3. breakdown voltage is tested from pin 1 to 2 and pin 2 to 1. 4. ansi/esd stm5.5.1 ? electrostatic discharge sensitivity testing using transmission line pulse (tlp) model. tlp conditions: z 0 = 50 , t p = 100 ns, t r = 4 ns, averaging window; t 1 = 30 ns to t 2 = 60 ns. figure 1. typical iec61000?4?2 +8 kv contact esd clamping voltage figure 2. typical iec61000?4?2 ?8 kv contact esd clamping voltage 180 160 140 120 100 80 60 40 20 ?20 ?25 175 0 125 25 100 75 voltage (v) time (ns) 20 175 voltage (v) time (ns) 0 ?20 ?80 ?100 ?160 ?25 0 25 50 75 150 125 100 0 50 150 ?40 ?60 ?120 ?140
esd7462, szesd7462 www. onsemi.com 3 typical characteristics figure 3. typical iv characteristic curve figure 4. typical cv characteristic curve 1.e?03 ?24 24 ?16 0 current (a) voltage (v) bias voltage (v) capacitance (pf) ?10 10 ?6 6 2 ?2 0.50 0.45 0.40 0.30 0.25 0.20 0.15 0.10 0.05 0 ?8 8 16 1.e?04 1.e?05 1.e?06 1.e?07 1.e?08 1.e?09 1.e?10 1.e?11 1.e?12 1.e?13 0.35 0.55 f = 1 mhz figure 5. typical insertion loss figure 6. typical capacitance over frequency 1 1.e+07 s21 (db) frequency (hz) frequency (hz) capacitance (pf) 0.0e+00 0.50 0.45 0.40 0.30 0.25 0.20 0.15 0.10 0.05 0 0 ?1 ?2 ?4 ?5 ?6 ?7 ?8 ?9 ?10 0.35 0.55 vr = 0 v 1.e+08 1.e+09 1.e+10 ?3 1.0e+09 2.0e+09 3.0e+09
esd7462, szesd7462 www. onsemi.com 4 iec 61000?4?2 spec. level test volt- age (kv) first peak current (a) current at 30 ns (a) current at 60 ns (a) 1 2 7.5 4 2 2 4 15 8 4 3 6 22.5 12 6 4 8 30 16 8 i peak 90% 10% iec61000?4?2 w aveform 100% i @ 30 ns i @ 60 ns t p = 0.7 ns to 1 ns figure 7. iec61000?4?2 spec figure 8. diagram of esd clamping voltage test setup 50 50 cable tvs oscilloscope esd gun the following is taken from application note and8308/d ? interpretation of datasheet parameters for esd devices. esd voltage clamping for sensitive circuit elements it is important to limit the voltage that an ic will be exposed to during an esd event to as low a voltage as possible. the esd clamping voltage is the voltage drop across the esd protection diode during an esd event per the iec61000?4?2 waveform. since the iec61000?4?2 was written as a pass/fail spec for larger systems such as cell phones or laptop computers it is not clearly defined in the spec how to specify a clamping voltage at the device level. on semiconductor has developed a way to examine the entire voltage waveform across the esd protection diode over the time domain of an esd pulse in the form of an oscilloscope screenshot, which can be found on the datasheets for all esd protection diodes. for more information on how on semiconductor creates these screenshots and how to interpret them please refer to and8307/d.
esd7462, szesd7462 www. onsemi.com 5 figure 9. typical positive tlp iv curve figure 10. typical negative tlp iv curve tlp current (a) v c , clamping voltage (v) 060 50 30 10 40 20 tlp current (a) v c , clamping voltage (v) 0 ?60 ?10 ?20 ?50 note: tlp parameter: z 0 = 50 , t p = 100 ns, t r = 300 ps, averaging window: t 1 = 30 ns to t 2 = 60 ns. v iec is the equivalent voltage stress level calculated at the secondary peak of the iec 61000?4?2 waveform at t = 30 ns with 2 a/kv. see tlp description below for more information. 20 14 10 2 0 ?20 ?18 ?10 ?2 0 ?30 ?40 10 8 6 4 2 0 equivalent v iec (kv) ?10 ?8 ?6 ?4 ?2 0 equivalent v iec (kv) 4 6 8 12 16 18 ?4 ?6 ?8 ?12 ?14 ?16 transmission line pulse (tlp) measurement transmission line pulse (tlp) provides current versus voltage (i?v) curves in which each data point is obtained from a 100 ns long rectangular pulse from a charged transmission line. a simplified schematic of a typical tlp system is shown in figure 11. tlp i?v curves of esd protection devices accurately demonstrate the product?s esd capability because the 10s of amps current levels and under 100 ns time scale match those of an esd event. this is illustrated in figure 12 where an 8 kv iec 61000?4?2 current waveform is compared with tlp current pulses at 8 a and 16 a. a tlp i?v curve shows the voltage at which the device turns on as well as how well the device clamps voltage over a range of current levels. figure 11. simplified schematic of a typical tlp system dut l s oscilloscope attenuator 10 m v c v m i m 50 coax cable 50 coax cable figure 12. comparison between 8 kv iec 61000?4?2 and 8 a and 16 a tlp waveforms
esd7462, szesd7462 www. onsemi.com 6 package dimensions x2dfn2 1.0x0.6, 0.65p case 714ab issue o a b e d bottom view b l 0.10 c top view 0.05 c a a1 0.10 c 0.10 c c seating plane side view dim min max millimeters a 0.34 0.40 a1 ??? 0.05 b 0.45 0.55 d 1.00 bsc e 0.60 bsc solder footprint* dimensions: millimeters 1.20 0.60 *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. 1 l 0.20 0.30 0.47 recommended pin 1 pin 1 indicator e 0.65 bsc a m 0.05 b c a m 0.05 b c 2x e e/2 2x 2x note 3 on semiconductor and are trademarks of semiconductor components industries, llc dba on semiconductor or its subsidiaries i n the united states and/or other countries. on semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property . a listing of on semiconductor?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent?marking.pdf . on semiconductor reserves the right to make changes without further notice to any products herein. on semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does o n semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. buyer is responsible for its products and applications using on semiconductor products, including compliance with all laws, reg ulations and safety requirements or standards, regardless of any support or applications information provided by on semiconductor. ?typical? parameters which may be provided in on semiconductor data sheets and/or specifications can and do vary in dif ferent applications and actual performance may vary over time. all operating parameters, including ?typic als? must be validated for each customer application by customer?s technical experts. on semiconductor does not convey any license under its patent rights nor the right s of others. on semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any fda class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. should buyer purchase or use on semicondu ctor products for any such unintended or unauthorized application, buyer shall indemnify and hold on semiconductor and its officers, employees, subsidiaries, affiliates, and distrib utors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that on semiconductor was negligent regarding the design or manufacture of the part. on semiconductor is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 esd7462/d literature fulfillment : literature distribution center for on semiconductor 19521 e. 32nd pkwy, aurora, colorado 80011 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative ?
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