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general description the max690 family of supervisory circuits reduces the complexity and number of components required for power supply monitoring and battery control functions in microprocessor systems. these include p reset and backup-battery switchover, watchdog timer, cmos ram write protection, and power-failure warning. the max690 family significantly improves system reliability and accu - racy compared to that obtainable with separate ics or discrete components. the max690, max692, and max694 are supplied in 8-pin packages and provide four functions: a reset output during power-up, power-down, and brownout conditions. battery backup switching for cmos ram, cmos microprocessor or other low power logic. a reset pulse if the optional watchdog timer has not been toggled within a specified time. a 1.3v threshold detector for power fail warning, low battery detection, or to monitor a power supply other than +5v. the max691, max693, and max695 are supplied in 16-pin packages and perform all max690, max692, max694 functions, plus: write protection of cmos ram or eeprom. adjustable reset and watchdog timeout periods. separate outputs for indicating a watchdog timeout, backup-battery switchover, and low v cc . beneits and features supervisory function integration saves board space while fully protecting microprocessor-based systems ? precision voltage monitor - 4.65v (max690, max691, max694, max695) - 4.40v (max692, max693) ? power ok/reset time delay - 50ms, 200ms, or adjustable ? watchdog timer - 100ms, 1.6s, or adjustable ? battery backup power switching ? voltage monitor for power fail or low battery warning ? minimum external component count low power consumption in battery backup mode extends battery life ? 1a standby current onboard gating of chip enable signals protects against erroneous data written to ram during low v cc events applications computers controllers intelligent instruments automotive systems critical p power monitoring ordering information appears at end of data sheet. 19-0218; rev 5; 4/15 max690max692 max694 8 1 7 2 6 3 5 v batt resetwdi pfo 4 v out top view v cc gnd pfi max691max693 max695 16 1 15 2 14 3 13 resetreset wdo ce in 4 v batt v out v cc gnd 12 5 11 6 10 ce outwdi pfo 7 batt on low line osc in 9 8 pfi osc sel max690 v cc v batt pfi v out +5v pfo wdi gnd max690 typical application reset power tocmos ram p power p system p nmi i/oline p reset max690Cmax695 microprocessor supervisory circuits pin conigurations typical operating circuit downloaded from: http:///
terminal voltage (with respect to gnd) v cc ................................................................... -0.3v to +6.0v v batt ............................................................... -0.3v to +6.0v all other inputs (note 1) ................... -0.3v to (v out + 0.5v) input current v cc ............................................................................... 200ma v batt ............................................................................. 50ma gnd ............................................................................... 20ma output current v out ..................................................... short circuit protected all other outputs ............................................................ 20ma rate-of-rise, v batt , v cc .............................................. 100v/s operating temperature range c suffix ................................................................ 0c to +70c e suffix ............................................................ -40c to +85c m suffix ......................................................... -55c to +125c power dissipation 8-pin plastic dip (derate 5mw/c above +70c) .................................... 400mv 8-pin cerdip (derate 8mw/c above +85c) .................................... 500mv 16-pin plastic dip (derate 7mw/c above +70c) .................................... 600mv 16-pin small outline (derate 7mw/c above +70c) .................................... 600mv 16-pin cerdip (derate 10mw/c above +85c) .................................. 600mv storage temperature range ............................ -65c to +160c lead temperature (soldering, 10s) ................................... 300c v cc = full operating range, v batt = 2.8v, t a = +25c, unless otherwise noted.) parameter conditions min typ max units battery backup switching operating voltage range (max690, max691, max694, max695 v cc ) 4.75 5.5 v operating voltage range (max690, max691, max694, max695 v batt ) 2.0 4.25 operating voltage range (max692, max693 v cc ) 4.5 5.5 operating voltage range (max692, max693 v batt ) 2.0 4.0 v out output voltage i out = 1ma v cc - 0.3 v cc - 0.1 v i out = 50ma v cc - 0.5 v cc - 0.25 v out in battery backup mode i out = 250a, v cc < v batt - 0.2v v batt - 0.1 v batt - 0.02 v supply current (excluded i out ) i out = 1ma 2 5 ma i out = 50ma 3.5 10 supply current in battery backup mode v cc = 0v, v batt = 2.8v 0.6 1 a battery standby current(+ = discharge, - = charge) 5.5v > v cc > v batt + 1v t a = +25c -0.1 +0.02 a t a = full operating range -1.0 +0.02 battery switchover threshold (v cc - v batt ) power-up 70 mv power-down 50 max690Cmax695 microprocessor supervisory circuits www.maximintegrated.com maxim integrated 2 absolute maximum ratings stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. electrical characteristics downloaded from: http:///
v cc = full operating range, v batt = 2.8v, t a = +25c, unless otherwise noted.) parameter conditions min typ max units battery switchover hysteresis 20 mv batt on output voltage i sink = 3.2ma 0.4 v batt on output short-circuit current batt on = v out = 4.5v sink current 25 ma batt on = 0v source current 0.5 1 25 a reset and watchdog timer reset voltage threshold t a = full operating range max690, max691, max694, max695 4.5 4.65 4.75 v max692, max693 4.25 4.4 4.5 reset threshold hysteresis 40 mv reset timeout delay (max690/max691/ max692/max693) figure 6, osc sel high, v cc = 5v 35 50 70 ms reset timeout delay (max694/max695) figure 6, osc sel high, v cc = 5v 140 200 280 ms watchdog timeout period, internal oscillator long period, v cc = 5v 1.0 1.6 2.25 s short period, v cc = 5v 70 100 140 ms watchdog timeout period, external clock long period 3840 4097 clock cycles short period 768 1025 minimum wdi input pulse width v il = 0.4, v ih = 0.8v cc 200 ns reset and low line output voltage i sink = 1.6ma, v cc = 4.25v 0.4 v i source = 1a, v cc = 5v 3.5 reset and wdo output voltage i sink = 1.6ma 0.4 v i source = 1a, v cc = 5v 3.5 output short-circuit current reset , reset, wdo , low line 1 3 25 a wdi input threshold logic-low v cc = 5v (note 2) 0.8 v wdi input threshold logic-high v cc = 5v (note 2) 3.5 wdi input current wdi = v out 20 50 a wdi = 0v -50 -15 power-fail detector pfi threshold v cc = 5v, t a = full 1.2 1.3 1.4 v pfi current 0.01 25 na pfo output voltage i sink = 3.2ma 0.4 v i source = 1a 3.5 v pfo short circuit source current pfi = v ih , pfo = 0v 1 3 25 a max690Cmax695 microprocessor supervisory circuits www.maximintegrated.com maxim integrated 3 electrical characteristics (continued) downloaded from: http:///
v cc = full operating range, v batt = 2.8v, t a = +25c, unless otherwise noted.) note 1: the input voltage limits on pfi and wdi may be exceeded provided the input current is limited to less than 10ma. note 2: wdi is guaranteed to be in the mid-level (inactive) state if wdi is floating and v cc is in the operating voltage range. wdi is internally biased to 38% of v cc with an impedance of approximately 125k. parameter conditions min typ max units chip enable gating ce in thresholds v il 0.8 v v ih 3.0 ce in pullup current 3 a ce out output voltage i sink = 3.2ma 0.4 v i source = 3.0ma v out - 1.5 i source = 1a, v cc = 0v v out - 0.05 ce propagation delay v cc = 5v 50 200 ns oscillator osc in input current 2 a osc sel input pullup current 5 a osc in frequency range osc sel = 0v 0 250 khz osc in frequency with external capacitor osc sel = 0v c osc = 47pf 4 khz pin name function max690/ max692/ max694 max691/ max693/ max695 2 3 v cc the +5v input 8 1 v batt backup battery input. connect to ground if a backup battery is not used. 1 2 v out the higher of v cc or v batt is internally switched to v out . connect v out to v cc if v out and v batt are not used. connect a 0.1f or larger bypass capacitor to v out . 3 4 gnd 0v ground reference for all signals 7 15 reset reset goes low whenever v cc falls below either the reset voltage threshold or the v batt input voltage. the reset threshold is typically 4.65v for the max690/691/694/695, and 4.4v for the max692 and max693. reset remains low for 50ms after v cc returns to 5v, (except 200ms in max694/695). reset also goes low for 50ms if the watchdog timer is enabled but not serviced within its timeout period. the reset pulse width can be adjusted as shown in table 1. 6 11 wdi watchdog input (wdi). wdi is a three level input. if wdi remains either high or low for longer than the watchdog timeout period, reset pulses low and wdo goes low. the watchdog timer is disabled when wdi is left loating or is driven to mid-supply. the timer resets with each transition at the watchdog timer input. 4 9 pfi noninverting input to the power-fail comparator. when pfi is less than 1.3v, pfo goes low. connect pfi to gnd or v out when not used. see figure 1. max690Cmax695 microprocessor supervisory circuits www.maximintegrated.com maxim integrated 4 electrical characteristics (continued)pin description downloaded from: http:///
pin name function max690/ max692/ max694 max691/ max693/ max695 5 10 pfo output of the power-fail comparator. it goes low when pfi is less than 1.3v. the comparator is turned off and pfo goes low when v cc is below v batt . 13 ce in ce gating circuit input. connect to gnd or v out if not used. 12 ce out ce out goes low only when ce in is low and v cc is above the reset threshold (4.65v for max691 and max695, 4.4v for max693). see figure 6. 5 batt on batt on goes high when v out is internally switched to the v batt input. it goes low when v out is internally switched to v cc . the output typically sinks 25ma and can directly drive the base of an external pnp transistor to increase the output current above the 50ma rating of v out . 6 low line low line goes low when v cc falls below the reset threshold. it returns high as soon as v cc rises above the reset threshold. see figure 6, reset timing. 16 reset active-high output. it is the inverse of reset . 8 osc sel when osc sel is unconnected or driven high, the internal oscillator sets the reset time delay and watchdog timeout period. when osc sel is low, the external oscillator input, osc in, is enabled. osc sel has a 3a internal pullup. see table 1. 7 osc in when osc sel is low, osc in can be driven by an external clock to adjust both the reset delay and the watchdog timeout period. the timing can also be adjusted by connecting and external oscillator to this pin. see figure 8. when osc sel is high or loating, osc in selects between fast and slow watchdog timeout periods. 14 wdo the watchdog output ( wdo) . wdo goes low if wdi remains either high or low for longer than the watchdog timeout period. wdo is set high by the next transition at wdi. if wdi is unconnected or at mid-supply, wdo remains high. wdo also goes high when low line goes low. max690Cmax695 microprocessor supervisory circuits www.maximintegrated.com maxim integrated 5 pin description (continued) downloaded from: http:///
typical applications max691, max693, and max695 a typical connection for the max691/693/695 is shown in figure 1. cmos ram is powered from v out . v out is internally connected to v cc when 5v power is present, or to v batt when v cc is less than the battery voltage. v out can supply 50ma from v cc , but if more current is required, an external pnp transistor can be added. when v cc is higher than v batt , the batt on output goes low, providing 25ma of base drive for the external transistor. when v cc is lower than v batt , an internal 200 mosfet connects the backup battery to v out . the quiescent current in the battery backup mode is 1a maximum when v cc is between 0v and v batt C700mv. reset output a voltage detector monitors v cc and generates a reset output to hold the microprocessors reset line low when v cc is below 4.65v (4.4v for max693). an internal monostable holds reset low for 50ms* after v cc rises above 4.65v (4.4v for max693). this prevents repeated toggling of reset even if the 5v power drops out and recovers with each power line cycle. the crystal oscillator normally used to generate the clock for microprocessors takes several milliseconds to start. since most microprocessors need several clock cycles to reset, reset must be held low until the micropro - cessor clock oscillator has started. the max690 family power-up reset pulse lasts 50ms* to allow for this oscillator start-up time. the manual reset switch and the 0.1f capacitor connected to the reset bus can be omitted if manual reset is not needed. an inverted, active high, reset output is also supplied. power-fail detector the max691/93/95 issues a nonmaskable interrupt (nmi) to the microprocessor when a power failure occurs. the +5v power line is monitored via two external resistors connected to the power-fail input (pfi). when the volt - age at pfi falls below 1.3v, the power-fail output ( pfo ) drives the processors nmi input low. if a power-fail threshold of 4.8v is chosen, the microprocessor will have the time when v cc fails from 4.8v to 4.65v to save data into ram. an earlier power-fail warning can be generated if the unregulated dc input of the 5v regulator is available for monitoring. ram write protection the max691/max693/max695 ce out line drives the chip select inputs of the cmos ram. ce out follows ce in as long as v cc is above the 4.65v (4.4v for max693) reset threshold. if v cc falls below the reset threshold, ce out goes high, independent of the logic level at ce in. this prevents the microprocessor from writing erroneous data into ram during power-up, power- down, brownouts, and momentary power interruptions. the low line output goes low when v cc falls below 4.65v (4.4v for max693). * 200ms for max695 figure 1. max691/693/695 typical application +5v v cc input no connection 0.1f 0.1f 0.1f 3 19 4 v cc v batt i/onmi reset pfignd batt on low line wdo system status indicators 3v battery 5 212 13 6 14 max691max693 max695 1110 15 7 osc in v out ce in ce out pfo wdi reset reset 8 osc sel audible alarm address decode cmos ram microprocessor other system reset sources a0-a15 max690Cmax695 microprocessor supervisory circuits www.maximintegrated.com maxim integrated 6 downloaded from: http:///
watchdog timer the microprocessor drives the watchdog input (wdi) with an i/o line. when osc in and osc sel are unconnected, the microprocessor must toggle the wdi pin once every 1.6s to verify proper software execution. if a hardware or software failure occurs such that wdi not toggled the max691/max693 will issue a 50ms* reset pulse after 1.6s. this typically restarts the microproces - sors power-up routine. a new reset pulse is issued every 1.6s until the wdi is again strobed. the watchdog output ( wdo ) goes low if the watchdog timer is not serviced within its timeout period. once wdo goes low it remains low until a transition occurs at wdi. the watchdog timer feature can be dis - abled by leaving wdi unconnected. osc in and osc sel also allow other watchdog timing options, as shown in table 1 and figure 8. max690, max692, and max694 the 8 pin max690, max692, and max694 have most of the features of the max691, max693, and max695. figure 2 shows the max690/max692/max694 in a typical application. operation is much the same as with the max691/max693/max695 (figure 1), but in this case, the power- fail input (pfi) monitors the unregulated input to the 7805 regulator. the max690/max694 reset output goes low when v cc falls below 4.65v. the reset output of the max692 goes low when v cc drops below 4.4v. the current consumption of the battery-backed-up power bus must be less than 50ma. the max690/max692/ max694 does not have a batt on output to drive an external transistor. the max690/max692/max694 also does not include chip enable gating circuitry that is avail - able on the max690/max692/max694. in many systems though, ce gating is not needed since a low input to the microprocessor reset line prevents the processor from writing to ram during power-up and power-down transients. the max690/max692/max694 watchdog timer has a fixed 1.6s timeout period. if wdi remains either low or high for more than 1.6s, a reset pulse is sent to the microprocessor. the watchdog timer is disabled if wdi is left unconnected. * 200ms for max695 figure 2. max690/692/694 typical application 7805 3-terminal regulator +8v +5v 0.1f 0.1f 24 3 max690max692 max694 gnd microprocessor micro- processor power power to cmos ram 1 v cc v out 87 5 6 v batt reset pfi reset pfo nmi wdi i/o line max690Cmax695 microprocessor supervisory circuits www.maximintegrated.com maxim integrated 7 downloaded from: http:///
detailed description battery-switchover and v out the battery switchover circuit compares v cc to the v batt input, and connects v out to whichever is higher. switchover occurs when v cc is 50mv greater than v batt as v cc falls, and v cc is 70mv more than v batt as v cc rises (see figure 4). the switchover comparator has 20mv of hyster - esis to prevent repeated, rapid switching if v cc falls very slowly or remains nearly equal to the battery voltage. when v cc is higher than v batt , v cc is internally switched to v out via a low saturation pnp transis - tor. v out has 50ma output current capability. use an external pnp pass transistor in parallel with internal tran - sistor if the output current requirement at v out exceeds 50ma or if a lower v cc -v out voltage differential is desired. the batt on output (max691/max693/max695 only) can directly drive the base of the external transistor. it should be noted that the max690Cmax695 need only supply the average current drawn by the cmos ram if there is adequate filtering. many ram data sheets specify a 75ma maximum supply current, but this peak current spike lasts only 100ns. a 0.1f bypass capacitor at v out supplies the high instantaneous current, while v out need only supply the average load current, which is much less. a capacitance of 0.1f or greater must be connected to the v out terminal to ensure stability. a 200 mosfet connects v batt input to v out during battery backup. this mosfet has very low input-to- output differential (dropout voltage) at the low current levels required for battery backup of cmos ram or other low power cmos circuitry. when v cc equals v batt the supply current is typically 12a. when v cc is between 0v and (v batt - 700mv) the typical supply current is only 600na typical, 1a maximum. the max690/max691/max694/max695 operate with battery voltages from 2.0v to 4.25v while max692/ max693 operate with battery voltages from 2.0v to 4.0v. high value capacitors can also be used for short- term memory backup. external circuitry is required to ensure that the capacitor voltage does not rise above the reset threshold, and that the charging resistor does not discharge the capacitor when in backup mode. the max691a and the max791 provide solutions requiring fewer external components. a small charging current of typically 10na (0.1a max) flows out of the v batt terminal. this current varies with the amount of current that is drawn from v out but its polarity is such that the backup battery is always slightly charged, and is never discharged while v cc is in its operating volt - age range. this extends the shelf life of the backup battery by compensating for its self-discharge current. also note that this current poses no problem when lithium batteries are used for backup since the maximum charging current (0.1a) is safe for even the smallest lithium cells. if the battery-switchover section is not used, connect v batt to gnd and connect v out to v cc . table 2 shows the state of the inputs and output in the low power battery backup mode. figure 3. max691/max693/max695 block diagram reset generator timebase for reset and watchdog watchdog transition detector watchdog timer + - 1.3v + - + - * 4.65v v batt batt on 1 5 v cc chip-enable input osc in *4.4v (max693) osc sel watchdog input power fail input 3 13 78 11 9 4 v out chip enable outputlow line reset ground resetwatchdog output power fail output 212 6 15 16 14 10 max690Cmax695 microprocessor supervisory circuits www.maximintegrated.com maxim integrated 8 downloaded from: http:///
reset output reset is an active-low output which goes low when - ever v cc falls below 4.5v (max690/max691/max694/ max695) or 4.25v (max692/max693). it will remain low until v cc rises above 4.75v (max690/691/694/695) or 4.5v (max692/max693) for milliseconds*. see figures 5 and 6. the guaranteed minimum and maximum thresholds of max690/max691/max694/max695 are 4.5v and 4.75v, while the guaranteed thresholds of the max692/max693 are 4.25v and 4.5v. the max690/max691/max694/ max695 is compatible with 5v supplies with a +10%, -5% tolerance while the max692/max693 is compatible with 5v 10% supplies. the reset threshold comparator has approximately 50mv of hysteresis, with a nominal thresh - old of 4.65v in the max690/max691/max694/max695, and 4.4v in the max692/max693. the response time of the reset voltage comparator is about 100s. v cc should be bypassed to ensure that glitches do not activate the reset output. reset also goes low if the watchdog timer is enabled and wdi remains either high or low longer than the watch - dog timeout period. reset has an internal 3a pullup, and can either connect to and open collector reset bus or directly drive a cmos gate without and external pullup resistor. ce gating and ram write protection the max691/max693/max695 use two pins to control the chip enable or write inputs of cmos rams. when v cc is +5v, ce out is a buffered replica of ce in, with a 50ns propagation delay. if v cc input falls below 4.65v (4.5v min, 4.75v max) an internal gate forces ce out high, independent of ce in. the max693 ce out goes high whenever v cc is below 4.4v (4.25v min, 4.5v max). the ce output of both devices is also forced high when v cc is less than v batt . (see figure 5.) ce out typically drives the ce , cs , or write input of battery backed up cmos ram. this ensures the integ - rity of the data in memory by preventing write operations when v cc is at and invalid level. similar protection of eeproms can be achieved by using the ce out to drive the store or write inputs of an eeprom, earom, or novram. if the 50ns typical propagation delay of ce out is too long, connect ce in to gnd and use the resulting ce out to control a high speed external logic gate. a second alternative is to and the low line output with the ce or wr signal. an external logic gate and the reset output of the max690/max692/max694 can also be used for cmos ram write protection. * 200ms for max694 and max695 figure 4. battery-switchover block diagram + - + + - - base drive low iq mode select v out 0.1f to cmosram and realtime clock v cc in 100 mv 700 mv 3v battery input p channel mosfet batt on (max691, max693, max695 only) internal shutdown signal when v batt > v cc + 0.7v v cc v cc +5v max690Cmax695 microprocessor supervisory circuits www.maximintegrated.com maxim integrated 9 downloaded from: http:///
figure 5. reset block diagram figure 6. reset timing +- 1.3v reset reset time q r resetreset watchdog from watchdog timer v cc ce in ce out low line 10 khz clockfrom timebase section power-onreset metal link trimmed resistors 4.7v 50ms* v cc reset output 4.7v 4.6v 4.6v *200ms for max694 and max695 v out - v batt low line output ce in ce in 50ms* max690Cmax695 microprocessor supervisory circuits www.maximintegrated.com maxim integrated 10 downloaded from: http:///
1.3v comparator and power-fail warning the power-fail input (pfi) is compared to an internal 1.3v reference. the power-fail output ( pfo ) goes low when the voltage at pfi is less than 1.3v. typically, pfi is driven by an external voltage divider which senses either the unregulated dc input to the systems 5v regulator or the regulated 5v output. the voltage divider ratio can be chosen such that the voltage at pfi falls below 1.3v sev - eral milliseconds before the +5v supply falls below 4.75v. pfo is normally used to interrupt the microprocessor so that data can be stored in ram before v cc falls below 4.75v and the reset output goes low (4.5v for max692/ max693).the power-fail detector can also monitor the backup bat - tery to warn of a low battery condition. to conserve bat - tery power, the power-fail detector comparator is turned off and pfo is forced when v cc is lower than v batt input voltage. watchdog timer and oscillator the watchdog circuit monitors the activity of the micro - processor. if the microprocessor does not toggle the watchdog input (wdi) within the selected timeout period, a 50ms* reset pulse is generated. since many systems cannot service the watchdog timer immediately after a reset, the max691/max693/max695 has a longer time - out period after reset is issued. the normal timeout period becomes effective following the first transition of wdi after reset has gone high. the watchdog timer is restarted at the end of reset, whether the reset was caused by lack of activity on wdi or by v cc falling below the reset threshold. if wdi remains either high or low, reset pulses will be issued every 1.6s. the watchdog monitor can be deactivated by floating the watchdog input (wdi). the watchdog output ( wdo , max691/max693/max695 only) goes low if the watchdog timer times out and remains low until set high by the next transition on the watchdog input. wdo is also set high when v cc goes below the reset threshold. the watchdog timeout period is fixed at 1.6s and the reset pulse width is fixed at 50ms* on the 8-pin max690/ max692/max694. the max691/max693/max695 allow these times to be adjusted per table 1. figures 8 shows various oscillator configurations. the internal oscillator is enabled when osc sel is floating. in this mode, osc in selects between the 1.6s and 100ms watchdog timeout periods. in either case, immediately after a reset the timeout period 1.6s. this gives the microprocessors time to reintialize the system. if osc in is low, then the 100ms watchdog period becomes effective after the first transition of wdi. the software should be written such that the i/o port driving wdi is left in its power-up reset state until the ini - tialization routines are completed and the microprocessor is able to toggle wdi at the minimum watchdog timeout period of 70ms. * 200ms for max694 figure 7. watchdog timer block diagram +- -+ 1.0v 2.7v v cc transaction detector watchdog input hi if watchdog input is floating for each transition reset counter r q10/12 q6 prescaler watchdog counter r q11 q13q15 watchdog timeout selector logic goes high at the end of watchdog timeout period watchdog fault ff watchdog timeout select watchdog output 10.24 khz from internal oscillator or externally set frequency from osc in pin low line reset flip flop q s r q q q long/ short ff s r r s reset reset low line (hi if v cc < 4.65v) max690Cmax695 microprocessor supervisory circuits www.maximintegrated.com maxim integrated 11 downloaded from: http:///
note 1: the max690/max692/max694 watchdog timeout period is fixed at 1.6s nominal, the max690/692 reset pulse width is fixed at 50ms nominal and the max694 is 200ms nominal. note 2: when the max691 osc sel pin is low, osc in can be driven by an external clock signal or an external capacitor can be connected between osc in and gnd. the nominal internal oscillator frequency is 6.55khz. the nominal oscillator frequency with capacitor is: osc 120,000 f (hz) c(pf) = note 3: see electrical characteristics table for minimum and maximum timing values. figure 8. oscillator circuits table 1. max691/max693/max695 reset pulse width and watchdog timeout selections osc sel osc in watchdog timeout period reset timeout period normal immediately after rest max691/max693 max695 low external clock input 1024 clks 4096 clks 512 clks 2048 clks low external capacitor 400ms/47pf x c 1.6s/47pf x c 200ms/47pf x c 800ms/47pf x c floating low 100ms 1.6s 50ms 200ms floating floating 1.6s 1.6s 50ms 200ms max691max693 max695 external clock 0 to 250khz osc selosc in 87 max691max693 max695 external oscillator c osc osc selosc in 87 max691max693 max695 internal oscillator 1.6s watchdog n.c. osc selosc in 8 n.c. 8 7 max691max693 max695 internal oscillator 100ms watchdog osc selosc in 7 n.c. max690Cmax695 microprocessor supervisory circuits www.maximintegrated.com maxim integrated 12 downloaded from: http:///
application hints other uses of the power-fail detector in figure 9, the power-fail detector is used to initiate a system reset when v cc falls to 4.85v. since the thresh - old of the power-fail detector is not as accurate as the onboard reset-voltage detector, a trimpot must be used to adjust the voltage detection threshold. both the pfo and reset outputs have high sink current capability and only 10a of source current drive. this allows the two outputs to be connected directly to each other in a wired or fashion. the overvoltage detector circuit in figure 10 resets the microprocessor whenever the nominal 5v v cc is above 5.5v. the battery monitor circuit (figure 11) shows the status of the memory backup battery. if desired, the ce out can be used to apply a test load to the battery. since ce out is forced high during the battery backup mode, the test load will not be applied to the battery while it is in use even if the microprocessor is not powered. adding hysteresis to the power fail comparatorsince the power fail comparator circuit is noninvert - ing, hysteresis can be added by connecting a resistor between the pfo output and the pfi input as shown in figure 12. when pfo is low, resistor r3 sinks current from the summing junction at the pfi pin. when pfo is high, the series combination of r3 and r4 source current into the pfi summing junction. alternate watchdog input drive circuits the watchdog feature can be enabled and disabled under program control by driving wdi with a three-state buffer (figure 13). the drawback to this circuit is that a software fault may be erroneously three-state the buffer, thereby preventing the max690 from detecting that the microprocessor is no longer working. in most cases a bet - ter method is to extend the watchdog period rather than disabling the watchdog. see figure 14. when the control input is high, the osc sel pin is low and the watchdog timeout is set by the external capacitor. a 0.01f capaci - tor sets a watchdog timeout delay of 100s. when the control input is low the osc sel pin is high, selecting the internal oscillator. the 100ms or the 1.6s period is chosen, depending on which diode in figure 14 is used. figure 9. externally adjustable v cc reset threshold figure 10. reset on overvoltage or undervoltage max690max691 max692 max693 max694 max695 pfi to preset input gnd +5v v cc pfo 10k ? 2k ? 29.4k ? reset max690max691 max692 max693 max694 max695 pfi to preset input n-channel gnd +5v v cc pfo 10k ? 2k ? 35.7k ? reset max690Cmax695 microprocessor supervisory circuits www.maximintegrated.com maxim integrated 13 downloaded from: http:///
figure 11. backup vbattery monitor with optional test load figure 13. disabling the watchdog under program control figure 12. adding hysteresis to the power-fail voltage comparator figure 14. selecting internal or external watchdog timeout max690max691 max692 max693 max694 max695 pfi r l v batt ce out low batterysignal to p i/o pin from p i/o pin gnd low applies load to battery +5v v cc ce in 10m ? 10m ? pfo max690max691 max692 max693 max694 max695 wdi watchdog strobe gnd +5v v cc watchdog disable en max690max691 max692 max693 max694 max695 pfo v cc pfi gnd to p 7805 +5v 7v to 15v r410k ? r175k ? r213k ? v h = 9.125v v l = 7.9v hysteresis = 1.23v v h = 1.3v ( 1 + + ) r3300k ? r1r2 r1r3 r1r3 v l = 1.3v ( 1 + - ) hysteresis 5v xassuming r4 < < r3 r1r2 (5v -1.3v) r1 1.3v (r3 + r4) max691max693 osc sel low = internal watchdog timeout hi = external watchdog timeoue gnd +5v v cc osc in connect for100ms timeout when internal timeout is selected connect for1.6s internal timeout max690Cmax695 microprocessor supervisory circuits www.maximintegrated.com maxim integrated 14 downloaded from: http:///
table 2. input and output status in battery backup mode v batt , v out v batt is connected to v out via internal mosfet. reset logic-low reset logic-high. the open circuit output voltage is equal to v out . low line logic-low batt on logic-high wdi wdi is internally disconnected from its internal pullup and does not source or sink current as long as its input voltage is between gnd and v out . the input voltage does not affect the source current. wdo logic-high pfi the power-fail comparator is turned off and the power-fail input voltage has no effect on the power-fail output. pfo logic-low ce in ce in is internally disconnected from its internal pullup and does not source or sink current as long as its input voltage is between gnd and v out . the input voltage does not affect the source current. ce out logic-high osc in osc in is ignored. osc sel osc sel is ignored. v cc approximately 12a is drawn from the v batt input when v cc is between v batt +100mv and v batt - 700mv. the supply current is 1a maximum when v cc is less than v batt - 700mv. max690Cmax695 microprocessor supervisory circuits www.maximintegrated.com maxim integrated 15 downloaded from: http:///
* contact factory for dice specifications. devices in pdip and so packages are available in both leaded and lead-free packaging. specify lead free by adding the + symbol at the end of the part number when ordering. lead free not available for cerdip package. part temp range pin-package max693cpe 0c to +70c 16 lead plastic dip max693cwe 0c to +70c 16 lead wide so max693epe -40c to +85c 16 lead plastic dip max693eje -40c to +85c 16 lead cerdip max693ewe -40c to +85c 16 lead wide so max693mje -55c to +125c 16 lead cerdip max694 c/d 0c to +70c dice max694cpa 0c to +70c 8 lead plastic dip max694epa -40c to +85c 8 lead plastic dip max694eja -40c to +85c 8 lead cerdip max694mja -55c to +125c 8 lead cerdip max695 c/d 0c to +70c dice max695cpe 0c to +70c 16 lead plastic dip max695cwe 0c to +70c 16 lead wide so max695epe -40c to +85c 16 lead plastic dip max695eje -40c to +85c 16 lead cerdip max695ewe -40c to +85c 16 lead wide so max695mje -55c to +125c 16 lead cerdip part temp range pin-package max690 cpa 0c to +70c 8 lead plastic dip max690c/d 0c to +70c dice* max690epa -40c to +85c 8 lead plastic dip max690eja -40c to +85c 8 lead cerdip max690mja -55c to +125c 8 lead cerdip max691 cpe 0c to +70c 16 lead plastic dip max691cwe 0c to +70c 16 lead wide so max691c/d 0c to +70c dice* max691epe -40c to +85c 16 lead plastic dip max691ewe -40c to +85c 16 lead wide so max691eje -40c to +85c 16 lead cerdip max691mje -55c to +125c 16 lead cerdip max692 c/d 0c to +70c dice max692cpa 0c to +70c 8 lead plastic dip max692epa -40c to +85c 8 lead plastic dip max692eja -40c to +85c 8 lead cerdip max692mja -55c to +125c 8 lead cerdip max693 c/d 0c to +70c dice max690Cmax695 microprocessor supervisory circuits www.maximintegrated.com maxim integrated 16 ordering information downloaded from: http:///
package type package code outline no. land pattern no. 8 pdip p8-2 21-0043 ? 8 cedip j8-2 21-0045 ? 16 pdip p16-1 21-0043 ? 16 wide so w16-1 21-0042 ? 16 cerdip p16-1 21-0043 ? 3 v cc wdoce in ce out 2 v out gnd batt on 1 v batt 16 reset 15 4 1413 12 5 reset 6 low line 7 8 osc in osc sel 0.086 (2.184 mm) wdi 9 pfi 10 11 pfo 0.122 (3.098 mm) max690Cmax695 microprocessor supervisory circuits www.maximintegrated.com maxim integrated 17 chip topography package information for the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. downloaded from: http:///
revision number revision date description pages changed 5 4/15 revised beneits and features section 1 maxim integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim integrated product. no circuit patent licenses are implied. maxim integrated reserves the right to change the circuitry and speciications without n otice at any time. the parametric values (min and max limits) shown in the electrical characteristics table are guaranteed. other parametric values quoted in this data sheet are provided for guidance. maxim integrated and the maxim integrated logo are trademarks of maxim integrated products, inc. max690Cmax695 microprocessor supervisory circuits ? 2015 maxim integrated products, inc. 18 revision history for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim integrateds website at www.maximintegrated.com. downloaded from: http:///

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