november 2011 ?2011 fairchild semiconductor corporation FDME905PT rev.c2 www.fairchildsemi.com 1 FDME905PT p-channel powertrench ? mosfet FDME905PT p-channel powertrench ? mosfet -12 v, -8 a, 22 m features ? max r ds(on) = 22 m at v gs = -4.5 v, i d = -8 a ? max r ds(on) = 26 m at v gs = -2.5 v, i d = -7.3 a ? max r ds(on) = 97 m at v gs = -1.8 v, i d = -3.8 a ? low profile: 0.55 mm maximum in the new package microfet 1.6x1.6 thin ? free from halogenated compounds and antimony oxides ? rohs compliant general description this device is designed specifica lly for battery charging or load switching in cellular handset and other ultraportable applications. it features a mosfet with low on-state resistance. the microfet 1.6x1.6 thin package offers exceptional thermal performance for its physical size and is well suited to switching and linear mode applications. microfet 1.6x1.6 thin g d d top bottom pin 1 d g d s d d s d d 5 1 6 2 3 4 bottom drain contact mosfet maximum ratings t a = 25 c unless otherwise noted thermal characteristics package marking and ordering information symbol parameter ratings units v ds drain to source voltage -12 v v gs gate to source voltage 8 v i d drain current -continuous t a = 25 c (note 1a) -8 a -pulsed -30 p d power dissipation t a = 25 c (note 1a) 2.1 w power dissipation t a = 25 c (note 1b) 0.7 t j , t stg operating and storage junction temperature range -55 to +150 c r jc thermal resistance, junction to case 4.5 c/w r ja thermal resistance, junction to ambient (note 1a) 60 r ja thermal resistance, junction to ambient (note 1b) 175 device marking device package reel size tape width quantity e95 FDME905PT microfet 1.6x1.6 thin 7 ?? 8 mm 5000 units
FDME905PT p-channel powertrench ? mosfet www.fairchildsemi.com 2 ?2011 fairchild semiconductor corporation FDME905PT rev.c2 electrical characteristics t j = 25 c unless otherwise noted off characteristics on characteristics dynamic characteristics switching characteristics drain-source diod e characteristics symbol parameter test conditions min typ max units bv dss drain to source breakdown voltage i d = -250 a, v gs = 0 v -12 v bv dss t j breakdown voltage temperature coefficient i d = -250 a, referenced to 25 c -8.7 mv/c i dss zero gate voltage drain current v ds = -9.6 v, v gs = 0 v -1 a i gss gate to source leakage current v gs = 8 v, v ds = 0 v 100 na v gs(th) gate to source threshold voltage v gs = v ds , i d = -250 a -0.4 -0.7 -1.0 v v gs(th) t j gate to source threshold voltage temperature coefficient i d = -250 a, referenced to 25 c 2.5 mv/c r ds(on) drain to source on resistance v gs = -4.5 v, i d = -8 a 18 22 m v gs = -2.5 v, i d = -7.3 a 22 26 v gs = -1.8 v, i d = -3.8 a 28 97 v gs = -4.5 v, i d = -8 a, t j = 125 c 23 32 g fs forward transconductance v ds = -5 v, i d = -8 a 38 s c iss input capacitance v ds = -6 v, v gs = 0 v, f = 1 mhz 1740 2315 pf c oss output capacitance 350 525 pf c rss reverse transfer capacitance 311 465 pf t d(on) turn-on delay time v dd = -6 v, i d = -8 a, v gs = -4.5 v, r gen = 6 9.5 19 ns t r rise time 816ns t d(off) turn-off delay time 90 144 ns t f fall time 42 67 ns q g total gate charge v dd = -6 v, i d = -8 a, v gs = -4.5 v 14 20 nc q gs gate to source gate charge 2.4 nc q gd gate to drain ?miller? charge 3 nc v sd source to drain diode forward voltage v gs = 0 v, i s = -8 a (note 2) -0.8 -1.2 v v gs = 0 v, i s = -1.8 a (note 2) -0.7 -1.2 t rr reverse recovery time i f = -8 a, di/dt = 100 a/ s 17 31 ns q rr reverse recovery charge 4.5 10 nc notes: 1. r ja is determined with the device mounted on a 1 in 2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of fr-4 material. r jc is guaranteed by design while r ca is determined by the user's board design. 2. pulse test: pulse width < 300 s, duty cycle < 2.0 %. a. 60 c/w when mounted on a 1 in 2 pad of 2 oz copper. b. 175 c/w when mounted on a minimum pad of 2 oz copper.
FDME905PT p-channel powertrench ? mosfet www.fairchildsemi.com 3 ?2011 fairchild semiconductor corporation FDME905PT rev.c2 typical characteristics t j = 25 c unless otherwise noted figure 1. 0 . 00 . 51 . 01 . 5 0 10 20 30 v gs = -2.5 v v gs = -1.8 v v gs = -4.5 v v gs = -3 v pulse duration = 80 p s duty cycle = 0.5% max -i d , drain current (a) -v ds , drain to source voltage (v) on-region characteristics figure 2. 01 02 03 0 0 1 2 3 v gs = -1.8 v v gs = -2.5 v pulse duration = 80 p s duty cycle = 0.5% max normalized drain to source on-resistance - i d , drain current (a) v gs = -3 v v gs = -4.5 v n o r m a l i z e d o n - r e s i s t a n c e vs drain current and gate voltage f i g u r e 3 . n o r m a l i z e d o n - r e s i s t a n c e -75 -50 -25 0 25 50 75 100 125 150 0.8 0.9 1.0 1.1 1.2 1.3 1.4 i d = -8 a v gs = -4.5 v normalized drain to source on-resistance t j , junction temperature ( o c ) vs junction temperature figure 4. 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 0 20 40 60 80 pulse duration = 80 p s duty cycle = 0.5% max t j = 125 o c t j = 25 o c i d = -8 a r ds(on) , drain to source on-resistance ( m : ) -v gs , gate to source voltage (v) o n - r e s i s t a n c e v s g a t e t o source voltage figure 5. transfer characteristics 0.0 0.5 1.0 1.5 2.0 0 10 20 30 t j = 25 o c v ds = -5 v pulse duration = 80 p s duty cycle = 0.5% max t j = -55 o c t j = 150 o c -i d , drain current (a) -v gs , gate to source voltage (v) figure 6. 0.0 0.2 0.4 0.6 0.8 1.0 1.2 0.001 0.01 0.1 1 10 50 t j = -55 o c t j = 25 o c t j = 150 o c v gs = 0 v -i s , reverse drain current (a) -v sd , body diode forward voltage (v) s o u r c e t o d r a i n d i o d e forward voltage vs source current
FDME905PT p-channel powertrench ? mosfet www.fairchildsemi.com 4 ?2011 fairchild semiconductor corporation FDME905PT rev.c2 figure 7. 0481 21 6 0.0 1.5 3.0 4.5 i d = -8 a v dd = -6 v v dd = -5 v -v gs , gate to source voltage (v) q g , gate charge (nc) v dd = -7 v gate charge characteristics figure 8. 0.1 1 10 20 100 1000 3000 f = 1 mhz v gs = 0 v capacitance (pf) -v ds , drain to source voltage (v) c rss c oss c iss c a p a c i t a n c e v s d r a i n to source voltage figure 9. 0.1 1 10 30 0.001 0.01 0.1 1 10 100 this area is limited by r ds(on) 100 p s 1 ms 100 ms 1 s dc 10 s 10 ms single pulse t j = max rated r t ja = 175 o c/w t a = 25 o c -i d , drain current (a) -v ds , drain to source voltage (v) f or war d bi as safe operating area figure 10. 10 -4 10 -3 10 -2 10 -1 110 100 1000 0.5 1 10 100 300 single pulse r t ja = 175 o c/w t a = 25 o c p ( pk ) , peak transient power (w) t, pulse width (s) s i n g l e p u l s e m a x i m u m power dissipation figure 11. junction-to-ambient transient thermal response curve 10 -4 10 -3 10 -2 10 -1 11 0 100 1000 0.001 0.01 0.1 1 2 single pulse r t ja = 175 o c/w duty cycle-descending order normalized thermal impedance, z t ja t, rectangular pulse duration (sec) d = 0.5 0.2 0.1 0.05 0.02 0.01 p dm t 1 t 2 notes: duty factor: d = t 1 /t 2 peak t j = p dm x z t ja x r t ja + t a typical characteristics t j = 25 c unless otherwise noted
FDME905PT p-channel powertrench ? mosfet www.fairchildsemi.com 5 ?2011 fairchild semiconductor corporation FDME905PT rev.c2 dimensional outline and pad layout
6 www.fairchildsemi.com FDME905PT p-channel powertrench ? mosfet ?2011 fairchild semiconductor corporation FDME905PT rev.c2 trademarks the following includes registered and unregistered trademarks and service marks, owned by fairchild semiconductor and/or its gl obal subsidiaries, and is not intended to be an exhaustive list of all such trademarks. *trademarks of system general corporation, used under license by fairchild semiconductor. disclaimer fairchild semiconductor reserves the right to make changes wi thout further notice to any products herein to improve reliability, function, or design. fairchild does not assume an y liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. these specifications do not expand the terms of fairchild?s wo rldwide terms and conditions, specifically the warranty therein, which covers these products. life support policy fairchild?s products are not authorized for use as critical components in life support de vices or systems without the express written approval of fai rchild semiconductor corporation. as used here in: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms 2cool? 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