cha2093 rohs compliant ref. : dscha20933279 - 06 oct 03 1/8 specifications subject to change without notice united monolithic semiconductors s.a.s. route dpartementale 128 - b.p.46 - 91401 orsay cede x france tel. : +33 (0)1 69 33 03 08 - fax : +33 (0)1 69 33 03 09 20-30ghz low noise amplifier gaas monolithic microwave ic description the cha2093 is a two-stage wide band monolithic low noise amplifier. the circuit is manufactured with a standard phemt process: 0.25m gate length, via holes through the substrate, air bridges and electron beam gate lithography. it is supplied in chip form. main features broad band performance 20-30ghz 2.2db noise figure, 20-30ghz 15db gain, 0.5db gain flatness low dc power consumption, 50ma 20dbm 3rd order intercept point chip size: 1.67 x 1.03 x 0.1mm in out vg 1 vg 2 25 50 vd 0 2 4 6 8 10 12 14 16 18 20 10 15 20 25 30 35 40 frequency ( ghz ) gain ( db ) 0 1 2 3 4 5 6 7 8 9 10 noise figure ( db ) on wafer typical measurements. main characteristics tamb = +25c symbol parameter min typ max unit nf noise figure, 20-30ghz 2.2 3.0 db g gain 13 15 db d g gain flatness 0.5 1.0 db esd protections : electrostatic discharge sensitive device observe handling precautions !
cha2093 20-30ghz low noise amplifier ref. : dscha20933279 - 06 oct 03 2/8 specifications subject to change without notice route dpartementale 128 , b.p.46 - 91401 orsay ce dex - france tel.: +33 (0)1 69 33 03 08 - fax : +33 (0)1 69 3 3 03 09 electrical characteristics tamb = +25c, vd = +4v id=45ma symbol parameter min typ max unit fop operating frequency range 20 30 ghz g gain (1) 13 15 db d g gain flatness (1) 0.5 1.0 db nf noise figure (1) 2.2 3.0 db vswrin input vswr (1) 3.0:1 vswrout ouput vswr (1) 3.0:1 ip3 3rd order intercept point 20 dbm p1db output power at 1db gain compression 13 dbm id drain bias current 50 ma (1) these values are representative of on-wafer mea surements that are made without bonding wires at the rf ports.when the chip is atta ched with typical 0.15nh input and output bonding wires , the indicated parameter valu es should be improved. absolute maximum ratings (1) tamb = +25c symbol parameter values unit vd drain bias voltage 5.0 v pin maximum peak input power overdrive (2) +10 dbm top operating temperature range -40 to +85 c tstg storage temperature range -55 to +125 c (1) operation of this device above anyone of these paramaters may cause permanent damage. (2) duration < 1s.
20-30ghz low noise amplifier cha2093 ref. : dscha20933279 - 06 oct 03 3/8 specifications subject to change without notice route dpartementale 128 , b.p.46 - 91401 orsay ce dex - france tel.: +33 (0)1 69 33 03 08 - fax : +33 (0)1 69 3 3 03 09 typical results chip typical response (on wafer sij) tamb = +25c bias conditions : vd = +4v id=45ma freq ghz ms11 db ps11 ms12 db ps12 ms21 db ps21 ms22 db ps22 10 -1.36 140 -62.29 -138.5 4.35 51.6 -16.6 151.6 11 -1.98 121.9 -58.39 -130.1 7.36 27.2 -16.75 145.1 12 -2.93 101.1 -53.05 -130.3 9.77 0.8 -16.67 137.9 13 -4.5 77.7 -49.08 -146.8 11.61 -26.2 -16.77 129.8 14 -6.8 50.1 -46.97 -163.9 12.9 -53.2 -17.47 122.7 15 -10.02 16.4 -44.52 173.2 13.86 -78.7 -17.67 122. 2 16 -13.47 -30 -42.23 160.2 14.55 -103.5 -18.06 118. 4 17 -14.68 -86 -40.43 138.2 15 -127 -18.55 118.4 18 -13.76 -131 -39.41 126.2 15.36 -149.8 -18.7 125. 4 19 -12.83 -159.2 -38 104.7 15.69 -171.8 -17.9 131.3 20 -13.51 177.8 -36.01 92.4 15.79 165.6 -15.62 131. 1 21 -14.3 170.9 -34.99 63.7 15.96 144.3 -14.48 127 22 -14.74 167.2 -34.53 46.8 15.98 122.3 -13.4 120.5 23 -14.63 168 -34.46 24.6 15.84 102.1 -12.6 116.3 24 -14.15 163.4 -33.67 6.3 15.75 80.9 -11.67 107.1 25 -13.71 155.8 -33.27 -7.6 15.6 60.2 -11.4 100.6 26 -13.42 145.5 -32.65 -29.3 15.55 40.3 -11.3 96.1 27 -13.54 124.4 -32.6 -51.5 15.46 18.6 -10.33 91.6 28 -14.43 100.2 -32.49 -68.3 15.48 -2.8 -9.98 85.7 29 -14.48 56.9 -31.69 -88.8 15.48 -27.3 -8.88 80.2 30 -12.87 5.6 -31.87 -115.7 15.24 -53 -7.99 70.5 31 -8.84 -37.4 -31.22 -140.4 14.69 -82.2 -6.86 58.1 32 -5.55 -73.3 -31.23 -171 13.43 -112.8 -6.35 40.1 33 -3.72 -101.3 -32.96 159.7 11.43 -141.9 -6.69 20. 4 34 -2.5 -123.2 -34.73 134.8 9.01 -168.7 -7.51 1.5 35 -1.88 -141.2 -35.69 121.6 6.2 167.5 -8.65 -17 36 -1.52 -155.7 -35.69 98 3.35 145.9 -9.92 -36.6 37 -1.32 -167.5 -37.95 72.2 0.36 125.7 -11.17 -56.5 38 -1.07 -177.6 -38.15 56.8 -2.78 107.4 -12.15 -78. 9 39 -0.93 172.6 -43.41 86.9 -6.02 89 -12.5 -103.1 40 -0.82 164.7 -43.1 76.9 -9.59 71.9 -12.27 -127.3 41 -0.68 157.2 -43.1 44.4 -13.6 55.3 -11.82 -148.5 42 -0.52 149.5 -43.23 39.6 -18.24 40.2 -10.89 -166. 3 43 -0.5 142 -44.08 24 -24.6 27.2 -9.87 -179.6 44 -0.41 135.3 -45.8 21 -35.19 30.1 -8.91 167.4 45 -0.37 128.4 -45.05 18.1 -37.14 126.8 -8.04 156.2
cha2093 20-30ghz low noise amplifier ref. : dscha20933279 - 06 oct 03 4/8 specifications subject to change without notice route dpartementale 128 , b.p.46 - 91401 orsay ce dex - france tel.: +33 (0)1 69 33 03 08 - fax : +33 (0)1 69 3 3 03 09 typical results chip typical response ( on wafer sij ) : tamb = +25c vd = 4v ; id = 45ma -20 -15 -10 -5 0 5 10 15 20 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 frequency ( ghz ) gain, rloss ( db ) dbs11 dbs22 gain typical gain and matching measurements on wafer. 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 frequency ( ghz ) gain, nf ( db ) gain nf gab typical gain and noise figure measurements on wafe r
20-30ghz low noise amplifier cha2093 ref. : dscha20933279 - 06 oct 03 5/8 specifications subject to change without notice route dpartementale 128 , b.p.46 - 91401 orsay ce dex - france tel.: +33 (0)1 69 33 03 08 - fax : +33 (0)1 69 3 3 03 09 typical results tamb = +25c vd = 4v ; id = 45ma 0 2 4 6 8 10 12 14 16 -9 -8 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 input power (dbm) output power (dbm) 0 2 4 6 8 10 12 14 16 f=20ghz gass (db) pout gain 0 2 4 6 8 10 12 14 16 -3 -2 -1 0 1 2 3 4 5 6 7 input power (dbm) output power (dbm) 0 2 4 6 8 10 12 14 16 f=30ghz gass (db) pout gain typical output power and gain measurements in test jig (included losses of the jig)
cha2093 20-30ghz low noise amplifier ref. : dscha20933279 - 06 oct 03 6/8 specifications subject to change without notice route dpartementale 128 , b.p.46 - 91401 orsay ce dex - france tel.: +33 (0)1 69 33 03 08 - fax : +33 (0)1 69 3 3 03 09 typical chip assembly 25 50 to vd dc drain supply feed to vg1 dc gate supply feed to vg2 dc gate supply feed 100pf 100pf 100pf in out 7034 mechanical data
20-30ghz low noise amplifier cha2093 ref. : dscha20933279 - 06 oct 03 7/8 specifications subject to change without notice route dpartementale 128 , b.p.46 - 91401 orsay ce dex - france tel.: +33 (0)1 69 33 03 08 - fax : +33 (0)1 69 3 3 03 09 chip biasing this chip is a two stage amplifier, and flexibility is provided by the access to number of pads. the internal dc electrical schematic is given in or der to use these pads in a safe way. in out vg 1 vg 2 25 50 vd vds1 vds2 the two requirements are: n1: not exceed vds = 3.5v (internal drain to sour ce voltage) n2: not biased in such a way that vgs becomes posi tive. (internal gate to source voltage) we propose two standard biasing: low noise and low consumption: vd = 3.5v and id = 30ma ( vg1=vg2) low noise and high output power: vd = 4.0v and id = 45ma. a separate access to the gate voltages of the first and the output stage is provided. nominal bias is obtained for a typical current of 30ma for the output stage and 15 ma for the first stage. the first step to bias the amplifier is to tune the vg1 =-1v and vg2 to drive 30ma for the full amplifier. then vg1 is reduced to obtain 45 ma of current through t he amplifier.
cha2093 20-30ghz low noise amplifier ref. : dscha20933279 - 06 oct 03 8/8 specifications subject to change without notice route dpartementale 128 , b.p.46 - 91401 orsay ce dex - france tel.: +33 (0)1 69 33 03 08 - fax : +33 (0)1 69 3 3 03 09 ordering information chip form : cha2093-99f/00 information furnished is believed to be accurate an d reliable. however united monolithic semiconductors s.a.s. assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by impli cation or otherwise under any patent or patent rights of united monolithic semiconductors s.a.s. . specifications mentioned in this publication are subject to change without notice. this publication supersedes and re places all information previously supplied. united monolithic semiconductors s.a.s. products are not authorised for use as critical components in life support devices or s ystems without express written approval from united monolithic semiconductors s.a.s.
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