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1. general description the IP4774CZ14 is a vga or dvi-i interface intended for connection between a video transmitter such as a pc graphics card and a vga or dvi-i receiver, such as a pc monitor. the IP4774CZ14 has esd protection for the ddc lines, esd protection plus buffering for the h-sync line, and high-level esd protection diodes for the rgb video signal lines. the h-sync signal is buffered by a non-inverting buffer which can accept ttl-level input. the buffer convert ttl-level input to cmos-level output which swings between v cc(sync) and gnd. an external termination resistor can be added to achieve the desired termination, which is typically required for the h-sync line of the video interface. the IP4774CZ14 has a typical output resistance (r o ) of 10 w . 2. features n integrated high-level esd protection, buffering, sync-signal impedance matching n all pin connections have integrated rail-to-rail clamping diodes providing downstream esd protection of 8 kv according to iec 61000-4-2, level 4 n driver for h-sync line n line capacitance < 4 pf per channel 3. applications buffer and terminating channels, reduce emi/rfi and provide downstream esd protection for: n vga interfaces including ddc channels n desktop and notebook pcs, lcd tvs and pc monitors n graphics cards n set-top boxes n game consoles n dvd players IP4774CZ14 vga interface with integrated h-sync buffer, esd protection and termination resistor rev. 01 24 february 2009 objective data sheet
IP4774CZ14_1 ? nxp b.v. 2009. all rights reserved. objective data sheet rev. 01 24 february 2009 2 of 12 nxp semiconductors IP4774CZ14 vga port protection with sync buffer 4. ordering information 5. functional diagram table 1. ordering information type number package name description version IP4774CZ14 ssop14 plastic shrink small outline package; 14 leads; body width 5.3 mm sot337-1 the esd structure of the IP4774CZ14 enables a receiver and a transmitter application. fig 1. functional diagram 001aai178 video_1 1 14 9 2 3 10 8 6 7 4 5 v cc(video) gnd byp ddc_in1 ddc_in2 h_sync_in v_sync_in gnd 13 12 h_sync_out v cc(sync) video_2 video_3 11 n.c. IP4774CZ14
IP4774CZ14_1 ? nxp b.v. 2009. all rights reserved. objective data sheet rev. 01 24 february 2009 3 of 12 nxp semiconductors IP4774CZ14 vga port protection with sync buffer 6. pinning information 6.1 pinning 6.2 pin description fig 2. pinning con?guration IP4774CZ14 video_1 v cc(video) video_2 gnd video_3 h_sync_out h_sync_in n.c. v_sync_in gnd ddc_in1 v cc(sync) ddc_in2 byp 001aai179 1 2 3 4 5 6 7 8 10 9 12 11 14 13 table 2. pin description symbol pin description video_1 1 esd protection for video channel 1 video_2 2 esd protection for video channel 2 video_3 3 esd protection for video channel 3 h_sync_in 4 h-sync signal input v_sync_in 5 h-sync protection input ddc_in1 6 ddc signal input ddc_in2 7 ddc signal input byp 8 for connecting a 100 nf bypass capacitor to increase esd clamping performance for the ddc outputs v cc(sync) 9 supply voltage for sync buffer gnd 10 ground n.c. 11 not connected h_sync_out 12 h-sync signal output gnd 13 ground v cc(video) 14 supply voltage for video protection circuit
IP4774CZ14_1 ? nxp b.v. 2009. all rights reserved. objective data sheet rev. 01 24 february 2009 4 of 12 nxp semiconductors IP4774CZ14 vga port protection with sync buffer 7. limiting values [1] pins byp, v cc(video) and v cc(sync) must be bypassed to pin gnd via a low impedance ground plane with 100 nf. 8. characteristics table 3. limiting values in accordance with the absolute maximum rating system (iec 60134). symbol parameter conditions min max unit v cc(video) video supply voltage gnd - 0.5 5.5 v v cc(sync) synchronization supply voltage 3.0 5.5 v v i input voltage pins video_1, video_2, video_3 gnd - 0.5 v cc(video) v pins h_sync_in, v_sync_in, ddc_in1, ddc_in2 gnd - 0.5 v cc(sync) v v esd electrostatic discharge voltage iec 61000-4-2, level 4, contact [1] - 8+8kv p tot total power dissipation t amb = 25 c; f sync = 100 khz; c l = 6 nf; r l =10k w -50mw t stg storage temperature - 55 +125 c table 4. characteristics t amb = 25 c unless otherwise speci?ed. symbol parameter conditions min typ max unit analog video (rgb) i cc(video) supply current on pin v cc(video) v cc(video) = 5.0 v; static input signals - - 10 m a c ch channel capacitance v cc(video) = 5.0 v; f = 1 mhz; v i = 2.5 v (p-p); v bias = 2.5 v [1] --4pf i i input current v cc(video) = 5.0 v; v i = v cc(video) or gnd - - 1 m a v fd diode forward voltage i f = 1 ma - 0.7 - v ddc c ch channel capacitance f = 1 mhz; v i = 2.5 v (p-p); v bias = 2.5 v [1] --4pf i i input current v i = 5.0 v - - 1 m a v fd diode forward voltage i f = 1 ma - 0.7 - v h-sync buffer v cc(sync) synchronization supply voltage 3.0 5.0 5.5 v i cc(sync) supply current on pin v cc(sync) v cc(sync) = 5.0 v; static input signals [2] --10 m a c ch channel capacitance v cc(sync) = 5.0 v; f = 1 mhz; v i = 1.65 v [1] --4pf i i input current v cc(sync) = 5.0 v; v i = 2.5 v (p-p); v bias = 2.5 v [1] -- 1 m a v fd diode forward voltage i f = 1 ma - 0.7 - v v ih high-level input voltage v cc(sync) = 5.0 v [3] 2.0 - - v v il low-level input voltage v cc(sync) = 5.0 v [3] - - 0.6 v v oh high-level output voltage v cc(sync) = 5.0 v; i oh =24ma [3] 2.0 - v v ol low-level output voltage v cc(sync) = 5.0 v; i ol =24ma [3] - - 0.8 v r o output resistance [3] -10- w t plh low to high propagation delay v cc(sync) = 5.0 v; c l = 50 pf; t r(i) and t f(i) 5ns [1] --12ns
IP4774CZ14_1 ? nxp b.v. 2009. all rights reserved. objective data sheet rev. 01 24 february 2009 5 of 12 nxp semiconductors IP4774CZ14 vga port protection with sync buffer [1] guaranteed by design and characterization. [2] h-sync output unloaded. [3] these parameters apply only to the sync buffer; note that r o = r buffer . 9. application information the IP4774CZ14 should be placed as close as possible to the vga or dvi-i interface connector. the esd-protected channels on pins video_1, video_2 and video_3 can be connected in any order with rgb signals. the h-sync buffer is needed to have a low jitter for the sampling pll. the IP4774CZ14 is connected to the input lines of the vga connector to protect the vga port including all signals and buffering of the h-sync signal. t phl high to low propagation delay v cc(sync) = 5.0 v; c l = 50 pf; t r(i) and t f(i) 5ns [1] -12ns t r(o) output rise time v cc(sync) = 5.0 v; c l = 50 pf; t r(i) and t f(i) 5ns - 4 - ns t f(o) output fall time v cc(sync) = 5.0 v; c l = 50 pf; t r(i) and t f(i) 5ns - 4 - ns table 4. characteristics continued t amb = 25 c unless otherwise speci?ed. symbol parameter conditions min typ max unit fig 3. application diagram (transmitter) 001aai181 filter filter filter video_1 video_2 video_3 ddc_in1 red green blue hsync vsync ddc_clock ddc_data ddc_in2 h_sync_in v_sync_in v cc(video) hsync_out vcc_dac vcc_5v byp v cc(sync) gnd h_sync_out vsync_out red green blue rgb gnd sync_ gnd ddc_clock ddc_data IP4774CZ14
IP4774CZ14_1 ? nxp b.v. 2009. all rights reserved. objective data sheet rev. 01 24 february 2009 6 of 12 nxp semiconductors IP4774CZ14 vga port protection with sync buffer fig 4. application diagram (receiver) 001aai180 video_1 video_2 video_3 ddc_in1 red green blue hsync vsync ddc_clock ddc_data ddc_in2 h_sync_in v_sync_in v cc(video) hsync_out vcc_dac vcc_5v byp v cc(sync) gnd h_sync_out vsync_out red green blue rgb gnd sync_ gnd ddc_clock ddc_data IP4774CZ14
IP4774CZ14_1 ? nxp b.v. 2009. all rights reserved. objective data sheet rev. 01 24 february 2009 7 of 12 nxp semiconductors IP4774CZ14 vga port protection with sync buffer 10. package outline fig 5. package outline sot337-1 (ssop14) unit a 1 a 2 a 3 b p cd (1) e (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec jeita mm 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 6.4 6.0 5.4 5.2 0.65 1.25 0.2 7.9 7.6 1.03 0.63 0.9 0.7 1.4 0.9 8 0 o o 0.13 0.1 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.25 mm maximum per side are not included. sot337-1 99-12-27 03-02-19 (1) w m b p d h e e z e c v m a x a y 1 7 14 8 q a a 1 a 2 l p q detail x l (a ) 3 mo-150 pin 1 index 0 2.5 5 mm scale ssop14: plastic shrink small outline package; 14 leads; body width 5.3 mm sot337-1 a max. 2
IP4774CZ14_1 ? nxp b.v. 2009. all rights reserved. objective data sheet rev. 01 24 february 2009 8 of 12 nxp semiconductors IP4774CZ14 vga port protection with sync buffer 11. soldering of smd packages this text provides a very brief insight into a complex technology. a more in-depth account of soldering ics can be found in application note an10365 surface mount re?ow soldering description . 11.1 introduction to soldering soldering is one of the most common methods through which packages are attached to printed circuit boards (pcbs), to form electrical circuits. the soldered joint provides both the mechanical and the electrical connection. there is no single soldering method that is ideal for all ic packages. wave soldering is often preferred when through-hole and surface mount devices (smds) are mixed on one printed wiring board; however, it is not suitable for ?ne pitch smds. re?ow soldering is ideal for the small pitches and high densities that come with increased miniaturization. 11.2 wave and re?ow soldering wave soldering is a joining technology in which the joints are made by solder coming from a standing wave of liquid solder. the wave soldering process is suitable for the following: ? through-hole components ? leaded or leadless smds, which are glued to the surface of the printed circuit board not all smds can be wave soldered. packages with solder balls, and some leadless packages which have solder lands underneath the body, cannot be wave soldered. also, leaded smds with leads having a pitch smaller than ~0.6 mm cannot be wave soldered, due to an increased probability of bridging. the re?ow soldering process involves applying solder paste to a board, followed by component placement and exposure to a temperature pro?le. leaded packages, packages with solder balls, and leadless packages are all re?ow solderable. key characteristics in both wave and re?ow soldering are: ? board speci?cations, including the board ?nish, solder masks and vias ? package footprints, including solder thieves and orientation ? the moisture sensitivity level of the packages ? package placement ? inspection and repair ? lead-free soldering versus snpb soldering 11.3 wave soldering key characteristics in wave soldering are: ? process issues, such as application of adhesive and ?ux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave ? solder bath speci?cations, including temperature and impurities
IP4774CZ14_1 ? nxp b.v. 2009. all rights reserved. objective data sheet rev. 01 24 february 2009 9 of 12 nxp semiconductors IP4774CZ14 vga port protection with sync buffer 11.4 re?ow soldering key characteristics in re?ow soldering are: ? lead-free versus snpb soldering; note that a lead-free re?ow process usually leads to higher minimum peak temperatures (see figure 6 ) than a snpb process, thus reducing the process window ? solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board ? re?ow temperature pro?le; this pro?le includes preheat, re?ow (in which the board is heated to the peak temperature) and cooling down. it is imperative that the peak temperature is high enough for the solder to make reliable solder joints (a solder paste characteristic). in addition, the peak temperature must be low enough that the packages and/or boards are not damaged. the peak temperature of the package depends on package thickness and volume and is classi?ed in accordance with t ab le 5 and 6 moisture sensitivity precautions, as indicated on the packing, must be respected at all times. studies have shown that small packages reach higher temperatures during re?ow soldering, see figure 6 . table 5. snpb eutectic process (from j-std-020c) package thickness (mm) package re?ow temperature ( c) volume (mm 3 ) < 350 3 350 < 2.5 235 220 3 2.5 220 220 table 6. lead-free process (from j-std-020c) package thickness (mm) package re?ow temperature ( c) volume (mm 3 ) < 350 350 to 2000 > 2000 < 1.6 260 260 260 1.6 to 2.5 260 250 245 > 2.5 250 245 245
IP4774CZ14_1 ? nxp b.v. 2009. all rights reserved. objective data sheet rev. 01 24 february 2009 10 of 12 nxp semiconductors IP4774CZ14 vga port protection with sync buffer for further information on temperature pro?les, refer to application note an10365 surface mount re?ow soldering description . 12. abbreviations 13. revision history msl: moisture sensitivity level fig 6. temperature pro?les for large and small components 001aac844 temperature time minimum peak temperature = minimum soldering temperature maximum peak temperature = msl limit, damage level peak temperature table 7. abbreviations acronym description ddc display data channel dvi-i digital visual interface integrated (analog and digital) emi electromagnetic interference esd electrostatic discharge pll phase-locked loop rfi radio frequency interference rgb red, green, blue ttl transistor-transistor logic vga video graphics array table 8. revision history document id release date data sheet status change notice supersedes IP4774CZ14_1 20090224 objective data sheet - -
IP4774CZ14_1 ? nxp b.v. 2009. all rights reserved. objective data sheet rev. 01 24 february 2009 11 of 12 nxp semiconductors IP4774CZ14 vga port protection with sync buffer 14. legal information 14.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term short data sheet is explained in section de?nitions. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple dev ices. the latest product status information is available on the internet at url http://www .nxp .com . 14.2 de?nitions draft the document is a draft version only. the content is still under internal review and subject to formal approval, which may result in modi?cations or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. short data sheet a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request via the local nxp semiconductors sales of?ce. in case of any inconsistency or con?ict with the short data sheet, the full data sheet shall prevail. 14.3 disclaimers general information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. right to make changes nxp semiconductors reserves the right to make changes to information published in this document, including without limitation speci?cations and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use nxp semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors accepts no liability for inclusion and/or use of nxp semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customers own risk. applications applications that are described herein for any of these products are for illustrative purposes only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the speci?ed use without further testing or modi?cation. limiting values stress above one or more limiting values (as de?ned in the absolute maximum ratings system of iec 60134) may cause permanent damage to the device. limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the characteristics sections of this document is not implied. exposure to limiting values for extended periods may affect device reliability. terms and conditions of sale nxp semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www .nxp .com/pro? le/ter ms , including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by nxp semiconductors. in case of any inconsistency or con?ict between information in this document and such terms and conditions, the latter will prevail. no offer to sell or license nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 14.4 trademarks notice: all referenced brands, product names, service names and trademarks are the property of their respective owners. 15. contact information for more information, please visit: http://www .nxp.com for sales of?ce addresses, please send an email to: salesad dresses@nxp.com document status [1] [2] product status [3] de?nition objective [short] data sheet development this document contains data from the objective speci?cation for product development. preliminary [short] data sheet quali?cation this document contains data from the preliminary speci?cation. product [short] data sheet production this document contains the product speci?cation.
nxp semiconductors IP4774CZ14 vga port protection with sync buffer ? nxp b.v. 2009. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com date of release: 24 february 2009 document identifier: IP4774CZ14_1 please be aware that important notices concerning this document and the product(s) described herein, have been included in section legal information. 16. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 8 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 4 9 application information. . . . . . . . . . . . . . . . . . . 5 10 package outline . . . . . . . . . . . . . . . . . . . . . . . . . 7 11 soldering of smd packages . . . . . . . . . . . . . . . 8 11.1 introduction to soldering . . . . . . . . . . . . . . . . . . 8 11.2 wave and re?ow soldering . . . . . . . . . . . . . . . . 8 11.3 wave soldering . . . . . . . . . . . . . . . . . . . . . . . . . 8 11.4 re?ow soldering . . . . . . . . . . . . . . . . . . . . . . . . 9 12 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 10 13 revision history . . . . . . . . . . . . . . . . . . . . . . . . 10 14 legal information. . . . . . . . . . . . . . . . . . . . . . . 11 14.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 11 14.2 de?nitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 14.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 14.4 trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 15 contact information. . . . . . . . . . . . . . . . . . . . . 11 16 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

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