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1/22 march 2005 AN1957 application note microprocessor supervisor functions designers of microprocessor systems have to achieve high reliability, in the face of a large number of threats to stability or even correct functioning (such as, voltage drops, glitches, long ramp-up times, pro- grams stuck in endless loops, etc.). supervisor circuits, from stmicroelectronics, provide highly effective solutions for minimizing the risks of system failure, and for ensuring the safe running of the system, at a low cost. the members of the st supervisor family offer various combinations of functions. this application note describes the main supervisor functions and features, to help the user to under- stand their principles and the advantages of using them, through the description of waveforms, recom- mended values, and hardware hookup diagrams. overview of st supervisors ? microprocessor supervisors stm705, stm706, stm706t/s/r, stm707, stm708, stm708t/s/r, stm813l, stm706p, stm6321l/m, stm6321t/s/r, stm6821l/m, stm6821t/s/r, stm6823l/m, stm6823t/s/r, stm6824l/m, stm6824t/s/r, stm6825l/m, stm6825t/s/r ? microprocessor supervisors with switchover m40sz100w, m40z111, m40z300w, stm690a, stm692a, stm690t/s/r, stm802l/m, stm802t/ s/r, stm703, stm704, stm704t/s/r, stm806t/s /r, stm805l, stm805t/s/r, stm804t/s/r, stm817l/m, stm818l/m, stm819l/m, stm795t/s/r ? timekeeper? supervisors m41st95w, m41st87w, m41st87y, m41st85w, m41st85y, m41t315v, m48t201v, m48t201y, m48t212v this application note is dedicated to the microprocessor supervisor and microprocessor supervisor with switchover families.
2/22 AN1957 - application note table of contents overview of st supervisors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 1. supervisor options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 power-on reset and low voltage detect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 block diagram showing the supervisor reset feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 1. supervisor reset features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 reset waveforms for the microprocessor supervisor devices . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 2. power-on reset and low voltage detect waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 2. reset timings for the stm703/704 supervisor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 3. reset thresholds (v rst ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 hardware hookup for the stm703/704 supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 3. hardware hookup for the stm703/704 supervisor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 power-fail comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 block diagram of a power-fail comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 4. block diagram of a power-fail comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 hardware hookup for the stm692a supervisor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 example calculation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 4. recommended resistances for some v trip voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 5. hardware hookup for the stm692a supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 example of power-fail waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 6. voltage drop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 5. power-fail values for all microprocessor supervisors (except for the devices mentioned in table 6. ). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 6. power-fail values for 3v microprocessor supervisors with battery switchover (stm690/704/802/804/805/806) . . . . . . . . . . . . . . . . . . . . . . . . 10 watchdog timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 7. logic diagram of a watchdog timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 8. watchdog timer input and output waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 7. watchdog timer time-out value for the stm705 supervisor . . . . . . . . . . . . . . . . . . . . . 11 hardware hookup for the stm705 supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 9. hardware hookup for the stm705 supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 battery switchover. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 10.block diagram of a battery switchover device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 switchover waveforms for the stm806r supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 11.battery switchover waveforms for the stm806r supervisor. . . . . . . . . . . . . . . . . . . . . 14 figure 12.switchover waveforms with hysteresis details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 table 8. switchover values for the stm806r supervisor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 hardware hookup for the stm806r supervisor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 13.hardware hookup for the stm806r supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 hardware hookup for the stm795 supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 14.hardware hookup for the stm795 supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3/22 AN1957 - application note chip enable gating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 15.chip enable gating block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 typical waveforms for the stm818 supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 16.typical waveforms for the stm818 supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 table 9. typical values for the stm818 supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 hardware hookup for the stm818 supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 17.hardware hookup for the stm818 supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 battery freshness seal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 18.typical waveforms for the stm817/818/819 supervisors . . . . . . . . . . . . . . . . . . . . . . . 20 conclusion. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 references . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 table 10. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4/22 AN1957 - application note table 1. supervisor options note: 1. push-pull output (unless otherwise specified). 2. open drain output. 3. stm690a has a typical reset threshold of 4.65v and stm692a has a typical reset threshold of 4.40v. 4. stm703 has a typical reset threshold of 4.65v and stm704 has a typical reset threshold of 4.40v. 5. stm705 has a typical reset threshold of 4.63v and stm706 has a typical reset threshold of 4.38v. 6. the stm706p is identical to the stm706r, except for its reset output which is active high. 7. stm804t/s/r and stm805t/s/r have different minimum and maximum reset thresholds with v cc falling and v cc rising (see datasheet). 3v or 5v supervisor battery switch over watchdog input watchdog output active low r st (1) active high rst (1) manual reset input power-fail comparator chip- enable gating battery freshness seal stm690t/s/r 3v !! ! ! stm690a (3) 5v !! ! ! stm692a (3) 5v !! ! ! stm703 (4) 5v !!!! stm704 (4) 5v !!!! stm704t/s/r 3v !!!! stm705 (5) 5v !!! !! stm706 (5) 5v !!! !! stm706t/s/r 3v !!! !! stm706p (6) 3v !! !!! stm707 5v !! ! ! stm708 5v !! ! ! stm708t/s/r 3v !! ! ! stm795t/s/r 3v ! ! (2) ! stm802l/m 5v !! ! ! stm802t/s/r 3v !! ! ! stm804t/s/r (7) 3v !! ! (2) ! stm805t/s/t (7) 3v !! ! (2) ! stm805l 5v !! ! ! stm806t/s/r 3v !!!! stm813l 5v !! !!! stm817l/m 5v !! ! ! ! stm818l/m 5v !! ! !! stm819l/m 5v !!!!!
5/22 AN1957 - application note power-on reset and low voltage detect after system start-up, a certain period of time is required for the power supply voltage to stabilize. for this reason, st supervisor devices generate a reset pulse after power-up (the minimum pulse width is t rec = 140ms, see table 2. ). over the t rec period, during which reset is asserted, the clock is stabilized and the registers are set to their default values. this function is called power-on reset (por). some designers attempt to use rc circuits, instead of a reset implementation, because it is cheaper. but it is also unsafe and unreliable. rc circuits are not suitable for use as professional devices in industrial environments (see references section, an1772). another major function is low voltage detect (lvd), which detects power supply brownouts and glitches. whenever v cc falls below the reset threshold (v rst ), the reset output is asserted and remains so t rec after v cc increases above the v rst threshold. in the case of an rc circuit, no minimum reset pulse width is guaranteed. also, if the triggering event is a narrow glitch, an rc circuit will only generate a poor reset, which may lead to malfunctioning of the microprocessor (failing to load registers correctly, executing in- valid instructions, processing incorrect data, etc.). some supervisor devices include a manual reset input (m r ) that can be used by the user, or the external device, to generate a reset. typically, a low-cost push-button switch is connected to the manual reset input, which allows the user to restart the processor without turning off the power. no additional compo- nents are needed because supervisor devices already include a debounce circuit that filters the noise of contact closure. this function can be used to debug, to perform the final test of a processor, or to restart a processor that is locked. the reset button is also useful in systems where the processor is never turned off, even when the system is in off mode. some processors include an internal reset that operates cor- rectly under stable power supply conditions, but usually has difficulties in handling voltage drops and tran- sients as well as looser tolerances for v rst . the use of an external reset is therefore recommended. block diagram showing the supervisor reset feature figure 1. illustrates the power-on reset, low voltage detect and manual reset features. the reset is asserted if one of the following events occurs: system start-up; brownout, voltage drop, significant transient or glitch, negative voltage spike etc. on the power supply line; manual reset. figure 1. supervisor reset features note: v cc is the supply voltage, mr is the manual reset input. r st and rst are reset outputs. supervisor devices can have an active-low output (r st ), an active-high output (rst) or both. mr rst reset power-on reset low voltage detect v cc ai10104 rst
6/22 AN1957 - application note reset waveforms for the microprocessor supervisor devices when the input voltage level reaches the reset threshold (v rst ) after system power-up, the supervisor holds the reset output signal (rst ) low for a minimum time of t rec before driving it high again (see figure 2. ). switching the manual reset signal (m r ) to low, causes the rst signal to go low. rst remains low as long as mr is kept low, and returns high t rec after mr has been released. all microprocessor supervisor devices have glitch immunity. that is, the minimum mr pulse width re- quired to reset the output is fixed. all shorter pulses are ignored. the supervisor also reacts to voltage drops, brownouts and significant glitches. if the input voltage falls below v rst , the reset output is asserted. note that some supervisor devices have a reset output that is active high (rst). they therefore have a waveform that is the inversion of the one that is shown in figure 2. figure 2. power-on reset and low voltage detect waveforms note: v rst is the reset threshold, see table 3. for values. table 2. reset timings for the stm703/704 supervisor table 3. reset thresholds (v rst ) symbol alt parameter value unit t mlmh t mr mr pulse width min. 150 ns t mlrl t mrd mr to rst output delay max. 250 ns t rec v rst to rst high and mr high to rst high min. 140 ms manual reset glitch immunity typ. 100 ns supervisor reset threshold (v rst ) unit min. typ. max. stm706p/70xr 2.55 2.63 2.70 v stm70xs 2.85 2.93 3.00 v stm70xt 3.00 3.08 3.15 v stm692a/704/706/708, 8xxm 4.25 4.40 4.50 v stm690a/703/705/707, 8xxl 4.50 4.65 4.75 v v cc v rst power-up voltage drop mr rst t rec manual reset t mlrl t mlmh t rec t rec manual reset glitch immunity ai10105
7/22 AN1957 - application note hardware hookup for the stm703/704 supervisor in the example of figure 3. , the reset output is asserted in three cases: during system power-up, until v cc is stabilized (v cc is greater than v rst ) for a duration of t rec after a v cc drop (v cc falls below v rst ) by pressing the manual reset push-button (the reset button should be held for at least for t mlmh ). the manual reset input is not necessarily connected to a physical push button switch, it can also be con- nected to a peripheral, provided that a minimum mr pulse width of 150ns is ensured. if the reset circuit is placed in a noisy environment, or if mr is driven from long cables, it is recommended to use an external 0.1f capacitor, as shown in figure 3. the mr input includes an internal pull-up resistor. so in applications where the mr input is not used, the pin can be left unconnected. the mr input can be driven with a ttl output, a cmos output, or an open drain output. it is always appropriate to connect a decoupling capacitor in parallel with the power supply. the recom- mended value is 1f. figure 3. hardware hookup for the stm703/704 supervisor v cc v cc c 2 gnd reset button rst microprocessor 1 2 3 45 6 7 8 v out v cc v ss pfi pf0 mr rst v bat stm703/704 0.1f ai10106 so8/tssop8 1f c 1
8/22 AN1957 - application note power-fail comparator inadvertent or unexpected power loss can cause a number of malfunctions in a system (data loss, uncon- trolled program status, indeterminate processor state, etc.). for a reliable design, systems should receive early power failure warning, to leave enough time for the microprocessor to start a safeguard routine, for backing up crucial data, registers, etc. power-fail comparators are used to monitor unregulated power supplies. their reaction to power loss is very fast, and can provide enough time to execute all the necessary safeguard processes that precede an expected power failure (see references section, an1336). block diagram of a power-fail comparator the power-fail comparator works like an ordinary comparator with hysteresis (see figure 4. ). the power- fail input (pfi) is compared to an internal reference voltage, the power-fail threshold, v pfi . if the voltage on pfi is less than v pfi , the power-fail output (pfo ) is asserted. figure 4. block diagram of a power-fail comparator hardware hookup for the stm692a supervisor the power-fail comparator can be used in many different ways. it is most commonly used as an early power-fail warning (see figure 5. ) to monitor an unregulated supply voltage. two external resistors r 1 and r 2 form a voltage divider to set the voltage level (v trip ) below which p fo is asserted (see the waveforms shown in figure 6. ). usually, a value is selected for r 2 , then r 1 is derived using the following formula: , where v pfi = 1.25v. the sum of the resistances should be about 1m ? to minimize power consumption, and the tolerance of the resistor should not exceed 1%, to ensure that there are not large variations in the sensed voltage. example calculation. we have: v trip = 11.5v and v pfi = 1.25v. let us put: r 2 = 100k ? r 1 is calculated as follows: thus r 1 = 820k ?. pfo pfi v pfi ai10107 r 1 r 2 v trip v pfi ? v pfi -------------------------- ---- = r 1 r 2 v trip v pfi ? v pfi ------------------------------ 100 10 3 11.5 1.25 ? 1.25 -------------------------- ? 820k ? == =
9/22 AN1957 - application note table 4. recommended resistances for some v trip voltages figure 5. hardware hookup for the stm692a supervisor v trip (v) r 1 (k ? )r 2 (k ? ) 8.5 750 130 10.0 910 130 11.5 820 100 12.5 820 91 15.0 1100 100 v cc v cc gnd nmi microprocessor 1 2 3 45 6 7 8 v out v cc v ss pfi pf0 wdi rst v bat stm692a ai10108 so8/tssop8 regulator r 1 r 2 power supply ~220v ~120v v unreg v pfi c 1f
10/22 AN1957 - application note example of power-fail waveforms figure 6. shows the case of a voltage drop. the unregulated power supply voltage (v unreg ) begins to decrease. as it falls below v trip , at t 0 in figure 6. , p fo is asserted, invoking a non-maskable interrupt in the microprocessor, and causing the execution of the safeguard routine. the microprocessor continues operating until reset is asserted. from t 1 , the power supply voltage (v cc ) starts to fall. at t 2 reset is as- serted and write protect occurs. this means that the safeguard routine cannot last more than t 2 ? t 0 . figure 6. voltage drop note: at t 0 the voltage drop is detected; at t 1 v cc begins to fall; at t 2 reset is asserted and/or write protect occurs. table 5. power-fail values for all microprocessor supervisors (except for the devices mentioned in table 6. ) table 6. power-fail values for 3v microprocessor supervisors with battery switchover (stm690/704/802/804/805/806) symbol parameter value unit v pfi power-fail threshold typ. 1.25 v symbol parameter value unit v pfi power-fail threshold typ. 1.237 v v unreg, v cc v rst v unreg voltage drop +12v +11.5v +5v +4.4v v trip v pfo t t t 0 t 1 t 2 ai10109 v cc
11/22 AN1957 - application note watchdog timer the role of a watchdog timer is to prevent system failures that are caused by certain types of hardware errors (non-responding peripherals, bus contention etc.) or software errors (bad code jump, code stuck in loop etc.). the watchdog timer has an input, wdi, and an output, wdo (see figure 7. ). the input is used to clear the timer periodically within the specified time-out period, t wd (see table 7. ). while the system is operating correctly, it periodically toggles the watchdog input, wdi (see figure 8. ). if the system fails, the watchdog timer is not reset, and a system alert is generated: the watchdog output, wdo , or the reset output, is asserted (see figure 8. ). some microprocessors have an integrated watchdog timer, with a time-out period that is software-adjust- able. the great disadvantage of this solution, though, is that the integrated watchdog timer uses the same power supply, and clock signal, as the microprocessor. so, a system malfunction may also lead to a failure of the watchdog timer. figure 7. logic diagram of a watchdog timer note: 1. wdi is the watchdog input, w do is the watchdog output. figure 8. watchdog timer input and output waveforms note: 1. wdi signal frequencies greater then 50mhz (20ns period) will be filtered. 2. t wd is the watchdog time-out period. see table 7. for value. table 7. watchdog timer time-out value for the stm705 supervisor note: this t wd value is valid for all microprocessor supervisors. symbol description value unit t wd watchdog time-out period typ. 1.6 s wdi wdo watchdog timer ai10110 t wdi correct operation of the system system failure system restart correct operation of the system t wdo t wd ai10111
12/22 AN1957 - application note hardware hookup for the stm705 supervisor wdi is usually connected to the output pin of the microprocessor as shown in figure 5. and wdo is tied to the microprocessor non-maskable interrupt (n mi ) or reset input. the code should take care of clearing the watchdog timer within the time-out period by toggling the micro- processor?s i/o pin. figure 9. hardware hookup for the stm705 supervisor in any case, if v cc drops below the reset threshold (v rst ), wdo goes low even if the watchdog timer has not timed out. the timer remains cleared and does not count for as long as reset is asserted. the counter automatically restarts after t rec expires. in 5v supply devices, the watchdog function may be disabled by floating wdi or tri-stating the driver that is connected to wdi. v cc nmi microprocessor 1 2 3 45 6 7 8 wdi v cc v ss pfi pf0 mr rst wdo stm705 ai10112 i/o so8 c 1f
13/22 AN1957 - application note battery switchover a common task of battery switchover devices is to provide an uninterrupted power supply to external de- vices in the event of voltage drops and brownouts. battery switchover devices can also be useful in portable devices. when the external power supply (such as the ac power supply adapter) is disconnected, the battery switchover device switches to the internal supply (such as a battery). the use of a battery switchover has the following advantages: providing continuous and reliable service, even if the external supply fails extending the battery lifetime debouncing the power spikes occurring while connecting and disconnecting the ac adapter. battery switchover devices can be used as a main power supply backup for mcus, memories and other peripherals, and to prevent system failures (see figure 10. ). diode-or connections are often used as an equivalent solution. however the diode voltage drop repre- sents a large percentage of the battery voltage, and power supply spikes are not filtered. with an st su- pervisor, the device is supplied from the main power supply as long as the voltage is high enough, even if the battery voltage is greater than the power supply voltage, which saves the battery and extends its lifetime. instead of a backup battery it is also possible to use a backup capacitor. recommended capacitor values start from 0.1f. the battery switchover device monitors the power supply voltage, v cc , which is compared to the refer- ence voltage, v so , as shown in figure 11. if v cc drops too low, the v out output is switched to the battery voltage, v bat . the comparator includes hysteresis for noise immunity purposes. figure 10. block diagram of a battery switchover device v so v bat v cc v out ai10113
14/22 AN1957 - application note switchover waveforms for the stm806r supervisor the battery backup switchover voltage (v so ) depends on the battery voltage (v bat ) and on the switcho- ver threshold, v sw (see figure 11. ). if v sw is lower than v bat , v so is equal to v sw . if v sw is greater than v bat , v so is equal to v bat . whenever v cc falls below v so , the v out output is connected to the battery, v bat (see figure 11. ). figure 11. battery switchover waveforms for the stm806r supervisor note: the red line represents the switchover voltage (v so ). the blue line represents the battery switchover circuit output voltage (v out ), which is switched to v cc , or to v bat depending on the voltage magnitude. v so v bat v cc , v bat v out v sw voltage drop voltage drop v bat > v sw , then v so = v sw v bat < v sw , then v so = v bat v sw v bat v out v cc v so ai10114 v cc
15/22 AN1957 - application note stm806r has a voltage hysteresis of 40mv, which gives it good noise immunity. the hysteresis depends on v bat and v sw as illustrated in figure 12. : if v bat > v sw and v cc falls, the battery switchover detects the switchover threshold v sw and switches v out to the backup battery supply. when v cc rises, the voltage level v sw + 40mv is detected and v out is switched back to the main power supply (v cc ). if v bat < v sw and v cc falls, the battery switchover detects the voltage level v bat ? 75mv and switches v out to the backup battery supply. when v cc rises, the voltage level v bat ? 35mv is detected and v out is switched back to the main power supply (v cc ). figure 12. switchover waveforms with hysteresis details table 8. switchover values for the stm806r supervisor symbol description condition typical value unit v sw threshold 2.4 v v hys hysteresis 40 mv v so battery backup switchover voltage v bat < v sw v so = v bat v v bat > v sw v so = v sw v v so v bat v cc , v bat v out v sw voltage drop voltage drop v bat > v sw , then v so = v sw v bat < v sw , then v so = v bat v sw v bat v out v cc v so ai10115 v cc v bat v sw v sw + 40mv v cc v bat v sw v bat ? 75mv v bat ? 35mv v cc v out v cc v out v cc
16/22 AN1957 - application note hardware hookup for the stm806r supervisor figure 13. shows one particular hardware hookup, using the stm806r supervisor to switch the power supply source, with good efficiency and without introducing any switching noise. in this case, the battery switchover backups the main power supply of mcu, memories and other periph- erals. if sufficient power is available from the backup supply, the system can continue working normally. however it is also possible to run a safeguard routine, and to force the system to the low-power mode, so that the backup power supply can last longer, until the main power supply is restored. figure 13. hardware hookup for the stm806r supervisor hardware hookup for the stm795 supervisor the v out output is able to switch 75ma (maximum). if the peripherals have greater current needs, it is possible to use the vccsw output of the stm795 device, and to drive the gate of the external pmos tran- sistor (as shown in figure 14. ). when v out switches to the battery, the vccsw goes high. when v out switches back to v cc , vccsw goes low again, and the transistor provides current directly from the power supply. figure 14. hardware hookup for the stm795 supervisor v cc v cc c 1f gnd sram 1 2 3 45 6 7 8 v out v cc v ss pfi pf0 mr rst v bat stm806r ai10263 3v battery so8/tssop8 v cc v cc c 1f gnd microprocessor 1 2 3 45 6 7 8 v out v cc v ccsw v ss e e con rst v bat stm795r ai10264 v cc gnd sram 3v battery so8/tssop8
17/22 AN1957 - application note chip enable gating internal gating of the chip enable signal prevents erroneous data from corrupting the external sram, in the event of an under-voltage condition. the chip enable signal, which normally goes directly from the microcontroller to the sram, is routed instead through the supervisor device. the short propagation delay enables the chip enable gating to be used with most microcontrollers. during normal operation (when reset is not asserted), the chip enable signal is transmitted through the supervisor device unaltered. when reset is asserted, the sram is placed in its low power mode and the memory is inaccessible. in this way, the sram contents are protected from data corruption. chip enable gating uses a series transmission gate from e to e con (see figure 15. ). during normal oper- ation (with reset not asserted), the e transmission gate is enabled, and passes all e transitions. at that time, the impedance of e appears as a resistor, typically about 40 ? , in series with the load at e con . when reset is asserted, the transmission path becomes disabled. in the disabled mode, e becomes high impedance, the transmission gate is turned off, and an active pull-up connects e con to v out . this pull- up turns off again, when the transmission gate is enabled. figure 15. chip enable gating block diagram note: connect e to v ss if unused. ai10265 t rec generator e e con output control rst v out e con v cc v rst comparator
18/22 AN1957 - application note typical waveforms for the stm818 supervisor after power-up, the e con output stays high for a period of t rec (see figure 16. ). after this it starts to pass the e input signal on. while reset is asserted, the chip-enable transmission gate is disabled, e is high impedance, and an active pull-up connects e con to v out (disabled mode). if the voltage at e is high during a power-down se- quence (when v cc passes the reset threshold), the chip-enable transmission gate is disabled, and e im- mediately becomes high impedance. if e is low when reset is asserted, the chip-enable transmission gate will be disabled 15s after reset is asserted. this permits the current write cycle to complete during power-down. any time a reset is generated, the chip-enable transmission gate remains disabled, and e remains high impedance (regardless of any activity on e ) for the reset time-out period. the propagation delay through the chip-enable transmission gate depends on v cc , the source impedance of the drive connected to e , and the loading on e con . for the minimum propagation delay, minimize the capacitive load on e con and use a low-output impedance driver. figure 16. typical waveforms for the stm818 supervisor note: the chip enable gating function is also implemented on the stm795 device. nevertheless there are two differences, in compa rison to the stm818. firstly the e con signal is held high only for half of the t rec period, and secondly the chip-enable transmission gate is disabled only 10s after reset is asserted if the e input is low. table 9. typical values for the stm818 supervisor description typical value unit e -to-e con resistance 40 ? reset-to-e con high delay (power-down) 15 s e -to-e con propagation delay 2ns e con short circuit current 0.75 ma ai10266 v rst v cc e con rst e t rec v bat 15s t rec v bat
19/22 AN1957 - application note hardware hookup for the stm818 supervisor figure 17. illustrates the hookup of the stm818 supervisor circuit connected to a microprocessor and an sram memory. all the functions of the stm818 are used (battery switchover, watchdog, chip enable gat- ing, power-on reset, low voltage detect). the chip enable signal is decoded by the address decoder and it goes to the e input of the supervisor circuit. the e con output is connected to the c s (chip select input) of the sram memory. figure 17. hardware hookup for the stm818 supervisor v cc v cc c 1f gnd microprocessor 1 2 3 45 6 7 8 v out v cc v ss ee con wdi rst v bat stm818 ai10267 v cc gnd sram 3v battery rst i/o cs address decoder a0-a15 a0-axx so8/tssop8
20/22 AN1957 - application note battery freshness seal the battery freshness seal is a feature that is available on the stm817/818/819. it disconnects the back- up battery from the internal circuitry and v out until it is needed. this allows an oem (original equipment manufacturer) to ensure that the backup battery connected to v bat will still be fresh when the final product is put to use. to enable the freshness seal on the stm817 and stm819: 1. connect a battery to v bat 2. ground pfo 3. bring v cc above the reset threshold voltage, and hold it there until reset is deasserted, following the reset timeout period 4. bring v cc low again (see figure 18. ). for the stm818, use the same procedure, but ground e con instead of pfo . once the battery freshness seal has enabled (disconnecting the backup battery from internal circuitry and anything that is connected to v out ), it remains enabled until v cc is next brought above v rst . figure 18. typical waveforms for the stm817/818/819 supervisors note: 1. for the stm818, e con is held low, externally. the e con state is latched half way through the t rec period, and the freshness seal function is enabled. 2. for the stm817 and stm819, pfo is held low, externally. the pfo state is latched half way through the t rec period, and the freshness seal function is enabled. conclusion st microprocessor supervisors have a large range of features adapted to the user?s needs: centralised function for managing a system reset. early warning of power failure, in time to initiate any safeguard routines. watchdog timer, monitoring for cessation of normal processor activity. battery switchover, either to allow continued operation, or to maintain minimum functionality. also useful for the regulation of noisy power supplies. battery freshness seal, for maintaining the battery life on the production line, for the end user. st microprocessor supervisors are the ideal choice for adding protection to applications that are used in noisy environments and require power supply monitoring for proper operation. ai10268 v rst v cc rst t rec
21/22 AN1957 - application note references an1772 : how to control power-up/reset and monitor the voltage in microprocessor systems using st reset circuits. an1336 : power-fail comparator for nvram supervisory devices. r evision history table 10. document revision history date version revision details 15-mar-2005 1 first issue
22/22 AN1957 - application note if you h ave any ques ti ons or sugges ti ons concern i ng th e ma tt ers ra i se d i n thi s d ocumen t , p l ease re f er t o th e mpg request support web page: http://www.st.com/askmemory information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicati on are subject to change without notice. this publication supersedes and replac es all information previously supplied. stmicroelectronics prod ucts are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectro nics. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners ? 2005 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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