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application the connor-winfield MSTM-S3-T2 simplified control timing module acts as a complete system clock module for stratum 3 timing applications in accordance with gr- 1244, issue 2 and gr-253, issue 3. connor winfield?s stratum 3 timing modules helps reduce the cost of your design by minimizing your development time and maximizing your control of the system clock with our simplified design. features 5v miniature timing module redundant 8khz references 40 sec., filtered, hold over history .37 ppm hold over during initial 24 hours 4.6 ppm free run accuracy hitless reference switching MSTM-S3-T2 stratum 3 timing module 2111 comprehensive drive aurora, illinois 60505 phone: 630- 851- 4722 fax: 630-851-5040 www.conwin.com bulletin tm053 page 1 of 20 revision 00 date 14 may 03 issued by mbatts
data sheet #: tm053 p age 2 of 20 rev: 00 date: 5 / 14 / 03 ? copyright 2003 the connor-winfield corp. all rights reserved specifications subject to change without notice general description the connor-winfield stratum 3 simplified control timing module acts as a complete system clock module for general stratum 3 timing applications. full external control input allows for selection and monitoring of any of four possible operating states: 1) holdover, 2) external reference #1, 3) external reference #2, and 4) free run. table #1 illustrates the control signal inputs and corresponding opera- tional states. in the absence of external control inputs (a,b), the mstm enters the free run mode and signals an external alarm. the mstm will enter other operating modes upon application of a proper control signal. mode 1 operation (a=1, b=0) results in an output signal that is phase locked to the external reference input #1. mode 2 operation (a=0, b=1) results in an output sig- nal that is phase locked to external reference input #2. hold- over mode operation (a=1, b=1) results in an output signal at or near the frequency as determined by the latest (last) locked- signal input values and the holdover performance of the mstm. free run mode operation (a=0, b=0) is a guaranteed output of 4.6 ppm of the nominal frequency. alarm signals are generated at the alarm output during hold- over and free run operation. alarm signals are also generated by loss-of-lock, loss of reference, and by a tune-limit indication from the pll. a tune-limit alarm signal indicates that the ocxo tuning voltage is approaching within 10% the limits of its lock capability and that the external reference input may be erroneous. a high level indicates an alarm condition. real-time indication of the operational mode is available at unique operat- ing mode outputs on pins 1-4. control loop 0.1 hz filters effectively attenuate any reference jitter, smooth out phase transients, comply with wander transfer and jitter tolerances. absolute maximum rating ta b l e 2 symbol parameter minimum nominal maximum units notes v cc power supply voltage -0.5 7.0 v olts 1.0 v i input voltage -0.5 v cc + 0.5 volts 1.0 t s storage temperature -55 100 deg. c 1.0 functional block diagram figure 1 dac phase comparator tuning voltage monitor stratum 3 ocxo dac filters fifo stratum 3 tcxo mode control cntl a cntl b free run ref 1 ref 2 holdover ex ref 1 ex ref 2 holdover free run pll tvl sync_ou t clk_out alarm out pll tvl reference select lol/lor cntl cntl operational ref 1 ref 2 hold over free run pll_tvl alarm out a b mode 0 0 free run (default mode) 0 0 0 1 0 1 external normal 1 0 0 0 0 0 1 0 reference tune limit 1 0 0 0 1 1 #1 lor + lol 1 0 0 0 0 1 external normal 0 1 0 0 0 0 0 1 reference tune limit 0 1 0 0 1 1 #2 lor + lol 0 1 0 0 0 1 1 1 hold over 0 0 1 0 0 1 function control table ta b l e 1
data sheet #: tm053 p age 3 of 20 rev: 00 date: 5 / 14 / 03 ? copyright 2003 the connor-winfield corp. all rights reserved specifications subject to change without notice notes: 1.0: stresses beyond those listed under absolute maximum rating may cause damage to the device. operation beyond recommended conditions is not implied. 2.0: logic is 3.3v cmos 3.0 gr-1244-core 3.2.1 recommended operating conditions tab l e 3 symbol parameter minimum nominal maximum units notes v cc power supply voltage 4.75 5.00 5.25 v olts v ih high level input voltage - ttl 2.0 v cc volts v il low level input voltage - ttl 0 0.8 v olts t in input signal transition - ttl 250 ns c in input capacitance 15 pf v oh high level output voltage, 2.4 5.25 v olts 2.0 i oh = -4.0ma, v cc = min. v ol low level output voltage, 0.4 v olts i ol = 12.0 ma, v cc = min. t trans clock out transition time 4.0 ns t pulse 8khz input reference pulse 30 ns width( positive or negative) t op operating temperature 0 70 c specifications tab l e 4 parameter specifications notes frequency range (sync_out) 8 khz to 125 mhz frequency range (clk_out) 8 khz to 51.84 mhz supply current 250 ma typical, 400 ma during warm-up (maximum) timing reference inputs dual 8 khz references 3.0 jitter, wander and phase transient tolerances gr-1244-core 4.2-4.4, gr-253-core 5.4.4.3.6 wander generation gr-1244-core 5.3, gr-253-core 5.4.4.3.2 wander transfer gr-1244-core 5.4 jitter generation gr-1244-core 5.5, gr-253-core 5.6.2.3 jitter transfer gr-1244-core 5.5, gr-253-core 5.6.2.1 phase transients gr-1244-core 5.6, gr-253-core 5.4.4.3.3 free run accuracy 4.6 ppm over t op hold over stability 0.37 ppm for initial 24 hrs 4.0 initial offset 0.05 ppm temperature 0.28 ppm drift 0.04 ppm maximum hold over history 40 seconds pull-in/ hold-in range 4.6 ppm minimum 5.0 lock time <100 sec. pll_tvl alarm limit extreme 10% ranges of pull-in/hold-in range 4.0: hold over stability is the cumulative fractional frequency offset as described by gr-1244-core, 5.2 5.0: pull-in range is the maximum frequency deviation from nominal clock rate on the reference inputs to the timing module that can be overcome to pull into synchronization with the reference
data sheet #: tm053 p age 4 of 20 rev: 00 date: 5 / 14 / 03 ? copyright 2003 the connor-winfield corp. all rights reserved specifications subject to change without notice pin description ta b l e 5 pin # connection description 1 hold over indicator output. high output when hold over mode is selected by control pins. 2 ref 1 indicator output. high output when ref 1 mode is selected by control pins. 3 ref 2 indicator output. high output when ref 2 mode is selected by control pins. 4 free run indicator output. high output when free run mode is selected by control pins. 5 gnd ground 6 alarm _out alarm output. high output if module is in free run, or hold over, or lor, or lol, or pll_tvl mode. 7 cntl a mode control input 8 cntl b mode control input 9 pll_tvl tuning voltage limit alarm output. high output when sync_out is near the extreme 10% ranges of the pull-in/hold-in range. 10 gnd ground 11 sync_out primary timing output signal. signal is synchronized to reference. 12 gnd ground 13 clk_out stratum 3 tcxo output (non-synchronized output, frequency = sync_out) 14 gnd ground 15 ex_ref_2 external input reference #2 16 gnd ground 17 ex_ref_1 external input reference #1 18 v cc +5v dc supply typical application figure 2 rcv rcv clockout clockout mux #1 #n s y mux #1 #n s y cw?s stm/mstm module timing card #1 cw?s scg 2500/4500 line card #1 cw?s scg 2500/4500 line card #n cw?s stm/mstm module timing card #2 system select bits system signal input select
data sheet #: tm053 p age 5 of 20 rev: 00 date: 5 / 14 / 03 ? copyright 2003 the connor-winfield corp. all rights reserved specifications subject to change without notice typical system test setup figure 4 1 - hold over 2 - ref 1 3 - ref 2 4 - free run 5 - gnd 6 - alarm out 7 - cntl a 8 - cntl b 9 - pll_tvl 5 vdc - 18 ext. ref 1 - 17 gnd - 16 ext. ref 2 - 15 gnd - 14 clk_out - 13 gnd - 12 sync_out - 11 gnd - 10 top view vcc vcc 8 khz stratum 1 traceable signal probe oscilloscope probe frequency counter stratum 1 reference 10 mhz oscilloscope frequency counter probe probe typical module test setup figure 3 target system under test possible choices include stanford research model: fs700 truetime model xxx arbitrary waveform generator external reference inp ut arbitrary waveform generator [noise source] ds1 rate rz (1.544 mhz), e1 rate rz or 8 khz clock rz with noise modulation tektronix sj300e clock or bits logic level clock input (ttl, cmos, etc.) hp53310a modulation analyzer / time interval analyzer ds1 rate [1.544 mhz] bits bipolar phase error data output sa mple wa nde r ge ne r a tion (td ev) for s t m/ms tm -s 3 100 . 0e-12 1.0 e-9 10.0 e-9 100 . 0e-9 1.0 e-6 10.0 e-3 100 .0e-3 1.0e + 010.0e+ 0 100 .0e+0 1.0e + 3 integ ration time (se c) td ev (se c tdev gr1244-fig5.1 gr1244-fig5-3 typi c al respo ns e - 3 000 seco nd te st - jit ter ap plied (2 u i @ 10 hz) re f d a te a p r 22 199 8 kdh co pyright 1 998 co nno r-w infie l d a lll ri g h ts re s e rv e d sample mt ie data for s tm -s3/m stm -s 3 1.0e -9 10.0 e-9 100 . 0e-9 1.0e -6 100 .0e-3 1.0e + 010.0e+ 0 100 .0e+0 1.0e + 310. 0e+3 observation time (s) mti e ( s mtie 1 24 4 -5 .2 m as k (a ) 1 24 4 -5 .2 m as k (b ) 1 24 4 -5 .6 m as k gr253-5.4.4.3.2 co pyright 1 998 c o nno r- winf i e l d a l l ri g h ts re s e rv e d t ypical resp on se - 30 00 seco nd test - j itte r a pplie d ( 2 ui @ 10 h z ) re f date apr 22 1998 kd h standards compliance documents time-stamped ensemble based on absolute time reference (10mhz input) ds-1, oc-3, oc-12 electrical or optical signals wander analyzer data (ieee-488) 10 mhz this device supplies system time information. it can be thought of as supplying "absolute time" reference information 10 mhz external reference inp ut noise modulation input 10 mhz external reference inp ut ieee-488 controller platform for software hp 53305a phase analyzer hp e1748a sync measurement tektronix wander analyzer 10 mhz external reference input timing card line card timing card oc-3 line card oc-12 line card oc-48 line card ds-1 line card . . . . ... mtie, tdev, wander transfer, and wander generation plots tektronix sj300e gps or loran timing source
data sheet #: tm053 p age 6 of 20 rev: 00 date: 5 / 14 / 03 ? copyright 2003 the connor-winfield corp. all rights reserved specifications subject to change without notice MSTM-S3-T2 typical current draw figure 5 0.2 0.22 0.24 0.26 0.28 0.3 0.32 0.34 0.36 0.38 0.4 0 102030405060 time (sec) current (amps) MSTM-S3-T2 typical phase noise plot figure 6

data sheet #: tm053 p age 7 of 20 rev: 00 date: 5 / 14 / 03 ? copyright 2003 the connor-winfield corp. all rights reserved specifications subject to change without notice MSTM-S3-T2 typical phase gain figure 7 -110.00 -100.00 -90.00 -80.00 -70.00 -60.00 -50.00 -40.00 -30.00 -20.00 -10.00 0.00 10.00 0.01 0.10 1.00 10.00 100.00 1000.00 10000.00 reference modulation frequency (hz) phase gain (db) MSTM-S3-T2 typical hold over stability over temperature figure 8 0 50 100 150 200 250 0 10203040506070 temperature (c) frequency offset (ppb)
data sheet #: tm053 p age 8 of 20 rev: 00 date: 5 / 14 / 03 ? copyright 2003 the connor-winfield corp. all rights reserved specifications subject to change without notice typical wander generation mtie figure 9 typical wander generation tdev figure 10 0.01 0.1 1 10 100 0.1 1 10 100 1000 10000 integration time (sec.) tdev (ns) gr1244, fig 5-4 & gr253, fig 5-18 jitte re d re fe re nce pristine reference temperature stressed reference 1 10 100 1000 0.1 1 10 100 1000 10000 100000 1000000 observation time (sec.) mtie (ns) gr1244, fig 5-5 gr253, fig 5-17 jittered reference pristine reference temperature stressed reference
data sheet #: tm053 p age 9 of 20 rev: 00 date: 5 / 14 / 03 ? copyright 2003 the connor-winfield corp. all rights reserved specifications subject to change without notice typical calibrated wander transfer tdev figure 11 1 10 100 1000 10000 0.01 0.1 1 10 100 1000 10000 in te g ra tio n t im e (s e c .) tdev (ns) tdev (ns) gr1244, fig 5-6 1 10 100 1000 10000 0.001 0.01 0.1 1 10 100 1000 observation time (sec) mtie (ns) gr1244, fig 5-7, stratum 2/3e gr1244, fig 5-7, stratum 3/4e gr-253, fig. 5-19, requirement mtie (ns) typical reference switch mtie figure 12
data sheet #: tm053 p age 10 of 20 rev: 00 date: 5 / 14 / 03 ? copyright 2003 the connor-winfield corp. all rights reserved specifications subject to change without notice typical entry into hold over mtie figure 13 1 10 100 1000 10000 0.001 0.01 0.1 1 10 100 1000 observation time (seconds) m t gr-1244 objective, fig. 5-8 gr-1244 requirement, fig. 5-8 gr-253, fig. 5-19, requirement typical mtie typical return from hold over mtie figure 14 1 10 100 1000 10000 0.001 0.01 0.1 1 10 100 1000 o bservation tim e (sec.) m t ie (n g r -1244 r equi re m e n t, f i g. 5-7 g r -253, fi g. 5-19, r equi rem ent typi cal m t ie
data sheet #: tm053 p age 11 of 20 rev: 00 date: 5 / 14 / 03 ? copyright 2003 the connor-winfield corp. all rights reserved specifications subject to change without notice typical phase transient mtie figure 16 1 10 100 1000 10000 0.01 0.1 1 10 100 1000 observation time (sec) m t gr-253, fig. 5-19, re quirem ent mtie (ns) typical 1us phase transient tie figure 15 -200 0 200 400 600 800 1000 1200 012345678910 time (sec) tie (ns)
data sheet #: tm053 p age 12 of 20 rev: 00 date: 5 / 14 / 03 ? copyright 2003 the connor-winfield corp. all rights reserved specifications subject to change without notice MSTM-S3-T2 mode indicator delay figure 17 tuning voltage limit alarm timing diagram figure 18 ? t tvl limit high frequency tvl limit low frequency sync_out tvl alarm & alarm out 0 < t < 1sec *the dac is updated only when the output changes level. the maximum update rate is 8 khz ? (nominal frequency) 40 sec < ? t m < 100 sec change in operational mode operational mode indicator ? t m
data sheet #: tm053 p age 13 of 20 rev: 00 date: 5 / 14 / 03 ? copyright 2003 the connor-winfield corp. all rights reserved specifications subject to change without notice loss of reference timing diagram figure 19 solder clearance figure 20 .030" pin land all solder and/or wire tags shall not extend more than .020" below pc board bottom surface .020" .020" max. external reference input alarm ton a toff a 50 sec < t on < 250 sec 1 sec < t off < 2 sec a a * drawing is not to scale
data sheet #: tm053 p age 14 of 20 rev: 00 date: 5 / 14 / 03 ? copyright 2003 the connor-winfield corp. all rights reserved specifications subject to change without notice
data sheet #: tm053 p age 15 of 20 rev: 00 date: 5 / 14 / 03 ? copyright 2003 the connor-winfield corp. all rights reserved specifications subject to change without notice via keep out area: it is recommended that there be no vias or feed throughs underneath the main body of the module between the pins. it is suggested that the traces in this area be kept to a minimum and protected by a layer of solder mask. see figure 21. solder mask: a solder mask is recommended to cover most the top pad to avoid excessive solder underneath the shoulder of the pin to avoid rework damage. see table 6 and figure 22. p ad construction: the recommended pad construction is shown in figure 21. for the pin diameter of .040? a hole diameter of .055? is suggested for ease of insertion and rework. a pad diameter of .150? is also suggested for support. this leaves a spacing of .050? between the pads which is sufficient for most signal lines to pass through. p ad arra y and p ad sp acing: the pins are arranged in a dual-in-line configuration as shown in figure 16. there is .2? space between the pins in-line and each line is separated by 1.6?. see figures 21 & 23 and table 6. mechanical outline: the mechanical outline of the mstm-s3-ip is shown in figure 23. the board space required is 2.005? x 2.005? (max). the pins are .040? in diameter and are .160? (max) in length. the unit is spaced off the pcb by .035?(max) shoulders on the pins. due to the height of the device it is recommended to have heat sensitive devices away where the air flow might not be blocked. module bakeout : do not bakeout the MSTM-S3-T2 w ashing recommenda tions: the MSTM-S3-T2 is not in a hermetic enclosure. it is recommended that the leads be hand cleaned after soldering. do not completely immerse the module. soldering recommenda tions: due to the sensitive nature of this part, hand soldering of the pins is recommended after reflow processes. power suppl y regula tion: good power supply regulation is recommended for the MSTM-S3-T2 the internal oscillators are regulated to operate from 4.75 - 5.25 volts. large jumps within this range may still produce varying degrees of wander. if the host system is subject to large voltage jumps due to hot-swapping and the like, it is suggested that there be some form of external regulation such as a dc/dc converter. ground and power suppl y lines: power specifications will vary depending primarily on the temperature range. at wider temperature ranges starting at 0 to 70 deg. c., an ovenized oscillator, ocxo, will be incorporated. the turn-on current for an ocxo requires a peak current of about .4a for about a minute. the steady state current will the vary from 50-150 ma depending on the temperature. it is suggested to plan for the peak current in the power and ground traces pin 18 and pin 5. the other four ground pins 10, 12, 14, and 16 are intended for signal grounds.
data sheet #: tm053 p age 16 of 20 rev: 00 date: 5 / 14 / 03 ? copyright 2003 the connor-winfield corp. all rights reserved specifications subject to change without notice characteristic measurements tabl e 6 characteristic item measurement (inches) pad to pad spacing 0.200 solder pad top o.d. 0.150 solder pad top i.d. 0.055 solder pad bottom o.d. 0.150 solder pad bottom i.d. 0.055 solder mask top dia. 0.070 solder mask bottom dia. 0.155 pin row to row spacing 1.600 recommended footprint dimensions figure 21 side assembly view figure 22 top side solder resist (over pad) pcb side view bottom side solder resist (up to pad)
data sheet #: tm053 p age 17 of 20 rev: 00 date: 5 / 14 / 03 ? copyright 2003 the connor-winfield corp. all rights reserved specifications subject to change without notice package dimensions figure 23 k j l m e detail "a-a" c pin 1 1 2 "a-a" 17 18 b d h f 4 6 5 8 9 7 (16) 11 10 12 15 14 13 g a 3 16 dimensions in parenthesis are in millimeters (1.98) (1.02) (4.06) (0.76) (3.18) (5.08) (5.08) (40.64) (5.08 (50.93) (15.06) (50.93) m .040 l .078 k (max) .125 j (max) .030 h (max) .160 g .200 f .200 e .200 d 1.600 c (max) .593 b (max) 2.005 a (max) 2.005
data sheet #: tm053 p age 18 of 20 rev: 00 date: 5 / 14 / 03 ? copyright 2003 the connor-winfield corp. all rights reserved specifications subject to change without notice
data sheet #: tm053 p age 19 of 20 rev: 00 date: 5 / 14 / 03 ? copyright 2003 the connor-winfield corp. all rights reserved specifications subject to change without notice
2111 comprehensive drive aurora, illinois 60505 phone: 630- 851- 4722 fax: 630- 851- 5040 www.conwin.com revision revision date note 00 5/14/03 final release

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