3.3v cmos? tcxo stratum 3 htfl?&?htvl tel: +44 1460 256 100 fax: +44 1460 256 101 e-mail: sales@golledge.com web: www.golledge.com 18 oct 2010 open ?1? level ?0? level enabled enabled high impedance features ? 3.3v stratum 3 compliant (vc)tcxo ? cmos output ? suitable as sonet/sdh ? timing source ? excellent frequency stability ? low jitter product name + ? option codes + frequency eg: htfl/5f 19.440mhz 1.0ppm, 0+70c, tcxo no vc htvl/6e 44.7360mhz 0.5ppm, -40+85c, tcxo with vc option code x (eg htvl/x) denotes a custom spec. ordering information ? standard. ? optional - please specify required code(s) when ordering option codes htfl htvl product parameters specifications enable / disable function (htfl) input (pin 1) output (pin 8) 2 011 / 65 / eu frequency range: 6.40 ~ 56.0mhz ?? ? calibration tolerance: 1.0ppm ?? ?? frequency stability: 4.6ppm ?? ?? (inclusive of calibration tolerance temperature, voltage, load, 20years ageing, shock & ? vibration) temperature range: 0 to +70c ?? ? 5 -40 t o +85c ?? ? 6 st orage temperature range: -55 to +125c ?? ? temperature stability: 0.5ppm ?? ? e 1.0ppm ?? ? f other ?? ? specify supply v oltage (v dd ): +3.3v ?(5%) ?? ? supply current (6.4~52.0mhz): 10ma max ?? ? driving ability: 15pf cmos ?? ? logic levels: ?0? level = 10%v dd max ?? ? ?1? level = 90%v dd min ?? ? output current: ?0? level = 4.0ma ?? ? ?1? level = -4.0ma ?? ? waveform symmetry: 45:55 ma x at 50%v dd ?? ? rise / fall time: 8ns max ?? ? frequency adjustment: none ?? 10ppm min, +1.65v 1.35v ? >100k input impedance ? 5% linearity ? enable / disable function: none ? tristate (control via pin 1) ? (v ih =70%v dd min, v il =30%v dd max) phase noise: -50dbc/hz typ @ ?1hz ?? ? -80dbc/hz typ @ ?10hz ?? ? -110dbc/hz typ @ ?100hz ?? ? -135dbc/hz typ @?1khz ?? ? -150dbc/hz typ @ ?10khz ?? ? -150dbc/hz typ @ ?100khz ?? ? period jitter rms: 3ps ma x ? ? phase jitter rms: 1.0ps ma x, 12khz~f o /2 ? ? 3.0ps max, 10hz~f o /2 ? ? tdev: 1.0ns ma x over 1 sec ? ? 2.0ns max over 4 sec ? ?
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