this is information on a product in full production. january 2013 doc id 12658 rev 3 1/8 8 ESDLIN1524BJ transil?, transient voltage surge suppressor diode for esd protection datasheet ? production data features max peak pulse power 160 w (8/20 s) asymmetrical bidirectional device stand-off voltage: 15 and 24 v low clamping factor v cl /v br low leakage current aec-q101 qualified complies with the following standards: iso 10605 (c = 150 pf, r = 330 ?? ? 30 kv (air discharge) ? 30 kv (contact discharge) iso 10605 (c = 330 pf, r = 330 ?? ? 30 kv (air discharge) ? 30 kv (contact discharge) iso 7637-2 ? pulse 3a: v s = -150 v ? pulse 3b: v s = 100 v iec 61000-4-5: ipp = 3 a (8/20 s) hbm mil std 833, class 3 (> 4 kv) description the ESDLIN1524BJ is an asymmetrical transil diode designed specifically for protecting one automotive lin bus line against electrostatic discharge (esd). the sod323 is a very small package which allows space saving on high density printed circuit board. transil diodes provide high overvoltage protection by clamping action and have instantaneous response to transient overvoltages. tm: transil is a trademar k of stmicroelectronics. figure 1. pin configuration 1 2 sod323 1 1 2 2 cathode 1 (15 v reverse stand-off voltage) cathode 2 (24 v reverse stand-off voltage) www.st.com
characteristics ESDLIN1524BJ 2/8 doc id 12658 rev 3 1 characteristics table 4. electrical characteristics (values, t amb = 25 c) table 1. absolute maximum ratings (limiting values) t amb = 25 c symbol parameter value unit p pp peak pulse power dissipation 8/20 s (1) t j initial = t amb 160 w t stg t j storage temperature range operating junction temperature range -65 to +175 -40 to 150 c t l maximum lead temperature for soldering during 10 s 260 c 1. for a surge greater than maximum values , the diode will fail in short-circuit table 2. esd maximum ratings symbol parameter conditions value unit esd electrostatic discharge capability iso 10605 (c = 150 pf, r = 330 ?? air discharge contact discharge iso 10605 (c = 330 pf, r = 330 ?? air discharge contact discharge 30 30 30 30 kv hbm mil std 833 10 table 3. electrical characteristics (definitions) symbol parameter v rm stand-off voltage v br breakdown voltage v cl clamping voltage i rm leakage current @ v rm i r breakdown current @ v br i pp peak pulse current c junction capacitance order code i rm @v rm v br @ i r (1) 1. pulse test: t p < 50 ms v cl max @ i pp 8/20 s c (2) 2. v r = 0 v, f= 1 mhz ? t (3) 3. ? v br = ? t x (t amb -25) x v br(25 c) na v v ma v a v a pf 10 -4 /c typ max min typ max typ max max ESDLIN1524BJ (15 v) 1 50 15 17.1 18.9 20.3 5 25 1 35 5 16 20 8.8 ESDLIN1524BJ (24 cv) 1 50 24 25.4 27.8 30.3 5 40 1 50 3 9.6 v cl v br v rm i rm i r i pp v i i rm i r i pp v rm v br v cl v cl v br v rm i rm i r i pp v i i rm i r i pp v rm v br v cl
ESDLIN1524BJ characteristics doc id 12658 rev 3 3/8 figure 6. clamping test conditions and results figure 2. relative variation of peak pulse power versus initial junction temperature figure 3. peak pulse power versus exponential pulse duration 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 0 25 50 75 100 125 150 175 p pp [tj initial] / p pp [tj initial=25c] t j (c) 1.e+01 1.e+02 1.e+03 1 10 100 p pp (w) tj initial =25 c t p (s) figure 4. junction capacitance versus line voltage (typical values), 15 v side figure 5. junction capacitance versus line voltage (typical values), 24 v side 0 2 4 6 8 10 12 14 16 18 20 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 c(pf) f=1 mhz v osc =30mv rms t j =25c 15 v side v line (v) 0 2 4 6 8 10 12 14 16 18 20 0 2 4 6 8 10 12 14 16 18 20 22 24 c(pf) f=1 mhz v osc =30 mv rms t j =25 c 24 v side v line (v) voltage probe test board ground plane 1 2 v 1kv esd air discharge esd test configuration 500 remaining voltage after +1 kv esd voltage waveform (iec 61000-4-2 conditions) remaining voltage after -1 kv esd voltage waveform (iec 61000-4-2 conditions)
placement and pcb layout recommendations ESDLIN1524BJ 4/8 doc id 12658 rev 3 2 placement and pcb layout recommendations figure 7 illustrates recommendations for the placem ent and layout of the pcb for optimum benefit of the ESDLIN1524BJ. figure 7. placement and pcb layout recommendations 3 ordering information scheme figure 8. ordering information scheme lin node voltage regulator lin transceiver mcu connector lin 24 15 ESDLIN1524BJ located as close as possible to the connector vbat gnd with ground wire connector lin gnd with ground plane connector lin gnd vbat vbat esdlin 15 24 b j esdlin protection stand-off voltage 1 15 = 15 v stand-off voltage 2 24 = 24 v bidirectional package j = sod323
ESDLIN1524BJ package information doc id 12658 rev 3 5/8 4 package information epoxy meets ul94, v0 lead-free package in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. figure 9. sod323 footprint (dimensions in millimeters) table 5. sod323 dimensions ref. dimensions millimeters inches min. max. min. max. a 1.17 0.046 a1 0 0.1 0 0.004 b 0.25 0.44 0.01 0.017 c 0.1 0.25 0.004 0.01 d 1.52 1.8 0.06 0.071 e 1.11 1.45 0.044 0.057 h 2.3 2.7 0.09 0.106 l 0.1 0.46 0.004 0.02 q1 0.1 0.41 0.004 0.016 h b d e a1 a l q1 c 3.20 0.54 1.08 1.06 1.06
package information ESDLIN1524BJ 6/8 doc id 12658 rev 3 figure 10. tape dimensions figure 11. ESDLIN1524BJ-hq reel dimensions user direction of unreeling all dimensions in mm 4.0 0.1 2.0 0.05 8.0 0.3 2.0 0.05 1.75 0.1 3.5 - 0.05 ? 1.5 0. 0 + 1 1.07 1 0. 1. 0. 52 1 0. 0 0.05 3 2.80 1 0. gnd 3 gnd 24 gnd 3 gnd 24 gnd 3 gnd 24 8 0.2 top cover thickness: 0.10 mm (max) embossed carrier dimensions in mm 20.5 0.2 ?330 2 2 0.5 ?13 +0.5/0.2 14.4 8.4 +2/-0 ?100 2
ESDLIN1524BJ ordering information doc id 12658 rev 3 7/8 5 ordering information 6 revision history table 6. ordering information order code marking package weight base qty delivery mode ESDLIN1524BJ 24 sod323 5 mg 3000 tape and reel ESDLIN1524BJ-hq 24 sod323 5 mg 10000 tape and reel table 7. document revision history date revision changes 28-aug-2006 1 initial release 22-sep-2006 2 added figure 6 placement and layout recommendations 18-jan-2013 3 updated ta bl e 6 . added figure 10 and figure 11 .
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