myson technology MTU413 4-bit micro-controller with eprom, 1k word this datasheet contains new product information. myson technology reserves the rights to modify the product specification witho ut notice. no liability is assumed as a result of the use of this product. no rights under any patent accompany the sale of the pr oduct. MTU413 revision 3.2 04/21/1998 1/9 features very low current dissipation. wide operating voltage range. supports both ag and li batteries. powerful instruction set. 4-level subroutine nesting (including interrupt). 4 event-driven interrupts, 2 external and 2 internal. rom size: 1024 x 15 bits. ram size: 64 x 4 bits. input ports: 2 ports/ 8 pins (s and m). output port: 1 port/ 4 pins (p). pseudo serial output port (p). input/output ports: 2 ports/ 8 pins (i/oa and i/ob). control outputs: alarm, light. lcd driver outputs (can drive up to 75 lcd segments). prom option to select 4 lcd drive modes: static, duplex (1/2 duty 1/2 bias, 1/3 duty 1/2 bias or 1/3 duty 1/3 bias). prom option permits lcd driver output pins to be used for dc output ports; up to 25 pins are available. segment pla circuit permits any layout on lcd panel. built-in clock generator (crystal or rc). built-in voltage doubler, halver, tripler. endurance : more then 100 write cycles/word. security bit for read/write protection. general description the MTU413 is an eeprom-equipped high-performance 4-bit microcomputer. it contains not only all functions compatible with mtu410, but also an eeprom , providing customers such conveniences as on-board verification, customized code, small quantity sample production, etc. this chip especially provides a security bit to protect the customer's code.
myson technology MTU413 MTU413 revision 3.2 04/21/1998 2/9 block diagram 1.0 package information package type 68pin plcc mtu 413 s3 s4 light alarm vdd2 vdd vdd1 gnd vdd3 com2 com3 seg25 seg24 seg23 seg22 seg21 seg20 seg19 seg18 seg17 seg16 seg15 seg14 seg13 seg12 seg11 seg10 seg9 seg8 seg7 seg6 m4 test a cup1 cup2 s2 s1 oscin cap oscout com1 seg1 seg2 seg3 seg4 seg5 ioa1 ioa2 ioa3 ioa4 iob1 iob2 iob3 iob4 reset int p1 p2 p3 p4 m1 m2 m3 10 15 20 25 30 35 40 45 50 55 60 65 68 01 5 bidirection i/o port output port input port oscillator 6-bit preset timer alu ram 64 x 4 bits lcd driver segment pla pre-divider control circuit 4-level stack instruction decoder 10-bit program counter prom 1024 x 15 bits 4-bit data bus vdd1~3 seg1~25 com 1~3 m1~4 s1~4 alarm light p1~4 i/o b1~4 i/o a1~4 osc in osc out cup 1 cup 2 reset int
myson technology MTU413 MTU413 revision 3.2 04/21/1998 3/9 2.0 pin/pad assignment unit: um pin no. name pin no. name pin no. name pin no. name 1 vss 18 reset 35 oscin 52 seg14 2 ------ 19 int 36 cap 53 seg15 3 vdd1 20 p1 37 oscout 54 seg16 4 vdd 21 p2 38 com1 55 seg17 5 vdd2 22 p3 39 seg1 56 seg18 6 alarm 23 p4 40 seg2 57 seg19 7 light 24 m1 41 seg3 58 seg20 8 s4 25 m2 42 seg4 59 seg21 9 s3 26 m3 43 seg5 60 seg22 10 ioa1 27 m4 44 seg6 61 ------ 11 ioa2 28 ------ 45 seg7 62 ------ 12 ioa3 29 ------ 46 seg8 63 seg23 13 ioa4 30 testa 47 seg9 64 seg24 14 iob1 31 cup1 48 seg10 65 seg25 15 iob2 32 cup2 49 seg11 66 com3 16 iob3 33 s2 50 seg12 67 com2 17 iob4 34 s1 51 seg13 68 vdd3 3.0 pin name description name type description oscin i typical crystal(32.768khz) is connected across oscout o oscin/oscout for oscillation; r/c oscillation mode is also available. s1 - 4 i input ports with chattering eliminator option for m1 - 4 i ck10 (32ms), ck8 (8ms) & ck6 (2ms). p1 - 4 o output ports. ioa1 - 4 i/o input/output ports. iob1 - 4 i/o input/output ports. int i external interrupt request control input pin. reset i system reset pin. light o output only for outputting the signal to drive the transistor for light. alarm o output only for outputting the 4khz/2khz/1khz modulation signal. also can be used to output the non-modulation signal. vdd vdd1 (+)power supply pin. * for ag version, apply (+) side to vdd & vdd1 together. vdd2 for other than ag version, apply (+) side to vdd & vdd2 together. vdd3 power supply pin for lcd driver power supply. vss (--)power supply pin. cup1 - 2 o pins for connecting the voltage step-up (step-down) capacitor. com1 - 3 o output pins for lcd panel common plate. seg1 - 25 o output pins for lcd panel segments.
myson technology MTU413 MTU413 revision 3.2 04/21/1998 4/9 4.0 absolute maximum ratings (ta = 0 to 70 o c) name symbol range unit vdd1/2 -0.3 to +5.5 v maximum supply voltage vdd3 -0.3 to +8.5 v maximum input voltage vin -0.3 to vdd+0.3 v vout1 -0.3 to vdd1+0.3 v vout2 -0.3 to vdd2+0.3 v maximum output voltage vout3 -0.3 to vdd3+0.3 v maximum operating temperature topg 0 to +70 o c maximum storage temperature tstg -25 to +125 o c 5.0 allowable operating conditions (ta = 0 to 70 o c) name symb. condition min. max. unit vdd1 2.0 5.5 v vdd2 4.0 5.5 v supply voltage vdd3 external voltage mode 4.0 8.25 v vdd1 1.3 5.5 v vdd2 2.6 5.5 v supply voltage vdd3 ag & li battery mode 2.6 8.25 v input "h" voltage vih1 0.7 x vddo vddo v input "l" voltage vil1 all input except oscin 0 0.3 x vddo v input "h" voltage vih3 0.8 x vddo vddo v input "l" voltage vil3 oscin at ext. rc mode 0 0.2 x vddo v fopg1 ag battery mode 32 32 khz fopg2 li battery mode 32 100 khz fopg3 external voltage mode 32 3580 khz operating freq. fopg4 external rc mode 32 5000 khz 6.0 electrical characteristics (ta = 0 to 70 o c) 6.1 input resistance at #1 : vdd1 = 1.3v ( ag );#2 : vdd2 = 2.6v ( li ); #3 : vdd2 = 4.5v (extv). name symb. condition min. typ. max. unit rllh1 vi = 0.2vdd1, #1 10 40 100 kohm rllh2 vi = 0.2vdd2, #2 10 40 100 kohm "l"-level hold tr rllh3 vi = 0.2vdd2, #3 5 20 50 kohm rmsd1 vi = vdd1, #1 200 500 1000 kohm rmsd2 vi = vdd2, #2 200 500 1000 kohm m/s pull-down tr rmsd3 vi = vdd2, #3 100 250 500 kohm rintu1 vi = vss, #1 200 500 1000 kohm rintu2 vi = vss, #2 200 500 1000 kohm int pull-up tr rintu3 vi = vss, #3 100 250 500 kohm rintd1 vi = vdd1, #1 200 500 1000 kohm int pull-down tr rintd2 vi = vdd2, #2 200 500 1000 kohm
myson technology MTU413 MTU413 revision 3.2 04/21/1998 5/9 rintd3 vi = vdd2, #3 100 250 500 kohm rres1 vi = vss or vdd1, #1 5 20 50 kohm rres2 vi = vss or vdd2, #2 5 20 50 kohm res pull-down r rres3 vi = vss or vdd2, #3 5 20 50 kohm 6.2 dc output characteristics at #1 : vdd1 = 1.3v ( ag ); #2 : vdd2 = 2.6v ( li ); #3 : vdd2 = 4.5v (extv). name symb. condition for min. typ. max. unit voh1a ioh = -200ua, #1 0.9 1.1 v voh2a ioh = -1ma, #2 1.8 2.1 v output "h" voltage voh3a ioh = -3ma, #3 3.0 3.5 v vol1a iol = 400ua, #1 0.3 0.5 v vol2a iol = 2ma, #2 0.6 1 v output "l" voltage vol3a iol = 6ma, #3 alarm light 1.0 1.5 v voh1b ioh = -100ua, #1 0.9 1.1 v voh2b ioh = -500ua, #2 1.8 2.1 v output "h" voltage voh3b ioh = -1.5ma, #3 3.0 3.5 v vol1b iol = 200ua, #1 0.3 0.5 v vol2b iol = 1ma, #2 0.6 1 v output "l" voltage vol3b iol = 3ma, #3 p-port ioa-n iob-n 1.0 1.5 v 6.3 segment driver output characteristics at #1 : vdd1 = 1.3v ( ag ); #2 : vdd2 = 2.6v ( li ); #3 : vdd2 = 4.5v (extv). name symb. condition for min. typ. max. unit dc output mode voh1c ioh = -10ua, #1 0.9 1.1 v voh2c ioh = -50ua, #2 1.8 2.1 v output "h" voltage voh3c ioh = -200ua, #3 3.0 3.5 v vol1c iol = 20ua, #1 0.3 0.5 v vol2c iol = 100ua, #2 0.6 1 v output "l" voltage vol3c iol = 400ua, #3 seg-n 1.0 1.5 v static display mode voh2d ioh = -1ua, #1,#2 2.5 v output "h" voltage voh3d ioh = -1ua, #3 4.3 v vol2d iol = 1ua, #1,#2 0.2 v output "l" voltage vol3d iol = 1ua, #3 seg-n 0.2 v voh2e ioh = -10ua, #1,#2 2.5 v output "h" voltage voh3e ioh = -10ua, #3 4.3 v vol2e iol = 10ua, #1,#2 0.2 v output "l" voltage vol3e iol = 10ua, #3 com-n 0.2 v duplex (1/2 bias 1/2 duty) display mode voh12f ioh = -1ua, #1, #2 2.4 v output "h" voltage voh3f ioh = -1ua, #3 4.3 v vol12f iol = 1ua, #1, #2 0.2 v output "l" voltage vol3f iol = 1ua, #3 seg-n 0.2 v voh12g ioh = -10ua, #1, #2 2.4 v output "h" voltage voh3g ioh = -10ua, #3 4.3 v output "m" voltage vom12g iol/h= +/-10ua, #1, #2 com-n 1.1 1.5 v
myson technology MTU413 MTU413 revision 3.2 04/21/1998 6/9 vom3g iol/h= +/-10ua, #3 2.05 2.45 v vol12g iol = 10ua, #1 0.2 v output "l" voltage vol3g iol = 10ua, #3 0.2 v 1/2 bias 1/3 duty display mode voh12h ioh = -1ua, #1 ,#2 2.4 v output "h" voltage voh3h ioh = -1ua, #3 4.3 v vol12h iol = 1ua, #1 ,#2 0.2 v output "l" voltage vol3h iol = 1ua, #3 seg-n 0.2 v voh12i ioh = -10ua, #1, #2 2.4 v output "h" voltage voh3i ioh = -10ua, #3 4.3 v vom12i iol/h= +/-10ua, #1, #2 1.1 1.5 v output "m" voltage vom3i iol/h= +/-10ua, #3 2.05 2.45 v vol12i iol = 10ua, #1, #2 0.2 v output "l" voltage vol3i iol = 10ua, #3 comn 0.2 v 1/3 bias 1/3 duty display mode voh12j ioh = -1ua, #1, #2 3.85 v output "h" voltage voh3j ioh = -1ua, #3 6.55 v vom12j iol/h= +/-1ua, #1, #2 2.9 2.4 v output "m1" voltage vom13j iol/h= +/-1ua, #1, #2 4.7 4.3 v vom22j iol/h= +/-1ua, #1, #2 1.1 1.5 v output "m2" voltage vom23j iol/h= +/-1ua, #1, #2 2.05 2.45 v vol2j iol = 1ua, #2 0.2 v output "l" voltage vol3j iol = 1ua, #3 segn 0.2 v voh2k ioh = -10ua, #2 3.85 v output "h" voltage voh3k ioh = -10ua, #3 6.55 v vom12k iol/h= +/-10ua, #1, #2 2.9 2.4 v output "m1" voltage vom13k iol/h= +/-10ua, #3 4.7 4.3 v vom22k iol/h= +/-10ua, #1, #2 1.1 1.5 v output "m2" voltage vom23k iol/h= +/-10ua, #3 2.05 2.45 v vol2k iol = 10ua, #2 0.2 v output "l" voltage vol3k iol = 10ua, #3 comn 0.2 v 7.0 instruction table instruction machine code function remark flag nop 000 0000 0000 0000 no operation lct ly,rx 000 00yy yyxx xxxx (ly) <= (rx) ly=000- no use opa rx 000 0100 01xx xxxx port(a) <= (rx) lcb ly,rx 000 01yy yyxx xxxx (ly) <= (rx) ly=000- no use opb rx 000 1000 01xx xxxx port(b) <= (rx) lcp ly,rx 000 10yy yyxx xxxx abcd,efgh <= (rx),(ac) ly=000- no use mra rx 000 1101 01xx xxxx cf <= rx3 opp rx 000 1110 00xx xxxx port(p) <= (rx) opps rx 000 1110 1dxx xxxx p1,2,3,4 <= rx0,rx1,d,pulse adc rx 001 0000 00xx xxxx (ac) <= (rx)+(ac)+(cf) cf adc* rx 001 0000 10xx xxxx (ac),(rx) <= (rx)+(ac)+(cf) cf sbc rx 001 0001 00xx xxxx (ac) <= (rx)+(ac)b+(cf) cf sbc* rx 001 0001 10xx xxxx (ac),(rx) <= (rx)+(ac)b+(cf) cf add rx 001 0010 00xx xxxx (ac) <= (rx)+(ac) cf
myson technology MTU413 MTU413 revision 3.2 04/21/1998 7/9 instruction machine code function remark flag add* rx 001 0010 10xx xxxx (ac),(rx) <= (rx)+(ac) cf sub rx 001 0011 00xx xxxx (ac) <= (rx)+(ac)b+1 cf sub* rx 001 0011 10xx xxxx (ac),(rx) <= (rx)+(ac)b+1 cf adn rx 001 0100 00xx xxxx (ac) <= (rx)+(ac) adn* rx 001 0100 10xx xxxx (ac),(rx) <= (rx)+(ac) and rx 001 0101 00xx xxxx (ac) <= (rx) and (ac) and* rx 001 0101 10xx xxxx (ac),(rx) <= (rx) and (ac) eor rx 001 0110 00xx xxxx (ac) <= (rx) eor (ac) eor* rx 001 0110 10xx xxxx (ac),(rx) <= (rx) eor (ac) or rx 001 0111 00xx xxxx (ac) <= (rx) or (ac) or* rx 001 0111 10xx xxxx (ac),(rx) <= (rx) or (ac) adci ry,d 001 1000 0ddd dyyy (ac) <= (ry)+(d)+(cf) cf adci* ry,d 001 1000 1ddd dyyy (ac),(ry) <= (ry)+(d)+(cf) cf sbci ry,d 001 1001 0ddd dyyy (ac) <= (ry)+(d)b+(cf) cf sbci* ry,d 001 1001 1ddd dyyy (ac),(ry) <= (ry)+(d)b+(cf) cf addi ry,d 001 1010 0ddd dyyy (ac) <= (ry)+(d) cf addi* ry,d 001 1010 1ddd dyyy (ac),(ry) <= (ry)+(d) cf subi ry,d 001 1011 0ddd dyyy (ac) <= (ry)+(d)b+1 cf subi* ry,d 001 1011 1ddd dyyy (ac),(ry) <= (ry)+(d)b+1 cf adni ry,d 001 1100 0ddd dyyy (ac) <= (ry)+(d) adni* ry,d 001 1100 1ddd dyyy (ac),(ry) <= (ry)+(d) andi ry,d 001 1101 0ddd dyyy (ac) <= (ry) and (d) andi* ry,d 001 1101 1ddd dyyy (ac),(ry) <= (ry) and (d) eori ry,d 001 1110 0ddd dyyy (ac) <= (ry) eor (d) eori* ry,d 001 1110 1ddd dyyy (ac),(ry) <= (ry) eor (d) ori ry,d 001 1111 0ddd dyyy (ac) <= (ry) or (d) ori* ry,d 001 1111 1ddd dyyy (ac),(ry) <= (ry) or (d) ips rx 010 0000 00xx xxxx (ac),(rx) <= port(s) ipm rx 010 0000 10xx xxxx (ac),(rx) <= port(m) ipa rx 010 0001 00xx xxxx (ac),(rx) <= port(a) ipa* rx 010 0001 01xx xxxx (ac),(rx) <= port(a) i/oa <= i/p ipb rx 010 0001 10xx xxxx (ac),(rx) <= port(b) ipb* rx 010 0001 11xx xxxx (ac),(rx) <= port(b) i/ob <= i/p msb rx 010 0010 00xx xxxx (ac),(rx) <= sts2 b0 : bcf b1 : scf1(mpt) b2 : scf2(hrf) b3 : scf3(spt) sta rx 010 0010 10xx xxxx (rx) <= (ac) sr0 rx 010 0011 00xx xxxx acn, rxn ac3, rx3 <= rx(n+1) <= 0 sr1 rx 010 0011 01xx xxxx acn, rxn ac3, rx3 <=(rx(n+1) <= 1 sl0 rx 010 0011 10xx xxxx acn, rxn ac0, rx0 <= rx(n-1) <= 0 sl1 rx 010 0011 11xx xxxx acn, rxn ac0, rx0 <= rx(n-1) <= 1 lds rx,d 010 01dd ddxx xxxx (ac),(rx) <= (d) msc rx 011 0000 00xx xxxx (ac),(rx) <= sts3 b0 : scf4(int) b1 : scf5(tmr) b2 : ph15 b3 : scf7(pdv)
myson technology MTU413 MTU413 revision 3.2 04/21/1998 8/9 instruction machine code function remark flag maf rx 011 0001 00xx xxxx (ac),(rx) <= sts1 tf2 : zero tf3 : cf lda rx 011 0111 10xx xxxx (ac) <= (rx) mrw ry,rx 011 100y yyxx xxxx (ac),(ry) <= (rx) mwr rx,ry 011 110y yyxx xxxx (ac),(rx) <= (ry) jb0 x 100 00xx xxxx xxxx (pc) <= x if (ac0) = 1 jb1 x 100 01xx xxxx xxxx (pc) <= x if (ac1) = 1 jb2 x 100 10xx xxxx xxxx (pc) <= x if (ac2) = 1 jb3 x 100 11xx xxxx xxxx (pc) <= x if (ac3) = 1 jnz x 101 00xx xxxx xxxx (pc) <= x if (zero) = 0 jnc x 101 01xx xxxx xxxx (pc) <= x if (cf) = 0 jz x 101 10xx xxxx xxxx (pc) <= x if (zero) = 1 jc x 101 11xx xxxx xxxx (pc) <= x if (cf) = 1 jmp x 110 00xx xxxx xxxx (pc) <= x call x 110 01xx xxxx xxxx (stack) (pc) <= (pc)+1 <= x rts 110 1000 0000 0000 (pc) <= (stack) sms x 111 0000 000x xxxx sef4 sef0-3 <= x4 <= x0-3 m1-4 enable s1-4 enable scf1 scf3 hrf0 tms x 111 0010 00xx xxxx timer <= x hrf1 sf x 111 0100 0xx0 xxxx x6 x5 x3 x2 x1 x0 : m-port pull-low : s-port pull-low : halt after light : light on : bcf set : cf set bcf cf rf x 111 0110 0xx0 0xxx x6 x5 x2 x1 x0 : m-port low-l-h : s-port low-l-h : light off : bcf reset : cf reset bcf cf x7,x6 0 , 1 1 , 0 1 , 1 signal dc 1k/2k 4k xn = 1x5x4x3 signal 1 hz 2 hz 4hz xn = 1x2x1x0 alm x 111 0111 xxxx xxxx signal 8hz 16hz 32hz sie x 111 1000 xxx0 xxxx x5-7 x0-3 : hef1-3 is enabled : ief0-3 is enabled sie* x 111 1010 0000 xxxx x0-3 : ief0-3 is enabled plc x 111 110x 0000 xxxx x0-3 x8 : reset hrf0-3 : reset ph11-15 halt 111 1111 1111 1111
myson technology MTU413 MTU413 revision 3.2 04/21/1998 9/9 symbol description ac : accumulator cf : carry flag acn : accumulator bit n bcf : backup flag rx : memory of address x iefn : interrupt enable flag rxn : memory bit n of address x hefn : halt release enable flag ry : memory of working register y hrfn : halt release flag pc : program counter sefn : switch enable flag x : address scfn : start condition flag d : immediate data ly : lcd latch
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