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this is information on a product in full production. september 2014 docid026754 rev 2 1/35 RVN5E010MH single-channel high-side driver with analog current sense datasheet - production data features ? general ? inrush current active management by power limitation ? very low standby current ? 3 v cmos compatible inputs ? optimized electromagnetic emissions ? very low electromagnetic susceptibility ? compliant with european directive 2002/95/ec ? very low current sense leakage ? diagnostic functions ? proportional load current sense ? high current sense precision for wide current range ? current sense disable ? output short to ground indication ? overload and short to ground (power limitation) indication ? thermal shutdown indication ? protections ? undervoltage shutdown ? overvoltage clamp ? load current limitation ? self-limiting of fast thermal transients ? protection against loss of ground and loss of v cc ? overtemperature shutdown with auto- restart (thermal shutdown) ? reverse battery protection with self switch on of the power mosfet ? electrostatic discharge protection ? aerospace and defense features ? dedicated traceability and part marking ? production parts approval documents available ? adapted extended life time and obsolescence management ? extended product change notification process ? designed and manufactured to meet sub ppm quality goals ? advanced mold and frame designs for superior resilience to harsh environment (acceleration, emi, thermal, humidity) ? single fabrication, assembly and test site ? dual internal production source capability application ? all types of resistive, inductive and capacitive loads in aerospace and defense applications max supply voltage v cc 41 v operating voltage range v cc 4.5 v to 28 v typ. on-state resistance r on 10 m current limitation (typ) i limh 85 a off-state supply current i s 2 a (1) 1. typical value with all loads connected. www.st.com
contents RVN5E010MH 2/35 docid026754 rev 2 contents 1 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 block diagram and pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.4 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.5 electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.6 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.7 load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.8 mcu i/os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.9 current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3.10 maximum demagnetization energy (v cc = 13.5 v) . . . . . . . . . . . . . . . . . 25 4 package and pc board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 4.1 hpak thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 5 package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5.1 ecopack ? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5.2 hpak mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5.3 hpak suggested land pattern . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 5.4 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 6 order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 7 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
docid026754 rev 2 3/35 RVN5E010MH list of tables 3 list of tables table 1. pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 2. suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 7 table 3. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 4. thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 5. power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 6. switching (vcc = 13 v, tj = 25 c) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 0 table 7. logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 8. protection and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 9. current sense (8 v < v cc < 18 v) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 table 10. truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 11. electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 table 12. electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 table 13. electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 table 14. thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 table 15. hpak mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 table 16. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 table 17. document revision history. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
list of figures RVN5E010MH 4/35 docid026754 rev 2 list of figures figure 1. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 2. configuration diagram (top view) not in scale. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 3. current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 4. current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 figure 5. switching characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 6. delay response time between rising edge of ouput current and rising edge of current sense (cs enabled) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 7. output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 8. i out /i sense vs. i out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 9. maximum current sense ratio drift vs. load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 10. normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 11. overload or short to gnd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 12. intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 13. t j evolution in overload or short to gnd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 14. off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 15. high-level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 16. input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 17. low-level input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 18. high-level input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 19. input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 20. on-state resistance vs. t case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 21. on-state resistance vs. v cc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 22. undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 23. turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 24. ilimh vs. tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 25. turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 26. high-level cs_dis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 27. cs_dis clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 28. low-level cs_dis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 29. application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 30. current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 31. maximum turn-off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 figure 32. pc board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 figure 33. rthj-amb vs. pcb copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 26 figure 34. hpak thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . 27 figure 35. thermal fitting model of a single-channel hsd in hpak . . . . . . . . . . . . . . . . . . . . . . . . . . 27 figure 36. hpak package dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 figure 37. hpak suggested pad layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 figure 38. hpak tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 figure 39. hpak tape and reel (suffix ?tr?) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
docid026754 rev 2 5/35 RVN5E010MH description 34 1 description the RVN5E010MH is a single-channel high-side driver manufactured using st proprietary vipower ? m0-5 technology and housed in hpak package. the device is designed to drive 12 v grounded loads delivering protection, diagnostics and easy 3 v and 5 v cmos compatible interface with any microcontroller. the device integrates advanced protective functions such as load current limitation, inrush and overload active management by power limitation, overtemperature shut-off with auto- restart and overvoltage active clamp. a dedicated analog current sense pin is associated with every output channel in order to provide enhanced diagnostic functions including fast detection of overload and short-circuit to ground through power limitation indication and overtemperature indication. the current sensing and diagnostic feedback of the whole device can be disabled by pulling the cs_dis pin high to share the external sense resistor with similar devices.
block diagram and pin configuration RVN5E010MH 6/35 docid026754 rev 2 2 block diagram and pin configuration figure 1. block diagram table 1. pin functions name function v cc battery connection out power output (1) 1. pins 1 and 7 must be externally tied together. gnd ground connection in voltage controlled input pin with hysteresis, cmos compatible. it controls output switch state. cs analog current sense pin, it delivers a current proportional to the load current. cs_dis active high cmos compatible pin, to disable the current sense pin. ,1 &6b ',6 &6 287 9 && *1' 6ljqdo&odps 5hyhuvh edwwhu\ surwhfwlrq 3rzhu fodps 9 21 olplwdwlrq &xuuhqw olplwdwlrq 2yhu whpshudwxuh 9 6(16( 'ulyhu )dxow &xuuhqw vhqvh 2yhuordgsurwhfwlrq $fwlyhsrzhuolplwdwlrq 8qghuyrowdjh &rqwuro gldjqrvwlf /rjlf *$3*36
docid026754 rev 2 7/35 RVN5E010MH block diagram and pin configuration 34 figure 2. configuration diagram (top view) not in scale table 2. suggested connections for unused and not connected pins connection / pin cs out in cs_dis floating not allowed x x x to ground through 1k ? resistor through 22 k ? resistor through 10 k ? resistor through 10 k ? resistor
electrical specifications RVN5E010MH 8/35 docid026754 rev 2 3 electrical specifications figure 3. current and voltage conventions 3.1 absolute maximum ratings stressing the device above the rating listed in table 3: absolute maximum ratings may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. , 6 , *1' 9 && 9 && 287 ,1 9 ,1 9 6(16( *1' &6b',6 , &6' 9 &6' , ,1 &6 9 287 , 287 , 6(16( *$3*36 table 3. absolute maximum ratings symbol parameter value unit v cc dc supply voltage 41 v -v cc reverse dc supply voltage 16 v i out dc output current internally limited a -i out reverse dc output current 20 a i in dc input current -1 to 10 ma i csd dc current sense disable input current -1 to 10 ma v csense current sense maximum voltage (v cc > 0) v cc - 41 v +v cc v e max maximum switching energy (single pulse) (l = 2.2 mh; r l = 0 ? ; v bat = 13.5 v; t jstart = 150 c; i out = i liml (typ.) ) 645 mj
docid026754 rev 2 9/35 RVN5E010MH electrical specifications 34 3.2 thermal data v esd electrostatic discharge (human body model: r = 1.5 k ? c = 100 pf) ?in ?cs ? cs_dis ? out ?v cc 4000 2000 4000 5000 5000 v v v v v v esd charge device model (cdm-aec-q100-011) 750 v t j junction operating temperature -40 to 150 c t stg storage temperature -55 to 150 c table 3. absolute maximum ratings (continued) symbol parameter value unit table 4. thermal data symbol parameter max. value unit r thj-case thermal resistance junction-case 0.55 c/w r thj-amb thermal resistance junction-ambient 67.7 c/w
electrical specifications RVN5E010MH 10/35 docid026754 rev 2 3.3 electrical characteristics values specified in this section are for 8 v < v cc < 28 v; -40 c < t j < 150 c, unless otherwise specified. table 5. power section symbol parameter test conditions min. typ. max. unit v cc operating supply voltage 4.5 13 28 v v usd undervoltage shutdown 3.5 4.5 v v usdhyst undervoltage shutdown hysteresis 0.5 v r on on-state resistance i out = 6 a; t j = 25 c 10 m i out = 6 a; t j = 150 c 20 i out = 6 a; v cc = 5 v; t j = 25 c 13 r on-rev r dson in reverse battery condition v cc = -13 v; i out = -6 a; t j = 25 c 10 m v clamp clamp voltage i cc = 20 ma; i out = 0 a 41 46 52 v i s supply current off-state: v cc = 13 v; t j = 25 c; v in = v out = v sense = 0 v 2 5 a on-state: v cc = 13 v; v in = 5 v; i out = 0 a 1.5 3 ma i l(off) off-state output current v in = v out = 0 v; v cc = 13 v; t j = 25 c 0 0.01 3 a v in = v out = 0 v; v cc = 13 v; t j = 125 c 05 table 6. switching (v cc = 13 v, t j = 25 c) symbol parameter test conditions min. typ. max. unit t d(on) turn-on delay time r l = 2.2 ? (see figure 5 ) ? 40 ? s t d(off) turn-off delay time r l = 2.2 ? (see figure 5 ) ? 28 ? s (dv out /dt) on turn-on voltage slope r l = 2.2 ? (see figure 23 ) ?v ? s (dv out /dt) off turn-off voltage slope r l = 2.2 ? (see figure 25 ) ?v ? s w on switching energy losses at turn-on (t won ) r l = 2.2 ? (see figure 5 )? 2 ? mj w off switching energy losses at turn-off (t woff ) r l = 2.2 ? (see figure 5 ) ? 0.6 ? mj
docid026754 rev 2 11/35 RVN5E010MH electrical specifications 34 a note: to ensure long term reliability under heavy overload or short-circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. if the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles. table 7. logic inputs symbol parameter test conditions min. typ. max. unit v il low-level input voltage 0.9 v i il low-level input current v in = 0.9 v 1 a v ih high-level input voltage 2.1 v i ih high-level input current v in = 2.1 v 10 a v i(hyst) input hysteresis voltage 0.25 v v icl input clamp voltage i in = 1 ma 5.5 7 v i in = -1 ma -0.7 v csdl low-level cs_dis voltage 0.9 v i csdl low-level cs_dis current v csd = 0.9 v 1 a v csdh high-level cs_dis voltage 2.1 v i csdh high-level cs_dis current v csd = 2.1 v 10 a v csd(hyst) cs_dis hysteresis voltage 0.25 v v cscl cs_dis clamp voltage i csd = 1 ma 5.5 7 v i csd = -1 ma -0.7 table 8. protection and diagnostics symbol parameter test conditions min. typ. max. unit i limh short-circuit current v cc = 13 v 60 85 120 a 5 v < v cc < 28 v 120 i liml short-circuit current during thermal cycling v cc = 13 v; t r < t j < t tsd 21 a t tsd shutdown temperature 150 175 200 c t r reset temperature t rs + 1 t rs + 5 c t rs thermal reset of status 135 c t hyst thermal hysteresis (t tsd -t r ) 7c v demag turn-off output voltage clamp i out = 2 a; v in = 0; l = 6 mh v cc - 41 v cc - 46 v cc - 52 v v on output voltage drop limitation i out = 0.5 a; t j = -40 c to 150 c 25 mv
electrical specifications RVN5E010MH 12/35 docid026754 rev 2 table 9. current sense (8 v < v cc < 18 v) symbol parameter test conditions min. typ. max. unit k 0 i out /i sense i out = 0.25 a; v sense = 0.5 v t j = -40 c to 150 c t j = 25 c to 150 c 3000 3000 7410 7410 12000 11600 k 1 i out /i sense i out = 6 a; v sense = 0.5 v t j = -40 c to 150 c t j = 25 c to 150 c 5350 5510 6740 6740 8500 7745 dk 1 /k 1 (1) current sense ratio drift i out = 6 a; v sense = 0.5 v; v csd = 0 v; t j = -40 c to 150 c -15 15 % k 2 i out /i sense i out = 10 a; v sense = 4 v; t j = -40 c to 150 c t j = 25 c to 150 c 5850 5800 6570 6570 7690 7195 dk 2 /k 2 (1) current sense ratio drift i out = 10 a; v sense = 4 v; v csd = 0 v; t j = -40 c to 150 c -11 11 % k 3 i out /i sense i out = 25 a; v sense = 4 v; t j = -40 c to 150 c t j = 25 c to 150 c 5915 5850 6420 6420 7000 6755 dk 3 /k 3 (1) current sense ratio drift i out = 25 a; v sense = 4 v; v csd = 0 v; t j = -40 c to 150 c -8 8 % i sense0 analog sense leakage current i out = 0 a; v sense = 0 v; v csd = 5 v; v in = 0 v; t j = -40 c to 150 c 01 a i out = 0 a; v sense = 0 v; v csd = 0 v; v in = 5 v; t j = -40 c to 150 c 02 i out = 2 a; v sense = 0 v; v csd = 5 v; v in = 5 v; t j = -40 c to 150 c 1 i ol open load on-state current detection threshold v in = 5 v, 8 v < v cc < 18 v; i sense = 5 a 580ma v sense max analog sense output voltage i out = 18 a; r sense = 3.9 k 5v v senseh (2) analog sense output voltage in fault condition v cc = 13 v; r sense = 3.9 k 8v i senseh (2) analog sense output current in fault condition v cc = 13 v; v sense = 5 v 9 ma t dsense1h delay response time from falling edge of cs_dis pin v sense < 4 v, 1.5 a < i out < 25 a; i sense = 90% of i sense max (see figure 4 ) 50 100 s
docid026754 rev 2 13/35 RVN5E010MH electrical specifications 34 figure 4. current sense delay characteristics t dsense1l delay response time from rising edge of cs_dis pin v sense < 4 v; 1.5 a < i out < 25 a; i sense = 10% of i sense max (see figure 4 ) 520 s t dsense2h delay response time from rising edge of in pin v sense < 4 v, 1.5 a < i out < 25 a; i sense = 90% of i sense max (see figure 4 ) 270 600 s ? t dsense2h delay response time between rising edge of output current and rising edge of current sense v sense < 4v, i sense = 90% of i sensemax ; i out = 90% of i outmax ; i outmax = 3 a (see figure 6 ) 310 s t dsense2l delay response time from falling edge of in pin v sense < 4 v; 1.5 a < i out < 25 a; i sense = 10% of i sense max (see fig figure 4 ) 100 250 s 1. parameter guaranteed by design, it is not tested. 2. fault condition includes: power limitation and overtemperature. table 9. current sense (8 v < v cc < 18 v) (continued) symbol parameter test conditions min. typ. max. unit &855(17 6(16( ,1387 /2$' &855(17 &6b',6 w '6(16(+ w '6(16(/ w '6(16(/ w '6(16(+ *$3*36
electrical specifications RVN5E010MH 14/35 docid026754 rev 2 figure 5. switching characteristics figure 6. delay response time between rising edge of ouput current and rising edge of current sense (cs enabled) 9 287 g9 287 gw rq w u w i g9 287 gw rii w grii w grq ,1387 w w w :rq w :rii *$3*36 9 ,1 , 287 , 6(16( , 2870$; , 6(16(0$; , 6(16(0$; , 2870$; ? w '6(16(+ w w w *$3*36
docid026754 rev 2 15/35 RVN5E010MH electrical specifications 34 figure 7. output voltage drop limitation figure 8. i out /i sense vs. i out 9 rq , rxw 9 ff 9 rxw 7 m r & 7 m r & 7 m r & 9 rq 5 rq7 *$3*36 $ % & ' ( $0d[7 m ?&wr?& %0d[7 m ?&wr?& &7\slfdo7 m ?&wr?& '0lq7 m ?&wr?& (0lq7 m ?&wr?& *$3*36
electrical specifications RVN5E010MH 16/35 docid026754 rev 2 figure 9. maximum current sense ratio drift vs. load current parameter guaranteed by design ( figure 9 ); it is not tested. table 10. truth table conditions input output sense (v csd = 0 v) (1) 1. if the v csd is high, the sense output is at a high-impedance, its potential depends on leakage currents and external circuit. normal operation l h l h 0 nominal overtemperature l h l l 0 v senseh undervoltage l h l l 0 0 overload h h x (no power limitation) cycling (power limitation) nominal v senseh short-circuit to gnd (power limitation) l h l l 0 v senseh negative output voltage clamp ll 0 $ 0d[7 m ?&wr?& % 0lq7 m ?&wr?& ! " *$3*36
docid026754 rev 2 17/35 RVN5E010MH electrical specifications 34 table 11. electrical transient requirements (part 1) iso 7637-2: 2004(e) test pulse test levels (1) 1. the above test levels must be considered referred to v cc = 13.5 v except for pulse 5b. number of pulses or test times burst cycle/pulse repetition time delays and impedance iii iv min. max. 1 -75 v -100 v 5000 pulses 0.5 s 5 s 2 ms, 10 2a +37 v +50 v 5000 pulses 0.2 s 5 s 50 s, 2 3a -100 v -150 v 1 h 90 ms 100 ms 0.1 s, 50 3b +75 v +100 v 1 h 90 ms 100 ms 0.1 s, 50 4 -6 v -7 v 1 pulse 100 ms, 0.01 5b (2) 2. valid in case of external load dump clamp: 40 v maximum referred to ground. +65 v +87 v 1 pulse 400 ms, 2 table 12. electrical transient requirements (part 2) iso 7637-2: 2004(e) test pulse test level results iii iv 1c c 2a c c 3a c c 3b c c 4c c 5b (1) 1. valid in case of external load dump clamp: 40 v maximum referred to ground. cc table 13. electrical transient requirements (part 3) class contents c all functions of the device are performed as designed after exposure to disturbance. e one or more functions of the device are not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device.
electrical specifications RVN5E010MH 18/35 docid026754 rev 2 3.4 waveforms figure 10. normal operation figure 11. overload or short to gnd
docid026754 rev 2 19/35 RVN5E010MH electrical specifications 34 figure 12. intermittent overload figure 13. t j evolution in overload or short to gnd
electrical specifications RVN5E010MH 20/35 docid026754 rev 2 3.5 electrical characteristics curves figure 14. off-state output current figure 15. high-level input current figure 16. input clamp voltage figure 17. low-level input voltage figure 18. high-level input voltage figure 19. input hysteresis voltage 7f> ? &@ ,orii>q$@ *$3*36 7f>? &@ ,lk>?$@ 9lq 9 *$3*36 7f>?&@ 9lfo>9@ ,lq p$ *$3*36 7f> ?&@ 9lo>9@ *$3*36 7f>? &@ 9lk>9@ *$3*36 7f>? &@ 9lk\vw>9@ *$3*36
docid026754 rev 2 21/35 RVN5E010MH electrical specifications 34 figure 20. on-state resistance vs. t case figure 21. on-state resistance vs. v cc figure 22. undervoltage shutdown figure 23. turn-on voltage slope figure 24. i limh vs. t case figure 25. turn-off voltage slope 7f>? &@ 5rq>p2kp@ ,rxw $ 9ff 9 *$3*36 9ff>9@ 5rq>p2kp@ 7f ?& 7f ?& 7f ?& 7f ?& *$3*36 7f> ?&@ 9xvg>9@ *$3*36 7f>? &@ g9rxwgw2q>9pv@ 9ff 9 5o *$3*36 7f>? &@ ,olpk>$@ 9ff 9 *$3*36 7f>? &@ g9rxwgw2ii>9pv@ *$3*36 9ff 9 5o
electrical specifications RVN5E010MH 22/35 docid026754 rev 2 figure 26. high-level cs_dis voltage figure 27. cs_dis clamp voltage figure 28. low-level cs_dis voltage 7f> ?&@ 9fvgk>9@ *$3*36 7f> ?&@ 9fvgfo>9@ ,lq p$ *$3*36 7f> ?&@ 9fvgo>9@ *$3*36
docid026754 rev 2 23/35 RVN5E010MH electrical specifications 34 3.6 application information figure 29. application schematic 3.7 load dump protection d ld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the v cc max dc rating. the same applies if the device is subject to transients on the v cc line that are greater than the ones shown in the iso 7637-2 2004 (e) table. 3.8 mcu i/os protection when negative transients are present on the v cc line, the control pins are pulled negative to approximately -1.5 v. st suggests to insert a resistor (r prot ) in line to prevent the microcontroller i/o pins from latching-up. the value of these resistors is a compromise between the leakage current of microcontroller and the current required by the hsd i/os (input levels compatibility) with the latch-up limit of microcontroller i/os. equation 1 -v ccpeak / i latchup ? r prot ? (v oh ? c - v ih ) / i ihmax calculation example: for v ccpeak = - 1.5 v; i latchup ? 20 ma; v oh ? c ? ? 4.5 v 75 ? ? r prot ? ? 240 k recommended values: r prot = 10 k ?? c ext = 10 nf . 9 && *1' 287 9 &6b',6 ,1 5 surw 5 surw 9 ' og 5 surw 5 6(16( &6 0&8 9 & h[w *$3*36
electrical specifications RVN5E010MH 24/35 docid026754 rev 2 3.9 current sense and diagnostic the current sense pin performs a double function (see figure 30: current sense and diagnostic ): ? current mirror of the load current in normal operation, delivering a current proportional to the load current according to a known ratio k x . the current i sense can be easily converted to a voltage v sense by means of an external resistor r sense . linearity between i out and v sense is ensured up to 5 v minimum (see parameter v sense in table 9: current sense (8 v < v cc < 18 v) ). the current sense accuracy depends on the output current (refer to current sense electrical characteristics table 9: current sense (8 v < v cc < 18 v) ). ? diagnostic flag in fault conditions , delivering a fixed voltage v senseh up to a maximum current i senseh in case of the following fault conditions (refer to table 10: truth table ): ? power limitation activation ? overtemperature a logic level high on the cs_dis simultaneously sets all the current sense pins of the device in a high-impedance state, thus disabling the current monitoring and diagnostic detection. this feature allows multiplexing of the microcontroller analog inputs by sharing the sense resistance and adc line among different devices. figure 30. current sense and diagnostic 0dlq026q 9 287q 5 6(16( 5 3527 7rx&$'& 3zub/lp 9 6( 6 ( 1 6 ( 2yhuwhpshudwxuh &855(17 6(16(q , 287 . ; , 6(16(+ 9 %$7 9 6(16(+ /rdg 9 && *1' &6b',6 *$3*36
docid026754 rev 2 25/35 RVN5E010MH electrical specifications 34 3.10 maximum demagnetization energy (v cc = 13.5 v) figure 31. maximum turn-off current versus inductance 1. values are generated with r l = 0 ??? in case of repetitive pulses, t jstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves a and b. 'hpdjqhwl]dwlrq 'hpdjqhwl]dwlrq 'hpdjqhwl]dwlrq w 9 ,1 , / & 7 mvwduw ?& uhshwlwlyh sxovh $ 7 mvwduw ?& vlqjoh sxovh % 7 mvwduw ?& uhshwlwlyh sxovh $ % & *$3*36
package and pc board thermal data RVN5E010MH 26/35 docid026754 rev 2 4 package and pc board thermal data 4.1 hpak thermal data figure 32. pc board 1. layout condition of rth and zth measurements (pcb fr4 area = 58 mm x 58 mm, pcb thickness =1.8 mm, cu thickness = 70 m, copper areas: from minimum pad lay-out to 8 cm 2 ). figure 33. r thj-amb vs. pcb copper area in open box free air condition *$3*36 *$3*36 3&%&xkhdwvlqnduhdfpa 57+mbdpe?&:
docid026754 rev 2 27/35 RVN5E010MH package and pc board thermal data 34 figure 34. hpak thermal impedance junction ambient single pulse figure 35. thermal fitting model of a single-channel hsd in hpak 1. the fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded protection functions (power limitation or thermal cycling during thermal shutdown) are not triggered. equation 2: pulse calculation formula where ? = t p /t *$3*36 *$3*36 z th ? r th ? z thtp 1 ? ? ?? + ? =
package and pc board thermal data RVN5E010MH 28/35 docid026754 rev 2 table 14. thermal parameter area/island (cm 2 ) footprint 4 8 r1 (c/w) 0.01 r2 (c/w) 0.15 r3 (c/w) 0.5 r4 (c/w) 8 r5 (c/w) 28 22 12 r6 (c/w) 31 25 16 c1 (w.s/c) 0.005 c2 (w.s/c) 0.05 c3 (w.s/c) 0.1 c4 (w.s/c) 0.4 c5 (w.s/c) 0.8 1.4 3 c6 (w.s/c) 3 6 9
docid026754 rev 2 29/35 RVN5E010MH package and packing information 34 5 package and packing information 5.1 ecopack ? in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www .st.com . ecopack ? is an st trademark. 5.2 hpak mechanical data figure 36. hpak package dimension ("1($'5
package and packing information RVN5E010MH 30/35 docid026754 rev 2 table 15. hpak mechanical data ref. dim data book mm min. nom. max. a 2.20 2.40 a1 0.90 1.10 a2 0.03 0.23 b 0.45 0.60 b4 5.20 5.40 c 0.45 0.60 c2 0.48 0.60 d 6.00 6.20 d1 4.95 5.10 5.25 e 6.40 6.60 e1 5.00 5.20 5.40 e 0.85 e1 1.60 1.80 e2 3.30 3.50 e3 5.00 5.20 h 9.35 10.10 l 1.00 1.50 (l1) 2.60 2.80 3.00 l2 0.60 0.80 1.00 l4 0.60 1.00 r 0.20 v2 0 8
docid026754 rev 2 31/35 RVN5E010MH package and packing information 34 5.3 hpak suggested land pattern figure 37. hpak suggested pad layout $ooglphqvlrqvduhlqpp 1rwhwkhodqgsdwwhuqsursrvhglvqrwlqwhqghgwrryhuuxoh8vh u
v3&%ghvljqpdqxidfwxulqjdqgvroghulqjsurfhvvuxohv *$3*36
package and packing information RVN5E010MH 32/35 docid026754 rev 2 5.4 packing information the devices can be packed in tube or tape and reel shipments (see table 16: device summary ). figure 38. hpak tube shipment (no suffix) figure 39. hpak tape and reel (suffix ?tr?) $ & % *$3*36 all dimensions are in mm. base q.ty 75 bulk q.ty 3000 tube length ( 0.5) 532 a 6 b 21.3 c ( 0.1) 0.6 $ooglphqvlrqvduhlqpp %dvhtw\ %xontw\ $pd[ %plq &? ) * 1plq 7pd[ 7$3(',0(16,216 $ffruglqjwr(ohfwurqlf,qgxvwulhv$vvrfldwlrq (,$6wdqgduguhy$)he $ooglphqvlrqvduhlqpp 7dshzlgwk : 7dshkrohvsdflq j 3? &rpsrqhqwvsdflqj 3 +rohgldphwhu '? +rohgldphwhu 'plq +rohsrvlwlrq )? &rpsduwphqwghswk .pd[ +rohvsdflqj 3? 7r s fryhu wdsh (qg 6wduw 1rfrpsrqhqwv 1rfrpsrqhqwv &rpsrqhqwv ppplq ppplq (psw\frpsrqhqwvsrfnhwv vdohgzlwkfryhuwdsh 8vhugluhfwlrqriihhg 5((/',0(16,216 *$3*36
docid026754 rev 2 33/35 RVN5E010MH order codes 34 6 order codes table 16. device summary package order codes tube tape and reel 6 pins hpak RVN5E010MH RVN5E010MHtr
revision history RVN5E010MH 34/35 docid026754 rev 2 7 revision history table 17. document revision history date revision changes 25-jul-2013 1 initial release. 15-sep-2014 2 updated features on page 1 .
docid026754 rev 2 35/35 RVN5E010MH 35 important notice ? please read carefully stmicroelectronics nv and its subsidiaries (?st?) reserve the right to make changes, corrections, enhancements, modifications, and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant in formation on st products before placing orders. st products are sold pursuant to st?s terms and conditions of sale in place at the time of o rder acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and st assumes no liability for application assistance or the design of purchasers? products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information set forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2014 stmicroelectronics ? all rights reserved

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