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  august 2009 ?2006 fairchild semiconductor corporation www.fairchildsemi.com FXL4TD245 ? rev. 1.0.6 FXL4TD245 ? low-voltage dual-supply 4-bi t signal translator with configurable voltage supplies and signal levels and 3-state outputs and inde pendent direction controls FXL4TD245 low-voltage dual-supply 4-bit signal translator with configurable voltage supplies and signal levels and 3-state outputs and independent direction controls features bi-directional interface between any 2 levels from 1.1v to 3.6v fully configurable: inputs track v cc level non-preferential power-up sequencing; either v cc may be powered-up first outputs remain in 3-state until active v cc level is reached outputs switch to 3-state if either v cc is at gnd power-off protection control inputs (t/r n , oe ) levels are referenced to v cca voltage packaged in 16-terminal dqfn (2.5mm x 3.5mm) and 16-terminal micromlp (1.8mm x 2.6mm) esd protections exceeds: ? 4kv hbm esd (per jesd22-a114 & mil std 883e 3015.7) ? 8kv hbm i/o to gnd esd (per jesd22-a114 & mil std 883e 3015.7) ? 1kv cdm esd (per esd stm 5.3) ? 200v mm esd (per jesd22-a115 & esd stm5.2) general description the FXL4TD245 is a configurable 4-bit dual-voltage- supply translator designed for both uni-directional and bi-directional voltage translation between two logic lev- els. the device allows translation between voltages as high as 3.6v to as low as 1.1v. the a port tracks the v cca level, and the b port tracks the v ccb level. this allows for bi-directional voltage translation over a variety of voltage levels: 1.2v, 1.5v, 1.8v, 2.5v, and 3.3v. the device remains in 3-state until both v cc s reach active levels allowing either v cc to be powered-up first. internal power down control circuits place the device in 3-state if either v cc is removed. the transmit/receive (t/r ) inputs independently deter- mine the direction of data through each of the four bits. the oe input, when high, disables both the a and b ports by placing them in a 3-state condition. the FXL4TD245 is designed so that the control pins (t/r and oe ) are supplied by v cca . ordering information for fairchild?s definition of ?green? eco status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html . functional diagram order number package number eco status package description FXL4TD245bqx mlp016e green 16-terminal depopulated quad very-thin flat pack, no leads (dqfn), jedec mo-241, 2.5mm x 3.5mm FXL4TD245umx umlp16a green 16-terminal quad, ultrathin, molded leadless package (umlp), 1.8mm x 2.6mm, 0.4mm pitch v cca a 0-3 0-3 oe t/r v ccb b 0-3
?2006 fairchild semiconductor corporation www.fairchildsemi.com FXL4TD245 ? rev. 1.0.6 2 FXL4TD245 ? low-voltage dual-supply 4-bi t signal translator with configurable voltage supplies and signal levels and 3-state outputs and inde pendent direction controls connection diagrams dqfn pad assignments (top through view) micromlp pad assignments (top through view) top mark micromlp top mark (top view) pin assignment dqfn pin # mlp pin # terminal name description 13v cca side a power supply 24t/r 0 transmit/receive input 3?6 5?8 a 0 ?a 3 side a inputs or 3-state outputs 79t/r 3 transmit/receive input 8 10 gnd ground 911 oe output enable input 10 12 t/r 2 transmit/receive input 11?14 13?16 b 3 ?b 0 side b inputs or 3-state outputs 15 1 t/r 1 transmit/receive input 16 2 v ccb side b power supply 2 t/r 0 3 a 0 4 a 1 5 a 2 a 3 6 7 8 15 14 13 12 11 10 t/r 3 gnd 9 116 oe v cca v ccb t/r 1 b 0 b 1 b 2 b 3 t/r 2 13 14 15 16 8 7 6 5 1234 12 11 10 9 b3 b2 b1 b0 a3 a2 a1 a0 t/r2 oe gnd t/r3 t/r1 vccb vcca t/r0 xh pin#1 identifier
?2006 fairchild semiconductor corporation www.fairchildsemi.com FXL4TD245 ? rev. 1.0.6 3 FXL4TD245 ? low-voltage dual-supply 4-bi t signal translator with configurable voltage supplies and signal levels and 3-state outputs and inde pendent direction controls truth table h = high voltage level l = low voltage level x = don't care power-up/power-down sequencing fxl translators offer an advantage in that either v cc may be powered up first. this benefit derives from the chip design. when either v cc is at 0 volts, outputs are in a high-impedance state. the control inputs (t/r n and oe ) are designed to track the v cca supply. a pull-up resistor tying oe to v cca should be used to ensure that bus contention, excessive currents, or oscillations do not occur during power-up/power-down. the size of the pull- up resistor is based upon the current-sinking capability of the oe driver. the recommended power-up sequence is the following: 1. apply power to either v cc . 2. apply power to the t/r n inputs (logic high for a-to-b operation; logic low for b-to-a operation) and to the respective data inputs (a port or b port). this may occur at the same time as step 1. 3. apply power to other v cc . 4. drive the oe input low to enable the device. the recommended power-down sequence is the following: 1. drive oe input high to disable the device. 2. remove power from either v cc . 3. remove power from other v cc . inputs outputs oe t/r 0 t/r 1 t/r 2 t/r 3 l l x x x b0 data to a0 output l h x x x a0 data to b0 output l x l x x b1 data to a1 output l x h x x a1 data to b1 output l x x l x b2 data to a2 output l x x h x a2 data to b2 output l x x x l b3 data to a3 output l x x x h a3 data to b3 output h x x x x 3-state
?2006 fairchild semiconductor corporation www.fairchildsemi.com FXL4TD245 ? rev. 1.0.6 4 FXL4TD245 ? low-voltage dual-supply 4-bi t signal translator with configurable voltage supplies and signal levels and 3-state outputs and inde pendent direction controls absolute maximum ratings the ?absolute maximum ratings? are those values beyond which the safety of the device cannot be guaranteed. the device should not be operated at these limits. the parametric values defined in the electrical characteristics tables are not guaranteed at the absolute maximum ratings. the ?recommended operating conditions? table will define the conditions for actual device operation. recommended operating conditions (2) the recommended operating conditions table defines the conditions for actual device operation. recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. fairchild does not recommend exceeding them or designing to absolute maximum ratings. notes: 1. i o absolute maximum rating must be observed. 2. all unused inputs and i/o pins must be held at v cci or gnd. symbol parameter rating v cca , v ccb supply voltage ? 0.5v to + 4.6v v i dc input voltage i/o port a i/o port b control inputs (t/r n , oe ) ? 0.5v to + 4.6v ? 0.5v to + 4.6v ? 0.5v to + 4.6v v o output voltage (1) outputs 3-state outputs active (a n ) outputs active (b n ) ? 0.5v to + 4.6v ? 0.5v to v cca + 0.5v ? 0.5v to v ccb + 0.5v i ik dc input diode current @ v i < 0v ? 50ma i ok dc output diode current @ v o < 0v v o > v cc ? 50ma + 50ma i oh / i ol dc output source/sink current ? 50ma / + 50ma i cc dc v cc or ground current per supply pin 100ma t stg storage temperature range ? 65 c to + 150 c symbol parameter rating v cca or v ccb power supply operating 1.1v to 3.6v input voltage port a port b control inputs (t/r n , oe ) 0.0v to 3.6v 0.0v to 3.6v 0.0v to v cca output current in i oh /i ol with v cc @ 3.0v to 3.6v 2.3v to 2.7v 1.65v to 1.95v 1.4v to 1.65v 1.1v to 1.4v 24ma 18ma 6ma 2ma 0.5ma t a free air operating temperature ? 40 c to + 85 c t / v maximum input edge rate v cca/b = 1.1v to 3.6v 10ns/v
?2006 fairchild semiconductor corporation www.fairchildsemi.com FXL4TD245 ? rev. 1.0.6 5 FXL4TD245 ? low-voltage dual-supply 4-bi t signal translator with configurable voltage supplies and signal levels and 3-state outputs and inde pendent direction controls dc electrical characteristics symbol parameter conditions v cci (v) v cco (v) min. max. units v ih high level input voltage (3) data inputs a n , b n 2.7?3.6 1.1?3.6 2.0 v 2.3?2.7 1.6 1.65?2.3 0.65 x v cci 1.4?1.65 0.65 x v cci 1.1?1.4 0.9 x v cci control pins oe , t/r n (referenced to v cca ) 2.7?3.6 1.1?3.6 2.0 2.3?2.7 1.6 1.65?2.3 0.65 x v cca 1.4?1.65 0.65 x v cca 1.1?1.4 0.9 x v cca v il low level input voltage (3) data inputs a n , b n 2.7?3.6 1.1?3.6 0.8 v 2.3?2.7 0.7 1.65?2.3 0.35 x v cci 1.4?1.65 0.35 x v cci 1.1?1.4 0.1 x v cci control pins oe , t/r n (referenced to v cca ) 2.7?3.6 1.1?3.6 0.8 2.3?2.7 0.7 1.65?2.3 0.35 x v cca 1.4?1.65 0.35 x v cca 1.1?1.4 0.1 x v cca v oh high level output voltage (4) i oh = ? 100 a 1.1?3.6 1.1?3.6 v cc0 ?0.2 v i oh = ? 12ma 2.7 2.7 2.2 i oh = ? 18ma 3.0 3.0 2.4 i oh = ? 24ma 3.0 3.0 2.2 i oh = ? 6ma 2.3 2.3 2.0 i oh = ? 12ma 2.3 2.3 1.8 i oh = ? 18ma 2.3 2.3 1.7 i oh = ? 6ma 1.65 1.65 1.25 i oh = ? 2ma 1.4 1.4 1.05 i oh = ? 0.5ma 1.1 1.1 0.75 x v cc0 v ol low level output voltage (4) i ol = 100 a 1.1?3.6 1.1- 3.6 0.2 v i ol = 12ma 2.7 2.7 0.4 i ol = 18ma 3.0 3.0 0.4 i ol = 24ma 3.0 3.0 0.55 i ol = 12ma 2.3 2.3 0.4 i ol = 18ma 2.3 2.3 0.6 i ol = 6ma 1.65 1.65 0.3 i ol = 2ma 1.4 1.4 0.35 i ol = 0.5ma 1.1 1.1 0.3 x v cc0
?2006 fairchild semiconductor corporation www.fairchildsemi.com FXL4TD245 ? rev. 1.0.6 6 FXL4TD245 ? low-voltage dual-supply 4-bi t signal translator with configurable voltage supplies and signal levels and 3-state outputs and inde pendent direction controls notes: 3. v cci = the v cc associated with the data input under test. 4. v cco = the v cc associated with the output under test. 5. don't care = any valid logic level. 6. reflects current per supply, v cca or v ccb . i i input leakage current. control pins v i = v cca or gnd 1.1?3.6 3.6 1.0 a i off power off leak- age current a n , v i or v o = 0v to 3.6v 0 3.6 10.0 a b n , v i or v o = 0v to 3.6v 3.6 0 10.0 i oz 3-state output leakage (5) 0 v o 3.6v v i = v ih or v il a n , b n oe = v ih 3.6 3.6 10.0 a b n , oe = don't care 0 3.6 + 10.0 a n , oe = don't care 3.6 0 + 10.0 i cca/b quiescent supply current (6) v i = v cci or gnd; i o = 0 1.1?3.6 1.1?3.6 20.0 a i ccz quiescent supply current (6) v i = v cci or gnd; i o = 0 1.1?3.6 1.1?3.6 20.0 a i cca quiescent supply current v i = v cca or gnd; i o = 0 0 1.1?3.6 ? 10.0 a v i = v cca or gnd; i o = 0 1.1?3.6 0 10.0 a i ccb quiescent supply current v i = v ccb or gnd; i o = 0 1.1?3.6 0 ? 10.0 a v i = v ccb or gnd; i o = 0 0 1.1?3.6 10.0 a i cca/b increase in i cc per input; other inputs at v cc or gnd v ih = 3.0 3.6 3.6 500 a symbol parameter conditions v cci (v) v cco (v) min. max. units dc electrical characteristics (continued)
?2006 fairchild semiconductor corporation www.fairchildsemi.com FXL4TD245 ? rev. 1.0.6 7 FXL4TD245 ? low-voltage dual-supply 4-bi t signal translator with configurable voltage supplies and signal levels and 3-state outputs and inde pendent direction controls ac electrical characteristics v cca = 3.0v to 3.6v v cca = 2.3v to 2.7v v cca = 1.65v to 1.95v symbol parameter t a = ? 40 c to + 85 c units v ccb = 3.0v to 3.6v v ccb = 2.3v to 2.7v v ccb = 1.65v to 1.95v v ccb = 1.4v to 1.6v v ccb = 1.1v to 1.3v min. max. min. max. min. max. min. max. min. max. t plh , t phl propagation delay a to b 0.2 3.5 0.3 3.9 0.5 5.4 0.6 6.8 1.4 22.0 ns propagation delay b to a 0.2 3.5 0.2 3.8 0.3 4.0 0.5 4.3 0.8 13.0 t pzh , t pzl output enable oe to b 0.5 4.0 0.7 4.4 1.0 5.9 1.0 6.4 1.5 17.0 ns output enable oe to a 0.5 4.0 0.5 4.0 0.5 4.0 0.5 4.0 0.5 4.0 t phz , t plz output disable oe to b 0.2 3.8 0.2 4.0 0.7 4.8 1.5 6.2 2.0 17.0 ns output disable oe to a 0.2 3.7 0.2 3.7 0.2 3.7 0.2 3.7 0.2 3.7 symbol parameter t a = ? 40 c to + 85 c units v ccb = 3.0v to 3.6v v ccb = 2.3v to 2.7v v ccb = 1.65v to 1.95v v ccb = 1.4v to 1.6v v ccb = 1.1v to 1.3v min. max. min. max. min. max. min. max. min. max. t plh , t phl propagation delay a to b 0.2 3.8 0.4 4.2 0.5 5.6 0.8 6.9 1.4 22.0 ns propagation delay b to a 0.3 3.9 0.4 4.2 0.5 4.5 0.5 4.8 1.0 7.0 t pzh , t pzl output enable oe to b 0.6 4.2 0.8 4.6 1.0 6.0 1.0 6.8 1.5 17.0 ns output enable oe to a 0.6 4.5 0.6 4.5 0.6 4.5 0.6 4.5 0.6 4.5 t phz , t plz output disable oe to b 0.2 4.1 0.2 4.3 0.7 4.8 1.5 6.7 2.0 17.0 ns output disable oe to a 0.2 4.0 0.2 4.0 0.2 4.0 0.2 4.0 0.2 4.0 symbol parameter t a = ? 40 c to + 85 c units v ccb = 3.0v to 3.6v v ccb = 2.3v to 2.7v v ccb = 1.65v to 1.95v v ccb = 1.4v to 1.6v v ccb = 1.1v to 1.3v min. max. min. max. min. max. min. max. min. max. t plh , t phl propagation delay a to b 0.3 4.0 0.5 4.5 0.8 5.7 0.9 7.1 1.5 22.0 ns propagation delay b to a 0.5 5.4 0.5 5.6 0.8 5.7 1.0 6.0 1.2 8.0 t pzh , t pzl output enable oe to b 0.6 5.2 0.8 5.4 1.2 6.9 1.2 7.2 1.5 18.0 ns output enable oe to a 1.0 6.7 1.0 6.7 1.0 6.7 1.0 6.7 1.0 6.7 t phz , t plz output disable oe to b 0.2 5.1 0.2 5.2 0.8 5.2 1.5 7.0 2.0 17.0 ns output disable oe to a 0.5 5.0 0.5 5.0 0.5 5.0 0.5 5.0 0.5 5.0
?2006 fairchild semiconductor corporation www.fairchildsemi.com FXL4TD245 ? rev. 1.0.6 8 FXL4TD245 ? low-voltage dual-supply 4-bi t signal translator with configurable voltage supplies and signal levels and 3-state outputs and inde pendent direction controls ac electrical characteristics (continued) v cca = 1.4v to 1.6v v cca = 1.1v to 1.3v capacitance symbol parameter t a = ? 40 c to + 85 c units v ccb = 3.0v to 3.6v v ccb = 2.3v to 2.7v v ccb = 1.65v to 1.95v v ccb = 1.4v to 1.6v v ccb = 1.1v to 1.3v min. max. min. max. min. max. min. max. min. max. t plh , t phl propagation delay a to b 0.5 4.3 0.5 4.8 1.0 6.0 1.0 7.3 1.5 22.0 ns propagation delay b to a 0.6 6.8 0.8 6.9 0.9 7.1 1.0 7.3 1.3 9.5 t pzh , t pzl output enable oe to b 1.1 7.5 1.1 7.6 1.3 7.7 1.4 7.9 2.0 20.0 ns output enable oe to a 1.0 7.5 1.0 7.5 1.0 7.5 1.0 7.5 1.0 7.5 t phz , t plz output disable oe to b 0.4 6.1 0.4 6.2 0.9 6.2 1.5 7.5 2.0 18.0 ns output disable oe to a 1.0 6.0 1.0 6.0 1.0 6.0 1.0 6.0 1.0 6.0 symbol parameter t a = ? 40 c to + 85 c units v ccb = 3.0v to 3.6v v ccb = 2.3v to 2.7v v ccb = 1.65v to 1.95v v ccb = 1.4v to 1.6v v ccb = 1.1v to 1.3v min. max. min. max. min. max. min. max. min. max. t plh , t phl propagation delay a to b 0.8 13.0 1.0 7.0 1.2 8.0 1.3 9.5 2.0 24.0 ns propagation delay b to a 1.4 22.0 1.4 22.0 1.5 22.0 1.5 22.0 2.0 24.0 t pzh , t pzl output enable oe to b 1.0 12.0 1.0 9.0 2.0 10.0 2.0 11.0 2.0 24.0 ns output enable oe to a 2.0 22.0 2.0 22.0 2.0 22.0 2.0 22.0 2.0 22.0 t phz , t plz output disable oe to b 1.0 15.0 0.7 7.0 1.0 8.0 2.0 10.0 2.0 20.0 ns output disable oe to a 2.0 15.0 2.0 12.0 2.0 12.0 2.0 12.0 2.0 12.0 symbol parameter conditions t a = + 25 c units typical c in input capacitance control pins (oe , t/r )v cca = v ccb = 3.3v, v i = 0v or v cca/b 4.0 pf c i/o input/output capacitance a n , b n ports v cca = v ccb = 3.3v, v i = 0v or v cca/b 5.0 pf c pd power dissipation capacitance v cca = v ccb = 3.3v, v i = 0v or v cc , f = 10mhz 20.0 pf
?2006 fairchild semiconductor corporation www.fairchildsemi.com FXL4TD245 ? rev. 1.0.6 9 FXL4TD245 ? low-voltage dual-supply 4-bi t signal translator with configurable voltage supplies and signal levels and 3-state outputs and inde pendent direction controls ac loading and waveforms figure 1. ac test circuit ac load table input t r = t f = 2.0 ns, 10% to 90% input t r = t f = 2.5ns, 10% to 90%, @ v i = 3.0v to 3.6v only figure 2. waveform for inverting and non-inverting functions input t r = t f = 2.0 ns, 10% to 90% input t r = t f = 2.5ns, 10% to 90%, @ v i = 3.0v to 3.6v only figure 3. 3-state output low enable and disable times for low voltage logic input t r = t f = 2.0 ns, 10% to 90% input t r = t f = 2.5ns, 10% to 90%, @ v i = 3.0v to 3.6v only figure 4. 3-state output high enable and disable times for low voltage logic for v mi : v cci = v cca for control pins t/r and oe , or v cca / 2 test switch t plh , t phl open t plz , t pzl v cco x 2 at v cco = 3.3 0.3v, 2.5v 0.2v, 1.8v 0.15v, 1.5v 0.1v, 1.2v 0.1v t phz , t pzh gnd v cc dut c l r l rtr1 open t plh , t phl t pzh , t phz t pzl , t plz gnd v cc x 2 test signal v cco c l r l rtr1 1.2v 0.1v 15pf 2k 2k 1.5v 0.1v 15pf 2k 2k 1.8v 0.15v 15pf 2k 2k 2.5v 0.2v 15pf 2k 2k 3.3v 0.3v 15pf 2k 2k v cci v cco gnd data in data out t pxx t pxx v mi v mo data out output control t pzl t plz v cca gnd v mi v ol v y v mo symbol v cc 3.3v 0.3v 2.5v 0.2v 1.8v 0.15v 1.5v 0.1v 1.2v 0.1v v mi v cci / 2v cci / 2v cci / 2v cci / 2v cci / 2 v mo v cco / 2v cco / 2v cco / 2v cco / 2v cco / 2 v x v oh ? 0.3v v oh ? 0.15v v oh ? 0.15v v oh ? 0.1v v oh ? 0.1v v y v ol + 0.3v v ol + 0.15v v ol + 0.15v v ol + 0.1v v ol + 0.1v v cca v x v oh gnd data out output control t pzh t phz v mi v mo
?2006 fairchild semiconductor corporation www.fairchildsemi.com FXL4TD245 ? rev. 1.0.6 10 FXL4TD245 ? low-voltage dual-supply 4-bi t signal translator with configurable voltage supplies and signal levels and 3-state outputs and inde pendent direction controls tape and reel specification tape format for dqfn 10 tape dimensions millimeters package designator tape section number cavities cavity status cover tape status bqx leader (start end) 125 (typ) empty sealed carrier 2500/3000 filled sealed trailer (hub end) 75 (typ) empty sealed
?2006 fairchild semiconductor corporation www.fairchildsemi.com FXL4TD245 ? rev. 1.0.6 11 FXL4TD245 ? low-voltage dual-supply 4-bi t signal translator with configurable voltage supplies and signal levels and 3-state outputs and inde pendent direction controls reel dimensions inches (millimeters) tape sizeabcdnw1w2 12 mm 13.0 (330) 0.059 (1.50) 0.512 (13.00) 0.795 (20.20) 7.008 (178) 0.488 (12.4) 0.724 (18.4)
?2006 fairchild semiconductor corporation www.fairchildsemi.com FXL4TD245 ? rev. 1.0.6 12 FXL4TD245 ? low-voltage dual-supply 4-bi t signal translator with configurable voltage supplies and signal levels and 3-state outputs and inde pendent direction controls physical dimensions figure 5. 16-terminal depopulated quad very-thin flat pack no leads (dqfn), jedec mo-241 2.5 x 3.5mm package drawings are provided as a servic e to customers considering fairchild co mponents. drawings may change in any manner without notice. please note the revision and/or date on the drawi ng and contact a fairchild semic onductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and conditions, specif- ically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packagi ng area for the most recent package drawings: http://www.fairchildsemi.com/packaging/.
?2006 fairchild semiconductor corporation www.fairchildsemi.com FXL4TD245 ? rev. 1.0.6 13 FXL4TD245 ? low-voltage dual-supply 4-bi t signal translator with configurable voltage supplies and signal levels and 3-state outputs and inde pendent direction controls physical dimensions figure 5. 16-terminal quad, ultrathin, molded leadless package (umlp), 1.8mm x 2.6mm package drawings are provided as a servic e to customers considering fairchild co mponents. drawings may change in any manner without notice. please note the revision and/or date on the drawi ng and contact a fairchild semic onductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and conditions, specif- ically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packagi ng area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. a. this package is not currently registered with c. dimensions and tolerances per asme y14.5m, 1994 top view bottom view recommended land pattern 0.10 c 0.08 c b a c 2.60 1.80 0.10 c 2x 2x side view seating plane 0.10 c 0.050 0.10 c a b 0.05 c 0.55 max. 0.40 pin #1 ident 1 5 9 13 16 all terminals 2.100 2.900 0.400 0.663 0.563 0.225 1 15x 16x 0.152 f. drawing file name : umlp16arev3 d. terminal shape may vary according to package supplier, see terminal shape variants b. dimensions are in millimeters. any standards committee 0.40 0.60 0.100 0.30 0.50 0.100 terminal shape variants 0.15 0.25 15x pin 1 non-pin 1 0.15 0.25 15x 0.30 0.50 0.15 0.25 0.30 0.50 0.15 0.25 15x 15x supplier 1 supplier 2 pin 1 non-pin 1 e. land pattern is a minimal toe design
FXL4TD245 ? low-voltage dual-supply 4-bi t signal translator with configurable voltage supplies and signal levels and 3-state outputs and inde pendent direction controls ?2006 fairchild semiconductor corporation www.fairchildsemi.com FXL4TD245 ? rev. 1.0.6 14


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