february 1999 f dr8 58p single p-channel , logic level, powertrench tm mosfet general description features absolute maximum ratings t a = 25 o c unless otherwise noted symbol parameter ratings units v dss drain-source voltage -30 v v gss gate-source voltage 20 v i d drain t current - continuous (note 1) -8 a - pulsed -50 p d maximum power dissipation (note 1a ) 1.8 w (note 1 b) 1 (note 1c ) 0.9 t j ,t stg operating and storage temperature range -55 to 150 c thermal characteristics r q ja thermal resistance, junction-to-ambient (note 1a) 70 c/w r q jc thermal resistance, junction-to-case (note 1) 20 c/w fdr85 8p rev.c -8 a, -30 v. r ds(on ) = 0.019 w @ v gs = -10 v, r ds(on ) = 0.028 w @ v gs = -4.5 v. low gate charge (21nc typical). high performance t rench technology for extremely low r ds(on) . supersot tm -8 package: small footprint (40 %) less than so-8); l ow profile (1mm thick); m aximum power comperable to so-8. the supersot-8 family of p -channel logic level mosfets have been designed to provide a low profile, small footprint alternative to industry standard so-8 little foot type product. this p -channel logic level mosfet is produced using fairchild semiconductor 's advanced powertrench process that has been especially tailored to minimize the on-state resistance and yet maintain low gate charge for superior switching performance . these devices are well suited for notebook computer applications: load switching and power management, battery charging circuits, and dc/ dc conversion. sot-23 supersot t m -8 soic-16 so-8 sot-223 supersot t m -6 ? 1999 fairchild semiconductor corporation 1 5 6 7 8 4 3 2 d s d d s d g supersot -8 tm d mark: 858p
electrical characteristics (t a = 25 o c unless otherwise noted ) symbol parameter conditions min typ max units off characteristics bv dss drain-source breakdown voltage v gs = 0 v, i d = -250 a -30 v d bv dss / d t j breakdown voltage temp. coefficient i d = -50 a , referenced to 25 o c -22 mv / o c i dss zero gate voltage drain current v ds = -24 v, v gs = 0 v -1 a t j = 5 5c -10 a i gss gate - body leakage current v gs = 20 v, v ds = 0 v 100 na i gss gate - body leakage, reverse v gs = -20 v, v ds = 0 v -100 na on characteristics (note 2) v gs (th) gate threshold voltage v ds = v gs , i d = -250 a -1 -1.7 -3 v d v gs(th) / d t j gate threshold voltage temp.coefficient i d = -50 a , referenced to 25 o c 4 mv / o c r ds(on) static drain-source on-resistance v gs = -10 v, i d = -8 a 0.0155 0.019 w t j = 12 5c 0.021 0.03 v gs = -4.5 v, i d = -6.3 a 0.022 0.028 i d(on) on-state drain current v gs = -10 v, v ds = -5 v -50 a g fs forward transconductance v ds = -10 v, i d = -3.2 a 25 s dynamic characteristics c iss input capacitance v ds = -15 v, v gs = 0 v, f = 1.0 mhz 2010 pf c oss output capacitance 590 pf c rss reverse transfer capacitance 260 pf switching ch aracteristics (note 2 ) t d(on ) turn - on delay time v dd = -15 v, i d = -1 a, 12 22 ns t r turn - on rise time v gs = -10 v, r gen = 6 w 15 27 ns t d(off) turn - off delay time 100 140 ns t f turn - off fall time 55 80 ns q g total gate charge v ds = -15 v, i d = -8 a, 21 30 nc q gs gate-source charge v gs = 5 v 6 nc q gd gate-drain charge 8 nc drain-source diode characteristics and maximum ratings i s maximum continuous drain-source diode forward current -0.67 a v sd drain-source diode forward voltage v gs = 0 v, i s = -0.67 a (note 2 ) -0.7 -1.2 v notes: 1 . r q ja is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the so lder mounting surface of the drain pins. r q jc is guaranteed by design while r q ca is determined by the user's board design. scale 1 : 1 on letter size paper 2. pulse test: pulse width < 300 s, duty cycle < 2.0%. fdr85 8p rev.c b. 125 o c/w on a 0.026 in 2 of pad of 2oz copper. a . 70 o c/w on a 1 in 2 pad of 2oz copper. c . 135 o c/w on a 0.005 in 2 of pad of 2oz copper.
fdr85 8p rev.c 0 1 2 3 4 5 0 12 24 36 48 60 - v , drain-source voltage (v) - i , drain-source current (a) ds d -4.5v -4.0v -6.0v -3.5v -3.0v v = -10v gs 0 10 20 30 40 50 0.5 1 1.5 2 2.5 - i , drain current (a) drain-source on-resistance v = -3.5 v gs d r , normalized ds(on) -10v -4.5v -4.0v -7.0v -5.5v typical electrical characteristics figure 1. on-region characteristics . figure 2. on-resistance variation with drain current and gate voltage . -50 -25 0 25 50 75 100 125 150 0.6 0.8 1 1.2 1.4 1.6 t , junction temperature (c) drain-source on-resistance j r , normalized ds(on) v = -10v gs i = -8.0a d figure 3. on-resistance variation with temperature . 1 2 3 4 5 0 10 20 30 40 50 -v , gate to source voltage (v) - i , drain current (a) v = -5v ds gs d t = -55c j 125c 25c figure 5 . transfer characteristics. 0 2 4 6 8 10 0 0.02 0.04 0.06 0.08 - v , gate to source voltage (v) gs r , on-resistance (ohm) ds(on) 25c i =-4.0a d t =125c a figure 4 . on-resistance variation with gate-t o -source voltage. 0 0.2 0.4 0.6 0.8 1 1.2 1.4 0.0001 0.001 0.01 0.1 1 10 50 -v , body diode forward voltage (v) -i , reverse drain current (a) 25c -55c v = 0v gs sd s t = 125c j figure 6 . body diode forward voltage varia tion with source current and temperature.
fdr85 8p rev.c typical electrical characteristics (continued) figure 9 . maximum safe operating area. 0 8 16 24 32 40 0 2 4 6 8 10 q , gate charge (nc) -v , gate-source voltage (v) g gs v = -5v ds -15v i = -8a d -10v figure 7 . gate charge characteristics . 0.1 0.2 0.5 1 2 5 10 20 30 50 0.01 0.05 0.5 5 20 80 - v , drain-source voltage (v) - i , drain current (a) rds(on) limit d dc ds 1s 100ms 10ms 1ms 10s a v = -10v single pulse r = 135c/w t = 25c q ja gs a 100us figure 10 . single pulse maximum power dissipation. 0.0001 0.001 0.01 0.1 1 10 100 300 0.01 0.02 0.03 0.05 0.1 0.2 0.3 0.5 1 t , time (sec) transient thermal resistance 1 single pulse d = 0.5 0.1 0.05 0.02 0.01 0.2 duty cycle, d = t / t 1 2 r (t) = r(t) * r r = 135c/w q ja q ja q ja t - t = p * r (t) q ja a j p(pk) t 1 t 2 r(t), normalized effective figure 11 . transient thermal response curve . thermal characterization performed using the conditions described in note 1c . transient thermal response will change depending on the circuit board design. 0.1 0.3 1 3 10 15 30 200 500 1000 2000 4000 -v , drain to source voltage (v) capacitance (pf) ds c iss f = 1 mhz v = 0 v gs c oss c rss figure 8 . capacitance characteristics . 0.0001 0.001 0.01 0.1 1 10 100 300 0 10 20 30 40 50 single pulse time (sec) power (w) single pulse r = 135c/w t = 25c q ja a
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