avago technologies - 1 - description the acpm-9420 is a fully matched 10-pin surface mount power amplifier module developed for lte band 20. the 2 mm 2.5 mm form-factor package is self contained, and it incorporates 50-ohm input and output matching networks. the acpm-9420 features coolpam circuit technology that supports two power modeslow and high. the coolpam is a stage bypass technology that enhances pae (power added efficiency) at low power range. the power amplifier is manufact ured on an advanced ingap hbt (hetero-junction bipolar transistor) mmic (microwave monolithic integrated circuit) technology that offers state-of-the-art reliability, temperature stability, and ruggedness. features ? thin package (0.93 mm typical) ? excellent linearity in envelope tracking mode ? mipi rffe interface ? two-mode power ? quiescent current control for high power mode and low power mode ? ten-pin surface mounting package ? internal 50-ohm matching networks for both rf input and output ? separate drive and output vcc supplies ? low bypass capacitance ? green C lead-free and rohs compliant applications ? band 20 lte ordering information part number number of devices container ACPM-9420-TR2 1,000 178 mm (7 in.) tape/reel ACPM-9420-TR2 lte band 20 mipi et pa 2.0 mm 2.5 mm power amplifier module product brief
avago technologies - 2 - ACPM-9420-TR2 product brief package dimensions package dimensions the dimensions are in millimeters. marking specification ? ? 1 j o . b s l ? % o % b u f $ p e f ; ; o " t t f n c m z - p u * e f o u j g j d b u j p o o % f w j d f $ p e f ; ' = = 1 1 1 1 1 j o . b s l
for product information and a complete list of distributors, please go to our web site: www.avagotech.com avago, avago technologies, and the a logo are trademarks of avago technologies in the united states and other countries. all other brand and product names may be trademarks of their respective companies. data subject to change. copyright ? 2015 avago technologies. all rights reserved. av02-4862en C 2015-03-24 pin description pin # name description 1 vcc1 dc supply voltage, connect to the rf stages' collector to which apt/et is applied (0.5v~3.5v) 2 rfin rf input 3 vbat dc supply voltage, connect to the bias ci rcuitry with a fixed voltage (higher than 3.0v) 4 vio rffe enable 5 sdta rffe data 6 sclk rffe clock 7gnd ground 8 nc no connection 9 rfout rf output 10 vcc2 dc supply voltage, connect to the rf stages' collector to which apt/et is applied (0.5v~3.5v)
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