downloaded from datasheetlib.com - datasheet search engine connectors 04/16/10 specifications and applications information page 1 of 4. the erg smart force series smart force series smart force series smart force series smart force series of led drivers are specifically designed for applications which require wide dimming and lcd brightness stability over a wide input voltage range. the SFDEB3952F is designed to provide backlight power for the sharp lq121s1lg62 display. designed, manufactured and supported within the usa, the sfde features: 9 8 mm or less in height 9 wide input voltage range 9 constant led current 9 external dimming 9 high dimming ratio 9 soft start 9 one year warranty j1-1 vin(+) j1-2 vin(+) j1-3 gnd j1-4 gnd j1-5 enable output connector * molex 53261-1271 smar smar smar smar smar t f t f t f t f t f or or or or or ce led ce led ce led ce led ce led driver driver driver driver driver input connector molex 53261-0571 package configuration pcb components are shown for reference only. actual product may differ from that shown. mass: 13 grams SFDEB3952F j2-1 cathode 3 j2-7 (do not use) j2-2 anode 3 j2-8 (do not use) j2-3 (do not use) j2-9 cathode 1 j2-4 (do not use) j2-10 anode 1 j2-5 cathode 2 j2-11 (do not use) j2-6 anode 2 j2-12 (do not use) * requires harness erg part number h12406xxx recommended 1 output .125 [3,18] dia. (2x) 2.105 [53,47] .910 [23,11] .135 [3,43] input 1.11 [28,19] 3.150 [80,01] .830 [21,08] 1
downloaded from datasheetlib.com - datasheet search engine page 2 of 4. note 1 surface temperature must not exceed 80 c. sot89 package to be at or below 110 c. note 2 peak inrush occurs over a 1 to 3 ms time period, during initial startup. note 3 the input voltage to the driver must be within its operating characteristic before the driver is enabled, otherwise the driver may not start or may shut down unexpectedly. note 4 input impedance is 5.0 kohms to gnd. specifications subject to change without notice. SFDEB3952F s g n i t a r m u m i x a m e t u l o s b a g n i t a rl o b m y se u l a vs t i n u e g n a r e g a t l o v t u p n i v n i 0 . 0 2 + o t 3 . 0 -c d v e r u t a r e p m e t e g a r o t s t g t s 5 8 + o t 0 4 - o c e g a t l o v t u p n i e l b a n e v e l b a n e n i v o t 0c d v s c i t s i r e t c a r a h c g n i t a r e p o 5 2 = a t d n a c d s t l o v 0 0 . 2 1 = n i v d e t o n e s i w r e h t o s s e l n u o . c c i t s i r e t c a r a h cl o b m y sn i mp y tx a ms t i n u e g a t l o v t u p n i v n i 0 . 0 1 +0 . 2 1 +0 . 8 1 +c d v e c a f r u s t n e n o p m o c e r u t a r e p m e t ) 1 e t o n ( t s 0 4 --0 8 + o c t n e r r u c t u p n i i n i 1 4 . 08 4 . 05 5 . 0c d a t n e r r u c h s u r n i k a e p ) 2 e t o n ( i k a e p -5 . 1- c d a e g a t l o v g n i r t s d e lv d e l 9 . 9 11 . 2 26 . 5 2c d v y c n e i c i f f e h h h h h -9 6-% ) g n i r t s r e p ( t n e r r u c t u p t u oi t u o 7 50 63 6c d a m n i p e l b a n e ) 3 e t o n ( d l o h s e r h t n o - n r u t v n o h t -- 0 . 2c d v d l o h s e r h t f f o - n r u t v f f o h t 8 . 0-- c d v e c n a d e p m i t u p n i e l b a n e ) 4 e t o n ( r e l b a n e -5- s m h o k
downloaded from datasheetlib.com - datasheet search engine page 3 of 4. application information the erg SFDEB3952F has been designed to be configured in multiple ways: no dimming ? operation: the sfd driver can be configured to operate without dimming by pulling up the enable pin (j1-5). ? pins 1 and 2 of connector j1 must be connected to +vin, between 10 and 18 vdc. pins 3 and 4 of connector j1 must be connected to gnd. external pwm dimming ? operation: external pwm configuration as shown in figure 1 allows the user to control display brightness with an externally generated pwm signal. the user is responsible to provide the pwm signal. a dimming ratio up to 5000:1 at 200 hz is possible with this configuration. ? dimming: dimming is accomplished by applying a pwm signal to the enable pin (j1-5). pwm on and off levels are specified in the operating characteristics section of the data sheet. display brightness is modulated by controlling the pwm duty cycle as shown in graph 1. ? pins 1 and 2 of connector j1 must be connected to +vin, between 10 and 18 vdc. pins 3 and 4 of connector j1 must be connected to gnd. SFDEB3952F
downloaded from datasheetlib.com - datasheet search engine page 4 of 4. graph 1 figure 1 enable cathode 1 j2 +12v gnd vin anode 1 1,2 3,4 5 5v 0v duty cycle 0% - 100% external pwm dimming u l ? r e g i s t e r e d f i r m r e g i s t e r e d f i r m e n d i c o t t r e s e a r c h g r o u p , i n c . i s o 9 0 0 1 a 3 3 1 3 endicott research group, inc. (erg) reserves the right to make changes in circuit design and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnished by erg is believed to be accurate and reliable. however, no responsibility is assumed by erg for its use. j1 SFDEB3952F cathode 2 anode 2 cathode 3 anode 3
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