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ltc4070 1 4070fc typical a pplica t ion descrip t ion li-ion/polymer shunt battery charger system the ltc ? 4070 allows simple charging of li-ion/polymer batteries from very low current, intermittent or continuous charging sources. the 450na to 50ma operating cur - rent makes charging possible from previously unusable sources. with the addition of an external pass device, shunt current may be boosted to 500ma. stacked cell high voltage battery packs are inherently balanced with shunt charging. with its low operating current, the ltc4070 is well suited to charge thin film batteries in energy harvesting applications where charging sources may be intermittent or very low power. the unique architecture of the ltc4070 allows for an extremely simple battery charger solution; requiring just one external resistor. the ltc4070 offers a pin selectable float voltage with 1% accuracy across the full range of operating temperature and shunt current. the integrated thermal battery quali - fier extends battery lifetime and improves reliability by automatically reducing the battery float voltage at ntc thermistor temperatures above 40c. the ltc4070 also provides both low and high battery status outputs. for applications requiring pack protection, see ltc4071. the device is offered in two thermally enhanced packages, a compact low profile (0.75mm) 8-lead (2mm 3mm) dfn and an 8-lead msop package. fea t ures a pplica t ions n low operating current (450na) n 1% float voltage accuracy over full t emperature and shunt current range n 50ma maximum internal shunt current (500ma with external pfet) n pin selectable float voltage options: 4.0v , 4.1v, 4.2v n ultralow power pulsed ntc float conditioning for li-ion/polymer protection n suitable for intermittent, continuous and ver y low power charging sources n low and high battery status outputs n simple low voltage load disconnect application n thermally enhanced, low profile (0.75mm) 8-lead (2mm 3mm) dfn and msop packages n low power li-ion/polymer battery back-up n solar power systems with back-up n memory back-up n embedded automotive n thin film batteries n energy scavenging/harvesting l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks and thinsot is a trademark of linear technology corporation. all other trademarks are the property of their respective owners.. ntc overtemperature battery float voltage qualifying simple shunt charger with load disconnect and ntc conditioning temperature (c) v f (v) 4.3 4.2 4.0 4.1 3.9 3.8 3.7 4020 0 60 4070 ta01b 80 100 adj = v cc adj = float adj = gnd 4070 ta01a ltc4070 adj r in gnd t 10k li-ion ntcbias lbo ntc v cc v in + nths0805n02n1002f q1:fdr8508
ltc4070 2 4070fc a bsolu t e maxi m u m r a t ings i cc ....................................................................... 6 0ma adj, ntc, ntcbias, drv, lbo, hbo voltages ........................................... C 0.3v to v cc + 0.3v operating junction temperature range .. C 40c to 125c (notes 1, 2) top view 9 ddb package 8-lead (3mm 2mm) plastic dfn 5 6 7 8 4 3 2 1ntcbias ntc adj hbo v cc drv lbo gnd t jmax = 125c, q ja = 76c/w exposed pad (pin 9) is not internally connected, must be soldered to pcb, gnd to obtain q ja 1 2 3 4 ntcbias ntc adj hbo 8 7 6 5 v cc drv lbo gnd top view 9 ms8e package 8-lead plastic msop t jmax = 125c, q ja = 40c/w exposed pad (pin 9) is not internally connected, must be soldered to pcb, gnd to obtain q ja p in c on f igura t ion o r d er i n f or m a t ion lead free finish tape and reel part marking* package description temperature range ltc4070eddb#pbf ltc4070eddb#trpbf lfpd 8-lead (3mm 2mm) plastic dfn C40c to 125c ltc4070iddb#pbf ltc4070iddb#trpbf lfpd 8-lead (3mm 2mm) plastic dfn C40c to 125c ltc4070ems8e#pbf ltc4070ems8e#trpbf ltfmt 8-lead plastic msop C40c to 125c ltc4070ims8e#pbf ltc4070ims8e#trpbf ltfmt 8-lead plastic msop C40c to 125c consult ltc marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container. consult ltc marketing for information on non-standard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ maximum junction temperature ......................... 125 c storage temperature range .................. C 65c to 150c peak reflow temperature ..................................... 26 0c symbol parameter conditions min typ max units v float programmable float voltage 10a i cc 50ma v adj = 0v v adj = float v adj = v cc l l l 3.96 4.06 4.16 4.0 4.1 4.2 4.04 4.14 4.24 v v v i ccmax maximum shunt current v cc > v float l 50 ma i ccq v cc operating current v hbo low l 450 1040 na i ccqlb low bat v cc operating current v cc = 3.1v 300 na e lec t rical c harac t eris t ics the l denotes the specifications which apply over the full operating junction temperature range. v ntc = v cc , t a = 25c unless otherwise specified. current into a pin is positive and current out of a pin is negative. all voltages are referenced to gnd unless otherwise noted. (note 2)
ltc4070 3 4070fc e lec t rical c harac t eris t ics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the ltc4070 is tested under pulsed load conditions such that t j t a . the ltc4070e is guaranteed to meet performance specifications for junction temperatures from 0c to 85c. specifications over the C40c to 125c operating junction temperature range are assured by design, characterization and correlation with statistical process controls. the l denotes the specifications which apply over the full operating junction temperature range. v ntc = v cc , t a = 25c unless otherwise specified. current into a pin is positive and current out of a pin is negative. all voltages are referenced to gnd unless otherwise noted. (note 2) the ltc4070i is guaranteed over the full C40c to 125c operating junction temperature range. note that the maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors. note 3: the i drv(snk) current is tested by pulling the drv pin up to v cc through a 475k resistor, r drv . pulling the drv pin up to v cc with low impedance disables the regulator. symbol parameter conditions min typ max units high battery status v hbth hbo threshold (v float C v cc ) v cc rising l 15 40 60 mv v hbhy hysteresis 100 mv low battery status v lbth lbo threshold v cc falling l 3.08 3.2 3.34 v v lbhy hysteresis 220 290 350 mv status outputs hbo/lbo v ol cmos output low i sink = 1ma, v cc = 3.7v l 0.5 v v oh cmos output high v lbo : v cc = 3.1v, i source = C100a v hbo : i cc = 1.5ma, i source = C500a l v cc C 0.6 v 3-state selection input: adj v adj adj input level input logic low level l 0.3 v input logic high level l v cc C 0.3 v i adj(z) allowable adj leakage current in floating state l 3 a ntc i ntc ntc leakage current 0v< ntc < v cc C50 0 50 na i ntcbias average ntcbias sink current pulsed duty cycle < 0.002% 30 pa ?v float(ntc) delta float voltage per ntc comparator step i cc = 1ma, ntc falling below one of the ntc th thresholds adj = 0v adj = float adj = v cc C50 C75 C100 mv mv mv ntc th1 ntc comparator falling thresholds v ntc as % of v ntcbias amplitude 35.5 36.5 37.5 % ntc th2 28.0 29.0 30.0 % ntc th3 21.8 22.8 23.8 % ntc th4 16.8 17.8 18.8 % ntc hy hysteresis 30 mv drive output i drv(source) drv output source current v cc = 3.1v, v drv = 0v C1 ma i drv(sink) drv output sink current i cc = 1ma, r drv = 475k (note 3) 3 a
ltc4070 4 4070fc typical p er f or m ance c harac t eris t ics i ccq vs temperature (adj = v cc ) v hbth v cc rising vs temperature (adj = v cc ) v float vs temperature, i cc = 1ma v float vs ntc temperature, i cc = 1ma v lbth v cc falling vs temperature v lbhy vs temperature battery discharge i cc vs v cc load regulation dv float vs i cc t a = 25c, unless otherwise noted. v hbhy vs temperature (adj = v cc ) v cc (v) i cc (na) 1000 900 700 800 600 500 400 300 200 100 0 1 0 2 4070 g01 3 4 falling adj = gnd rising i cc (ma) ?v float (mv) 10 9 7 8 6 5 4 3 2 1 0 10 0 20 30 4070 g02 40 50 60 temperature (c) v float (v) 4.30 4.25 4.15 4.20 4.10 4.05 4.00 3.95 3.90 ?25 ?50 25 50 0 4070 g03 75 100 125 adj = v cc adj = float adj = gnd no ntc temperature (c) i ccq (na) 1000 900 700 800 600 500 400 300 200 100 0 ?25 ?50 25 50 0 4070 g04 75 100 125 temperature (c) v hbth (mv) 100 90 70 80 60 50 40 30 20 10 0 ?25 ?50 25 50 0 4070 g05 75 100 125 temperature (c) v hbhy (mv) 300 250 150 200 100 50 0 ?25 ?50 25 50 0 4070 g06 75 100 125 temperature (c) v float (v) 4.3 4.2 4.0 4.1 3.9 3.8 3.7 4020 0 60 4070 g07 80 100 adj = v cc adj = float adj = gnd temperature (c) v lbth (v) 3.250 3.245 3.235 3.240 3.225 3.230 3.210 3.205 3.220 3.215 3.200 ?25 ?50 25 50 0 4070 g08 75 100 125 adj = float adj = gnd adj = v cc temperature (c) v lbhy (v) 320 300 240 220 280 260 200 ?25 ?50 25 50 0 4070 g09 75 100 125 adj = float adj = gnd adj = v cc
ltc4070 5 4070fc typical p er f or m ance c harac t eris t ics hot plug transient, c c = 330f, r in = 81 step response with 800mahr battery, r in = 81 v oh lbo/hbo vs i source v ol lbo/hbo vs i sink power spectral density t a = 25c, unless otherwise noted. i source (ma) v cc ? v oh (v) 2.5 1.5 2.0 1.0 0.5 0 1.5 0.5 1.0 0 2.0 4070 g10 2.5 3.0 lbo v cc = 3.1v hbo v cc = v f ? 25m i sink (ma) v ol (v) 2.5 1.5 2.0 1.0 0.5 0 42 0 6 4070 g11 8 10 v cc = 3.7v 4ms/div 4070 g13 ch1 = v in (2v/div) ch2 = v cc (2v/div) ch3 = v hbo (2v/div) ch4 = i in (10ma/div) 400ns/div ch1 = v in (2v/div) ch2 = v cc (2v/div) ch3 = v hbo (2v/div) ch4 = i in (10ma/div) 4070 g14 frequency (hz) psd (v rms /hz) 35 25 30 20 15 10 5 0 101 100 0 1000 10000 4070 g12 100000 c c = 10f, i cc = 1ma, 1hz res bandwidth, noise = 1.0452mv rms from 10hz to 100khz p in func t ions ntcbias (pin 1): ntc bias pin. connect a resistor from ntcbias to ntc, and a thermistor from ntc to gnd. float ntcbias when not in use. minimize parasitic capacitance on this pin. ntc (pin 2): input to the negative temperature coefficient thermistor monitoring circuit. the ntc pin connects to a negative temperature coefficient thermistor which is typically co-packaged with the battery to determine the temperature of the battery. if the battery temperature is too high, the float voltage is reduced. connect a low drift bias resistor from ntcbias to ntc and a thermistor from ntc to gnd. when not in use, connect ntc to v cc . minimize parasitic capacitance on this pin. adj (pin 3): float voltage adjust pin. connect adj to gnd to program 4.0v float voltage. disconnect adj to program 4.1v float voltage. connect adj to v cc to program 4.2v float voltage. the float voltage is also adjusted by the ntc thermistor.
ltc4070 6 4070fc b lock diagra m p in func t ions 4070 bd 3-state detect osc clk adj 1.5s pulsed duty cycle < 0.002% 30s ntcbias ntc r nom 10k t ? + ? + ref ? + ea gnd drv hbo lbo v cc adc ltc4070 hbo (pin 4): high battery monitor output (active high). hbo is a cmos output that indicates that the battery is almost fully charged and current is being shunted away from bat. this pin is driven high when v cc rises to within v hbth of the effective float voltage. the absolute value of this threshold depends on adj and ntc, both of which affect the float voltage. hbo is driven low when v cc falls by more than (v hbth + v hbhy ) below the float voltage. refer to table 1 for the effective float voltage. gnd (pin 5, exposed pad pin 9): ground. the exposed package pad must be connected to pcb ground for rated thermal performance. lbo (pin 6): low battery monitor output (active high). lbo is a cmos output that indicates when the battery is discharged below 3.2v or rises above 3.5v. this pin is driven high if v cc < v lbth , and is driven low if v cc > (v lbth + v lbhy ). drv (pin 7): external drive output. connect to the gate of an external pfet to increase shunt current for applications which require more than 50ma charge current. minimize capacitance and leakage current on this pin. when not in use, float drv. v cc (pin 8): input supply pin. the input supply voltage is regulated to 4.0v, 4.1v, or 4.2v depending on the adj pin state (see the adj pin description for more detail). this pin can sink up to 50ma in order to keep the voltage regulation within accuracy limits. when no battery is present, decouple to gnd with a capacitor, c in , of at least 0.1f.
ltc4070 7 4070fc o pera t ion the ltc4070 provides a simple, reliable, and high performance battery protection and charging solution by preventing the battery voltage from exceeding a programmed level. its shunt architecture requires just one resistor between the input supply and the battery to handle a wide range of battery applications. when the input supply is removed and the battery voltage is below the high battery output threshold, the ltc4070 consumes just 450na from the battery. while the battery voltage is below the programmed float voltage, the charge rate is determined by the input voltage, the battery voltage, and the input resistor: i chg = v in ? v bat ( ) r in as the battery voltage approaches the float voltage, the ltc4070 shunts current away from the battery thereby reducing the charge current. the ltc4070 can shunt up to 50ma with float voltage accuracy of 1% over temperature. the shunt current limits the maximum charge current, but the 50ma internal capability can be increased by adding an external p-channel mosfet. adjustable float voltage, v float a built-in 3-state decoder connected to the adj pin provides three programmable float voltages: 4.0v, 4.1v, or 4.2v. the float voltage is programmed to 4.0v when adj is tied to gnd, 4.1v when adj is floating, and 4.2v when adj is tied to v cc . the state of the adj pin is sampled about once every 1.5 seconds. when it is being sampled, the ltc4070 applies a relatively low impedance voltage at the adj pin. this technique prevents low level board leakage from corrupting the programmed float voltage. ntc qualified float voltage, dv float(ntc) the ntc pin voltage is compared against an internal resistor divider tied to the ntcbias pin. this divider has tap points that are matched to the ntc thermistor resistance/temperature conversion table for a vishay thermistor with a b 25/85 value of 3490 at temperatures of 40c, 50c, 60c, and 70c. battery temperature conditioning adjusts the float volt - age down to v float_eff when the ntc thermistor indi- cates that the battery temperature is too high. for a 10k thermistor with a b 25/85 value of 3490 such as the vishay nths0402n02n1002f, and a 10k ntcbias resistor, each 10c increase in temperature above 40c causes the float voltage to drop by a fixed amount, dv float(ntc) , depend- ing on adj. if adj is at gnd, the float voltage steps down by 50mv for each 10c temperature increment. if adj is floating, the step size is 75mv. and if adj is at v cc , the step size is 100mv. refer to table 1 for the range of v float_eff programming. table 1. ntc qualified float voltage adj d v float(ntc ) temperature v ntc as % of ntcbias v float_ eff gnd 50mv t < 40c 40c t < 50c 50c t < 60c 60c t < 70c 70c < t v ntc > 36.5% 29.0% < v ntc 36.5% 22.8% < v ntc 29.0% 17.8% < v ntc 22.8% v ntc 17.8% 4.000v 3.950v 3.900v 3.850v 3.800v float 75mv t < 40c 40c t < 50c 50c t < 60c 60c t < 70c 70c t v ntc > 36.5% 29.0% < v ntc 36.5% 22.8% < v ntc 29.0% 17.8% < v ntc 22.8% v ntc 17.8% 4.100v 4.025v 3.950v 3.875v 3.800v v cc 100mv t < 40c 40c t < 50c 50c t < 60c 60c t < 70c 70c t v ntc > 36.5% 29.0% < v ntc 36.5% 22.8%< v ntc 29.0% 17.8% < v ntc 22.8% v ntc 17.8% 4.200v 4.100v 4.000v 3.900v 3.800v for all adj pin settings the lowest float voltage setting is 3.8v = v float C 4 ? dv float(ntc) = v float_min . this occurs at ntc thermistor temperatures above 70c, or if the ntc pin is grounded. to conserve power in the ntcbias and ntc resistors, the ntcbias pin is sampled at a low duty cycle at the same time that the adj pin state is sampled. high battery status output: hbo the hbo pin pulls high when v cc rises to within v hbth of the programmed float voltage, v float_eff , including ntc qualified float voltage adjustments. if v cc drops below the float voltage by more than v hbth + v hbhy the hbo pin pulls low to indicate that the battery is not at full charge. the input supply current of the ltc4070 drops to less than 450na (typ) as the ltc4070 no longer shunts current to protect the battery. the ntcbias sample clock slows to conserve power, and the drv pin is pulled up to v cc .
ltc4070 8 4070fc o pera t ion for example, if the ntc thermistor requires the float voltage to be dropped by 100mv (adj = v cc and 0.29 ? v ntcbias < v ntc < 0.36 ? v ntcbias ) then the hbo rising threshold is detected when v cc rises past v float C dv float(ntc) C v hbth = 4.2v C 100mv C 40mv = 4.06v. the hbo falling threshold in this case is detected when v cc falls below v float C dv float(ntc) C v hbth C v hbhy = 4.2v C 100mv C 40mv C 100mv = 3.96v. low battery status output: lbo when the battery voltage drops below 3.2v, the lbo pin pulls high. otherwise, the lbo pin pulls low when the battery voltage exceeds about 3.5v. while the low battery condition persists, ntc and adj pins are no longer sampledthe functions are disabledand total supply consumption for the ltc4070 drops to less than 300na (typ). general charging considerations the ltc4070 uses a different charging methodology from previous chargers. most li-ion chargers terminate the charging after a period of time. the ltc4070 does not have a discrete charge termination. extensive measurements on li-ion cells show that the cell charge current drops to nanoamps with the shunt charge control circuit effectively terminating the charge. for long cell life, operate the charger at 100mv lower charge voltage normally used. the simplest application of the ltc4070 is shown in figure 1. this application requires only an external resis - tor to program the charge/shunt current. assume the wall adapter voltage (v wall ) is 12v and the minimum battery voltage (v bat_min ) is 3v, then the maximum charge cur - rent is calculated as: i max _ charge = v wall ? v bat _ min ( ) r in = 12v ? 3v ( ) 162 = 55.5ma care must be taken in selecting the input resistor. power dissipated in r in under full charge current is given by the following equation: p diss = v wall ? v bat _ min ( ) 2 r in = 12v ? 3v ( ) 2 162 = 0.5w the charge current decreases as the battery voltage increases. if the rising battery voltage is 40mv less than the programmed float voltage, the ltc4070 consumes only 450na of current, and all of the input current flows into the battery. as the battery voltage reaches the float voltage, the ltc4070 shunts current from the wall adapter and regulates the battery voltage to v float . the more shunt current the ltc4070 sinks, the less charge current the battery gets. eventually, the ltc4070 shunts all the current from the battery; up to the maximum shunt current. the maximum shunt current in this case, with no ntc adjustment, is determined by the input resistor and is calculated as: i shunt _ max = v wall ? v float ( ) r in = 12v ? 4.1v ( ) 162 = 49ma at this point the power dissipated in the input resistor is 388mw. figure 1. single-cell battery charger 4070 f01 ltc4070 adj r in 162 0.5w gnd 12v wall adapter li-ion battery ntcbias float if not needed float ntc v cc + a pplica t ions i n f or m a t ion
ltc4070 9 4070fc a pplica t ions i n f or m a t ion figure 3. 2-cell battery charger figure 4. 2-cell battery charger with boosted drive ltc4070 adj r in gnd wall adapter float if not needed float float if not needed float li-ion battery ntcbias ntc v cc v cc1 + 4070 f03 ltc4070 adj gnd li-ion battery ntcbias ntc v cc v cc2 + ltc4070 adj r in gnd wall adapter float if not needed float float if not needed float li-ion battery ntcbias drv q1 ntc v cc v cc1 v cc2 + 4070 f04 ltc4070 adj gnd li-ion battery ntcbias q1, q2: si3469dv drv q2 ntc v cc + figure 2. single-cell charger with boosted drive 4070 f02 ltc4070 adj q1: fdn352ap r in 110 4w gnd 24v wall adapter li-ion battery ntcbias drv q1 ntc v cc + float if not needed figure 2 shows a charge circuit that can boost the charge current as well as the shunt current with an external p-channel mosfet, q1. in this case, if the wall adapter voltage (v wall ) is 24v and the minimum battery voltage (v bat ) is 3v, then the initial charge current is set to 191ma by selecting r in = 110?. note that this resistor dissipates over 4w of power, so select the resistor taking power rating into account. when the battery voltage reaches the float voltage, the ltc4070 and the external p-channel mosfet begin to shunt current from the wall adapter. eventually, the ltc4070 and the external p-channel mosfet shunts all available current (182ma) and no current flows to the battery. take the full shunt current and power into account when selecting the external mosfet. the ltc4070 can also be used to regulate series-connected battery stacks as illustrated in figures 3 and 4. here two ltc4070 devices are used to charge two batteries in series; with or without boosted drive. a single resistor sets the maximum charge/shunt current. the gnd pin of the top device is simply connected to the v cc pin of the bottom device. care must be taken in observing the status output pins of the top device as these signals are not ground ref- erenced. also, the wall adapter must have a high enough voltage rating to charge both cells. ntc protection the ltc4070 measures battery temperature with a negative temperature coefficient thermistor thermally coupled to the battery. ntc thermistors have temperature characteristics which are specified in resistance-temperature conversion tables. internal ntc circuitry protects the battery from excessive heat by reducing the float voltage for each 10c rise in temperature above 40c (assuming a vishay thermistor with a b 25/85 value of 3490). the ltc4070 uses a ratio of resistor values to measure battery temperature. the ltc4070 contains an internal fixed resistor voltage divider from ntcbias to gnd with four tap points; ntc th1 -ntc th4 . the voltages at these tap points are periodically compared against the voltage at the ntc pin to measure battery temperature. to conserve power, the battery temperature is measured periodically by biasing the ntcbias pin to v cc about once every 1.5 seconds.
ltc4070 10 4070fc a pplica t ions i n f or m a t ion the voltage at the ntc pin depends on the ratio of the ntc thermistor value, r ntc , and a bias resistor, r nom . choose r nom equal to the value of the thermistor at 25c. r nom is 10k for a vishay nths0402n02n1002f thermistor with a b 25/85 value of 3490. r nom must be connected from ntcbias to ntc. the ratio of the ntc pin voltage to the ntcbias voltage is: r ntc r ntc + r nom ( ) when the thermistor temperature rises, the resistance drops; and the resistor divider between r nom and the thermistor lowers the voltage at the ntc pin. an ntc thermistor with higher b 25/85 values may also be used with the ltc4070. however the temperature trip points are shifted due to the higher negative temperature coefficient of the thermistor. to correct for this difference add a resistor, r fix , in series with the higher b 25/85 value thermistor to shift the ratio, r fix + r ntc r fix + r ntc + r nom ( ) up to the internal resistive divider tap points: ntc th1 through ntc th4 . for a 100k thermistor with a b 25/85 value of 3950 nths0402n01n1003f, at 70c (with r nom = 100k) choose r fix = 3.92k?. the temperature trip points are found by looking up the thermistor r/t values plus r fix that correspond to the ratios for ntc th1 = 36.5%, ntc th2 = 29.0%, ntc th3 = 22.8%, and ntc th4 = 17.8%. selecting r fix = 3.92k results in trip points of 39.9c, 49.4c, 59.2c and 69.6c. another technique may be used without adding an additional component. instead decrease r nom to adjust the ntc th thresholds for a given r/t thermistor profile. for example, if r nom = 88.7k (with the same 100k thermistor) then the temperature trip points are 41.0c, 49.8c, 58.5c, and 67.3c. when using the ntc features of the ltc4070 it is important to keep in mind that the maximum shunt current increases as the float voltage, v float_eff drops with ntc conditioning. reviewing the typical application with a 12v wall adapter in figure 1; the input resistor, r in , should be increased to 165 such that the maximum shunt current does not exceed 50ma at the lowest possible float voltage due to ntc conditioning, v float_min = 3.8v. thermal considerations at maximum shunt current, the ltc4070 may dissipate up to 205mw. the thermal dissipation of the package should be taken into account when operating at maximum shunt current so as not to exceed the absolute maximum junc- tion temperature of the device. with q ja of 40c/w, in the msop package, at maximum shunt current of 50ma the junction temperature rise is about 8c above ambient. with q ja of 76c/w in the dfn package, at maximum shunt current of 50ma the junction temperature rise is about 16c above ambient. operation with an external pfet to boost shunt current table 2 lists recommended devices to increase the maximum shunt current. due to the requirement for low capacitance on the drv pin node, it is recommended that only low gate charge and high threshold pfet devices be used. also it is recommended that careful pcb layout be used to keep leakage at the drv pin to a minimum as the i drv(sink) current is typically 3a. refer to device manufacturers data sheets for maximum continuous power dissipation and thermal resistance when selecting an external pfet for a particular application. table 2. recommended external shunt pfets device vendor q gs v th(min) r ds(on) fdn352ap fairchild 0.50nc C0.8v 0.33 si3467dv vishay 1.7nc C1.0v 0.073 si3469dv vishay 3.8nc C1.0v 0.041 dmp2130ldm diodes inc. 2.0nc C0.6v 0.094 dmp3015lss diodes inc. 7.2nc C1.0v 0.014
ltc4070 11 4070fc t ypical a pplica t ions the ltc4070 can be used to charge a battery to a 4.2v float voltage from an ac line with a bridge rectifier as shown in the simple schematic in figure 5. in this example, the four input 249k resistors are sized for acceptable ul leakage in the event that one of the resistors short. here, the ltc4070 will fully charge the battery from the ac line while meeting the ul specification with only 104a of available charge current. a photovoltaic (pv) application for the ltc4070 is illus - trated in figure 6. in this application, transistor q1 has been added to further reduce the already low quiescent current of the ltc4070 to achieve extremely low battery discharge when the pv cells are not charging the battery. in long battery life applications, q1 isolates the battery from the ltc4070 when q1s base voltage falls. under normal operation, the pv cells provide current through the v be and v bc diodes of q1. while the battery is charging, the majority of pv current flows to the battery. when v cc reaches the programmed float voltage, in this case 4.1v with adj floating, then the ltc4070 shunts base-collector junction current from q1, effectively reducing the battery charging current to zero and saturating q1. in the event that the thermistor temperature rises and the float voltage drops, the ltc4070 shunts more current, and q1 is forced to operate in reverse active mode until the battery voltage falls. once equilibrium is achieved, the difference between v bat and v cc should be less than a few mv, depending on the magnitude of the shunt current. add a series input resistor, r in , to limit the current from high current solar cells. solar cells are limited in current normally, so for small cells no resistor is needed. with high current pv cells, select r in taking into account the pv cells open-circuit voltage and short-circuit current, the temperature coefficient of the v bc and v be diodes and the maximum collector current and operating junction temperature of q1. using an isolating transistor reduces discharge current to a few nanoamps, and may be extended to other applications as well. the pv application schematic in figure 6 also illustrates using the ltc4070 with a 10k, 5% curve 2 type ntc thermistor, nths0402n02n1002f. here r nom is 10k, and the rising temperature trip points are 40c, 50c, 60c and 70c. figure 6. photovoltaic charger with extremely low leakage when not charging figure 5. 4.2v ac line charging, ul leakage okay float if not needed 4070 f05 ltc4070 ac 110 danger! high voltage! gnd ntcbias mb4s ntc li-ion battery v cc r3 249k r1 249k adj + r4 249k r2 249k ? + dangerous and lethal potentials are present in ac line-connected circuits! before proceeding any further, the reader is warned that caution must be used in the construction, testing and use of ac line-connected circuits. extreme caution must be used in working with and making connections to these circuits. all testing performed on an ac line-connected circuit must be done with an isolation transformer connected between the ac line and the circuit. users and constructors of ac line-connected circuits must observe this precaution when connecting test equipment to the circuit to avoid electric shock. 4070 f06 ltc4070 adj r ntc : nths0402n02n1002f 10k gnd float q1 mp5650 t r nom 10k li-ion ntcbias ntc v cc v bat or 2n3904 c in 0.1f + + ? + ?
ltc4070 12 4070fc t ypical a pplica t ions the ltc4070 status pins have sufficient drive strength to use with an led, for a visual indication of charging status. consider the application in figure 7, where red led d1 is connected to the lbo pin and turns off when the battery voltage is below v lbth . note that led d1 discharges the battery until v cc falls below v lbth . green led d2, connected to the hbo pin turns on while the battery is charging. when the battery voltage rises to within v hbth of the float voltage including ntc qualification, v float_eff , d2 turns off to indicate that the battery is no longer charging. optionally, a low leakage diode d3 is placed between the cathode of d2 and the battery. this diode stops d2 from discharging the battery when the input supply is not present. in this application, r in = 205?, is sized for a maximum shunt current of 50ma that occurs at the maximum input voltage of 15v and the minimum ntc qualified float voltage figure 7. single cell charger with led status and ntc qualified float voltage of 3.8v, assuming the voltage drop on diode d3 is 1.1v. without the optional d3, r in increases to 226?. figure 8 illustrates an application to replace three nimh cells with a single li-ion cell. this simple application replaces the nimh charging solution without the need for a charge termination or cell balancing scheme. nimh charging can be done without termination, but that algorithm limits the charge rate to c/10. the ltc4070 application allows the li-ion battery to be charged faster without concern of over-charging. figure 9, 12v wall adapter charging with 205ma, il - lustrates the use of an external pfet transistor to boost the maximum shunt current. if the battery voltage is 3.6v the battery receives the full charge current of about 205ma. if the battery temperature is below 40c, the float voltage rises to 4.1v (adj = floating) then q1 and the ltc4070 shunts 192ma away from the battery. if the battery temperature rises, the shunt current increases to regulate the float voltage 75mv lower per 10c rise in battery temperature, as described in table 1. at a maximum shunt current of 200ma the minimum float voltage is held at 3.8v when the battery temperature is above 70c. this example illustrates an alternative use of a led, d1, to observe the hbo status pin. this led turns on to provide a visual indication that the battery is fully charged, and shunts about 1.5ma when the battery rises to within 40mv of the desired float voltage. led d1 discharges the battery, when no supply is present, until v cc falls by more than v hbth + v hbhy below the float voltage. when using an led with the hbo pin in this configuration, it is important to limit the led current with a resistor, r led as shown. otherwise the step in current through r in that occurs when the led turns on may pull v cc below the hbo hysteresis. to prevent that situation, the ratio of r in to r led should be selected to meet the following relation: r in r led v cc ? v led ( ) < v hbhy ? 50mv where v led is the forward voltage drop of the led and a margin of 50mv is subtracted from the hbo hysteresis. a v led value of 1.1v is assumed for this example. refer to the led data sheet for the forward voltage drop at the applied current level. figure 8. replace three nimh with lithium 4070 f07 ltc4070 adj hbo lbo d1 ltst c190ckt optional d3 bas416 v in = 8v to 15v d2 ltst c190gkt r ntc : nths0402n02n1002f 10k gnd float t r nom 10k li-ion ntcbias ntc v cc v bat = 4.1v r led1 1k r led2 1k r in 205 1w + 4070 ta01a ltc4070 adj float lbo hbo gnd t r nom 10k li-ion ntcbias drv ntc v cc i in = 500ma + r ntc = nths0402n02n1002f 10k v bat = 4.1v q1 dmp3015lss
ltc4070 13 4070fc p ackage descrip t ion ddb package 8-lead plastic dfn (3mm 2mm) (reference ltc dwg # 05-08-1702 rev b) 2.00 0.10 (2 sides) note: 1. drawing conforms to version (wecd-1) in jedec package outline m0-229 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.40 0.10 bottom view?exposed pad 0.56 0.05 (2 sides) 0.75 0.05 r = 0.115 typ r = 0.05 typ 2.15 0.05 (2 sides) 3.00 0.10 (2 sides) 1 4 8 5 pin 1 bar top mark (see note 6) 0.200 ref 0 ? 0.05 (ddb8) dfn 0905 rev b 0.25 0.05 2.20 0.05 (2 sides) recommended solder pad pitch and dimensions 0.61 0.05 (2 sides) 1.15 0.05 0.70 0.05 2.55 0.05 package outline 0.25 0.05 0.50 bsc pin 1 r = 0.20 or 0.25 45 chamfer 0.50 bsc
ltc4070 14 4070fc p ackage descrip t ion ms8e package 8-lead plastic msop, exposed die pad (reference ltc dwg # 05-08-1662 rev e) msop (ms8e) 0908 rev e 0.53 0.152 (.021 .006) seating plane note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 0.18 (.007) 0.254 (.010) 1.10 (.043) max 0.22 ? 0.38 (.009 ? .015) typ 0.86 (.034) ref 0.65 (.0256) bsc 0 ? 6 typ detail ?a? detail ?a? gauge plane 1 2 3 4 4.90 0.152 (.193 .006) 8 8 1 bottom view of exposed pad option 7 6 5 3.00 0.102 (.118 .004) (note 3) 3.00 0.102 (.118 .004) (note 4) 0.52 (.0205) ref 1.83 0.102 (.072 .004) 2.06 0.102 (.081 .004) 5.23 (.206) min 3.20 ? 3.45 (.126 ? .136) 2.083 0.102 (.082 .004) 2.794 0.102 (.110 .004) 0.889 0.127 (.035 .005) recommended solder pad layout 0.42 0.038 (.0165 .0015) typ 0.65 (.0256) bsc 0.1016 0.0508 (.004 .002) ms8e package 8-lead plastic msop, exposed die pad (reference ltc dwg # 05-08-1662 rev e) detail ?b? detail ?b? corner tail is part of the leadframe feature. for reference only no measurement purpose 0.05 ref 0.29 ref
ltc4070 15 4070fc information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. r evision h is t ory rev date description page number a 4/10 change q1s part number on figure 6 12 b 9/10 updated description section temperature range updated in order information section updated note 2 text updated in ntc qualified float voltage, ?v float(ntc) section text updated in ntc protection section updated related parts section 1 2 3 7 9, 10 16 c 4/11 updated vishay thermistor part number. 1, 7, 10, 11, 12, 16
ltc4070 16 4070fc linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com linear technology corporation 2010 lt 0411 rev c ? printed in usa r ela t e d p ar t s typical a pplica t ion part number description comments shunt regulators lt1389 nanopower precision shunt voltage reference 800na operating current, 0.05% initial accuracy, low drift: 10ppm/c lt1634 micropower precision shunt reference 10a operating current, 0.05% initial accuracy, low drift: 10ppm/c switching regulators ltc3588-1 piezoelectric energy harvesting power supply in 3mm 3mm dfn and msop packages high efficiency hysteretic integrated buck dc/dc; 950na input quiescent current (output in regulationno load), 520na input quiescent current in uvlo, 2.6v to 19.2v input operating range; integrated low-loss full-wave bridge rectifier, up to 100ma of output current, selectable output voltages of 1.8v, 2.5v, 3.3v, 3.6v ltc3620 ultralow power 15ma step-down switching regulator in 2mm 2mm dfn high efficiency; up to 95%, maximum current output: 15ma, externally programmable frequency clamp with internal 50khz default minimizes audio noise, 18a i q current, 2.9v to 5.5 input voltage range, low-battery detection ltc3642 high efficiency high voltage 50ma synchronous step-down converter in 3mm 3mm dfn and mse packages wide input voltage range: 4.5v to 45v; tolerant of 60v input transients, internal high side and low side power switches; no compensation required, 50ma output current, low dropout operation: 100% duty cycle, low quiescent current, 12a battery chargers ltc1734l lithium-ion linear battery charger in thinsot low current version of ltc1734, 50ma i chrg 180ma ltc4054l standalone linear li-ion battery charger in thinsot low current version of ltc4054, 10ma i chrg 150ma. thermal regulation prevents overheating, c/10 termination, with integrated pass transistor ltc4065l standalone 250ma li-ion battery charger in 2mm 2mm dfn low current version of ltc4065, 15ma i chrg 250ma, 4.2v, 0.6% float voltage, high charge current accuracy: 5% ltc4071 li-ion/polymer shunt battery charger system with low battery disconnect charger plus pack protection in one ic low operating current (550na), 50ma internal shunt current, pin selectable float voltages (4.0v, 4.1v, 4.2v), 8-lead, 2mm 3mm, dfn and msop packages figure 9. 12v wall adapter charging with 205ma with automatic load disconnect on low battery 4070 ta02 ltc4070 12v adj hbo r in 41.2 2w r ntc : nths0402n02n1002f 10k gnd float system status t r nom 10k li-ion ntcbias ntc drv lbo v cc r led 2.67k d1 ltst c190kgkt + q1: fdn352ap q2: fdr8508

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