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[ AP1651BEL ] 014003479 - e - 0 1 201 4 / 10 - 1 - 1. genaral description the AP1651BEL (hereinafter referred to as the ap1651) is a current mode non - isolated low side buck converter controller ic designed to support an led general lighting application as a second stage (e.g. after pfc stage). thi s ic provides " constant ripple control ", featuring the constant peak and bottom current of the inductor which is sensed through low side sense resistors. this control scheme does not depend on either the varying input voltage or the varying forward voltag e of the leds, allowing the led current to be obtained with high stability. the ap1651 supports two types of dimming; pwm dimming by pulse input and complex dimming by dc input. deep dimming down to 1% is achievable by using dc dimming. in addition, the dc dimming has an even deeper dimming function by using an internal linear regulator for the leds. this "ultra - dimming" which is supported from 500a to 100a is able to provide a new night light application. this ic provides several protection function; ove r current protection, uvlo, and thermal shutdown for the ic chip. 2. features ? low - side switching step - down converter ? current mode - continuous conduction mode (ccm) - linear regulator mode (automatic mode selection ) ? operating voltage range vdd = 11v to 26 v http://akm.transim.com/ ? operating temp erature ta = - 40 to 105 c ? dimm ing function - external dc input ( complex dimming 100% to 1% and ultra - low c urrent to 0%) - voltage input of external pulse ( dimming by pwm ) ? prot ection function : - o ver c urrent p rotection for external n - ch annel p ower mos fet - under voltage lockout function (uvlo) - cs pin open protection - t hermal s hutdown (tsd) ? package 14 - pin s op d immable led driver ic for lighting AP1651BEL
[ AP1651BEL ] 014003479 - e - 0 1 201 4 / 10 - 2 - 3. table of contents 1. genaral description ................................ ................................ ................................ ............................... 1 2. features ................................ ................................ ................................ ................................ .................. 1 3. table of contents ................................ ................................ ................................ ................................ ... 2 4. block diagram and functions ................................ ................................ ................................ ................ 3 block diagram ................................ ................................ ................................ ................................ ......... 3 functions ................................ ................................ ................................ ................................ ................. 3 5. ordering guide ................................ ................................ ................................ ................................ ...... 4 6. pin configurations and functions ................................ ................................ ................................ .......... 4 pin configurations ................................ ................................ ................................ ................................ ... 4 functions ................................ ................................ ................................ ................................ ................. 4 7. absolute maximum ratings ................................ ................................ ................................ .................. 5 8. recommended operating conditions ................................ ................................ ................................ .... 5 9. electrical characteristics ................................ ................................ ................................ ........................ 6 10. functional descriptions ................................ ................................ ................................ ......................... 8 operation ................................ ................................ ................................ ................................ ................. 8 dc - dc mode ................................ ................................ ................................ ................................ .......... 9 linear regulator mode ................................ ................................ ................................ .......................... 13 dimming control ................................ ................................ ................................ ................................ ... 14 gate driver (gd) ................................ ................................ ................................ ................................ ... 17 internal 5v regulator (vref) ................................ ................................ ................................ .............. 17 protection function ................................ ................................ ................................ ............................... 17 typical characteristic examples ................................ ................................ ................................ ........... 18 11. recommended external circuit s ................................ ................................ ................................ .......... 19 12. typical application characteristics examples ................................ ................................ .................... 20 13. calculation for external circuit constants ................................ ................................ .......................... 21 14. package ................................ ................................ ................................ ................................ ................ 25 outline dime nsions ................................ ................................ ................................ ............................... 25 recommended pad dimensions ................................ ................................ ................................ ............ 25 marking ................................ ................................ ................................ ................................ ................. 26 15. revision history ................................ ................................ ................................ ................................ .. 27 important notice ................................ ................................ ................................ ................................ .. 28
[ AP1651BEL ] 014003479 - e - 0 1 201 4 / 10 - 3 - 4. bl ock diagram and functions block diagram figure 1 . b lock d iagram functions block name description 5v reg this block generates a 5v volt a ge from the vdd pin voltage and outputs to the internal 5v logic circuit and the vref pin . uvlo by monitoring the vdd pin voltage, driver output is held to gnd level and 5v regulator is inactivated so that malfunction at low voltage is prevented. reset circuit for power on reset when uvlo is released. gate driver level sifter and driver for external n - channel power mosfet. comprex dimming controller control circuit for complex d imming , full and no led current outputs this circuit generates a mode - select - signal and a dim level from the adim input voltage . it also generates a pwm dimming sign al which is generated by comparing the adim pin voltage and a triangle wave that is determined byi mag gen output voltage. t off gen this circuit generates the off time by turning on/off the current source (i src ) which charges an external capacitor betwee n the cvly pin and the gnd . input signals are leb and bot tom current comparator (a2). when the pwm dimming signal is low, both current for charging and outputting ( i src , i snk, ) are stopped. i mag. gen this circuit generat es a bottom control voltage (vr l) from the hysteresis level setting by rvly pin voltage. it a lso outputs lower limit level of the peak current control (adim) to the internal complex dimming controller. linear reg. a r egulator circuit that controls the hv depletion mode fet to be equal the rc pin voltage and the adim pin voltage at the linear regulator mode. tsd overheat detection circuit. leb output leading edge blanking logic signal from the g ate driver output. vdd vref 5v reg. gnd adim 4v 5v cvly cpwm rvly reset gd 100k r s q x8 cs 2 a + - - + t off gen + - 0.8v a1 a2 bottom current comparator peak current comparator i mag. gen a3 a4 ocp latch leb master latch i src i snk adim' 1.5v gate driver tsd uvlo pdim 840 k 160 k fault drain hv depletion mode fet linear reg. rc linear regulator mode v adim lower limit (adim') 2 a fault s r reset q r rg complex dimming controller hold v cvly vr_h vr_l blank blank 1.25 v 0.125 v gout gout int. pwm dim signal fault v adim s 1 s 2
[ AP1651BEL ] 014003479 - e - 0 1 201 4 / 10 - 4 - 5. ordering guide AP1651BEL ta = - 40 105 c 14 - pin sop 6. pin configurations and functions pin configurations functions no. name i/o function 1 rc o output pin for internal high voltage linear regulator a 500 a led current is output when v adim = 1v by c onnect ing an external current sensing resistor (2k?1%) between this pin and the gnd. this resistor should be more than 500 . 2 cvly o e xternal c apacitor pin for i nternal block (t off gen b lock) connect an external 0.01f ceramic capacitor between this pin and the gnd. 3 cpwm o e xternal c apacitor for i nternal pwm generator ( peak+pwm state of complex dimming controller) . connect an external 0.01f ceramic capacitor between this pin and the gnd. 4 vref o internal regulator output pin connect a 10f capa citor between this pin and the gnd . 5 adim i dc d imming (complex dimming) s ignal i nput p in control led current depending on the input voltage ranged 4 to 0. 2 v, and stops the led current under the condition that the input voltage is less than 0. 05 v. 6 rvl y i hysteresis width s etting p in for i nductor the hysteresis width is determined by the input voltage to this pin and a resistor connected between the cs pin and the gnd. 7 cs i inductor c urrent detection pin an inductor peak current is set by connecting a resistor between this pin and the gnd. it also detects an over current and the bottom current of the inductor. this pin is pulled up by a 2 a (typ) internally. 8 gd o gate d rive o utput pin for external n - channel power mosfet this pin is pulled down by a 100k (typ ) resistor internally. 9 gnd pwr ground pin 10 vdd pwr power s upply p in 11 pdim i pwm d imming s ignal i nput p in. leds can be dimmed by inputting pulse voltage to this pin repeat edly. the output driver is turned off when the gnd voltage is inp ut to this pin. this pin is pull ed down by a 2m (typ) resistor internally. 12 13 nc - no connection pin this pin must not connect to anywhere. 14 drain i linear current regulator input p in. drain pin of the internal high voltage mosfet for linear regul ator. connect this pin t o the cathode of an led string through a current limit resistor.
[ AP1651BEL ] 014003479 - e - 0 1 201 4 / 10 - 5 - 7. absolute maximum ratings parameter symbol min max unit vdd ( note 1 ) v dd max - 0.3 30 v gd ( note 1 , note 2 ) v out max - 0.3 v dd max +0.3 or 30 v vref ( note 1 ) v ref max - 0.3 6.0 v rc, cpwm, cvly, rvly, pdim, adim, cs ( note 1 , note 3 ) - - 0.3 v ref max +0.3 or 6.0 v drain ( note 1 ) v drain max - 0.3 450 v power dissipation ( note 4 , note 5 , note 6 ) p d - 1000 mw junction temperature t j - 40 125 ? stg - 55 150 ? note 1 . all voltages refer to the gnd pin (gnd) as zero (refe rence) voltage. note 2 . if v dd max exceeds 29.7v, the maximum value is limited to 30v. note 3 . if v ref max exceeds 5.7v, the maximum value is limited to 6v. note 4 . this value is decreased by 10mw/c in the condition that the temperature is over 25c. note 5 . 100 mm ? 100 mm, t=1.0mm cem single - sided board. note 6 . thermal design should be designed in consideration with the calorific value of the internal regulator as well as power supplies. dc - dc mode (adim terminal voltage >1.4v) : ic p ower dissipation = v dd ic consumption electric current 5.5ma + vref output [ ( v dd ? v ref ) ( ? i vref ) ] linear regulator mode (1.1v>adim terminal voltage >0.05v) : ic power dissi p a tion = internal linear regulator electric power consumption [ ( v drain ? v adim ) ( v adim / rc resistor with the outside r2)] + v dd ic consumption electric curren t 2.0 ma + vr ef output [ ( v dd ? v ref ) ( ? i vref )] warning: the maximum ratings are the absolute limitation values with the possibility of damaging the ic. when operation exceeds these limits , the specifications cannot be guaranteed. 8. recommended operating conditions parameter symbol min typ max unit operating voltage range ( note 7 ) v dd 11 - 26 v drain ( note 7 ) v drain - 400 v rc, cpwm, cvly, rvly, pdim, adim, cs ( note 7 ) - gnd - v ref v rvly pin voltage ( note 7 ) v rvly 1.8 - 4.0 v pdim pin voltage ( note 7 ) v pdim gnd - v ref v vref pin voltage i vref - - 5 ma operating temperature ( note 8 ) t a - 40 - 105 ?
[ AP1651BEL ] 014003479 - e - 0 1 201 4 / 10 - 6 - 9. electrical characteristics ( ta=25c, v dd =15v, gnd=0v, r 2 =2k (rc) , c 3 =0.01f ( cpwm ),c 4 =0.01f ( cvly ) , v rvly =3.25v, v pdim = v adim = v ref , unless otherwise specified . each current is defined as pos itive when it is input to the pin, and defined as negative when it is output from the pin. ) *refer to figure 15 for external devices. 1. power consumption parameter symbol min typ max unit condition power consumptio n i dd1 - 3.0 5.5 ma v cs =0.6v, v cvly =2v, gd - gnd =1000pf i dd2 - 1.4 2.0 ma pdim=0v 2. control parameter symbol min typ max unit condition power s u pply voltage (vdd) uvlo d etect v oltage1 v uvh 9.5 10 10.5 v v dd voltage rising uvlo d etect v oltage2 v uvl 8.0 8.5 9.0 v v dd voltage falling uvlo h ysteresis v uvhys - 1.5 - v internal r egulator (vref) vref v oltage v ref 4.8 5.0 5.2 v i vref =0ma vref d ropout v oltage v drop - 20 100 mv i vref = - 5ma mode s elect (adim) step down dc - dc c onverter m ode v adim 1.4 - - v lin ear r egulator m ode v adim - - 1.1 v output is stopped. v adim - - 0.05 v full o utput v adim 4.5 - - v adim dimmer off : 100% output adim p in p ull - u p c urrent i adim 1.6 2.0 2.4 a dc - dc c onverter m ode peak s ense v oltage(cs) v sen 0.47 0.5 0.53 v v adim =v re f leading e dge b lanking t ime t leb 220 350 430 ns cs=0.6v cvly c harge/ d ischarge r atio cd r 67 100 133 i src /i snk maximum off time t offmax - 40 48 s v cvly =gnd internal pwm d im ming f requency f pwm 0.75 1.0 1.25 khz c 3 = 0.01f (cpwm - gnd) minimum d uty of the i nternal pwm d im ming d min 28 5.0 7.5 % v adim =1.5v linear r egulator m ode drain c urrent i drain1 470 500 530 a v adim =1.0v ,v drain =400v i drain2 94 100 106 a v adim =0.2v ,v drain =400v drain o ff l eak i drainof f - - 1 a v adim =0v,v drain =400v pwm d imming (pdim) pdim t hreshold v oltage v pdim1 - - 0.5 v disable v pdim2 1.5 - - v enable pdim p ull d own r gd - 1.0 - m gate d river gd p ull d own r gd - 100 - k r ise t ime t r - 50 - ns gd connected 1000pf fall t ime t f - 40 - ns gd connected 1000pf
[ AP1651BEL ] 014003479 - e - 0 1 201 4 / 10 - 7 - 3. protection p arameter symbol min typ max unit condition cs pin o ver c urrent ocp 0.72 0.8 0.88 v latch off cs pin p ull - up c urrent i cs 1.8 2.0 2.2 a v cs =gnd thermal s hutdown t tsd 130 150 - c when the temperature rises ( note 9 ) tsd h ysteresis t tsd hys - 55 - c when the temperature falls after thermal shutdown ( note 9 ) note 9 . these values are d esign v alue s .
[ AP1651BEL ] 014003479 - e - 0 1 201 4 / 10 - 8 - 10. functional descriptions o peration the ap 1651 integrates an n - channel power mosfet controller for a current control type non - isolated buck converter circuit and a high voltage linear regulator , which are suitable for driving leds in a series connection. step - down dc - dc coveter mode (hereinafter dc - dc mode) or linear regulator mode can be selected by an external dc voltage. this dc voltage can also control led dimming in addition to mode selecting, so that a complex dimming that changes operation mode automatically while adjus ting the led output level from the maximum to the minimum is realized. the average current of an inductor is equal to that of leds on a non - isolated buck converter because the inductor is directly connect ed to leds during the entire switching cycle. there fore, if the inductor average current is controlled to be constant, the leds average current also keeps constant. a hysteresis control mode is a one of control method that keeps the average current of the inductor constant. a stable current characteristic, that has a tolerance to changes of input/output conditions, is provided by this hysteresis control by directly controlling the peak current of the inductor and the difference between the bottom current and peak current (hysteresis width). the ap1651 ado pts a constant ripple current control method of the inductor current, which supplies a constant current in continuous conduction mode (ccm). with this method, the average current on the leds connected in series can be kept constant in spite of the possible system variations caused by following reasons : 1) input voltage change 2) change in the number of leds connected in series 3) variation in led forward voltages (vf) of the leds 4) change in led forward voltages caused by temperature variation. 5) induc tor v alue v ariation in order to obtain the constant ripple current control, the peak current and hysteresis width need to be determined properly , and then the coil inductance value should be determined by input/output voltage conditions and a switching fre quency range . off time is set by hysteresis width control automatically. in addition, a stable operation can be achieve d without loop compensation even when the switching duty exceeds 50% , providing a simplified circuit design with the ap1651. dimming by the adim pin controls the led current automatically from 100% to 1% and also from 500ua to 100ua by changing 3 modes which are called peak current control mode , peak current control with pwm dimming mode and linear regulator mode . these modes can be switched by the adim pin voltage. peak current control mode: the average current is controlled by changing peak current under constant ripple control. since the constant ripple control needs to detect the peak and bottom current of the inductor, the pea k current cannot be less than the ripple amplitude (the average current should be more than 1/2 of the ripple amplitude). the ap1651 automatically sets the lower limit of the peak current control, and if the current goes down below, it operates in peak cu rrent control with pwm dimming mode. peak current control with pwm dimming mode: the average current is controlled by using both peak current control and internal pwm method under the constant ripple control. these 2 modes described above can control the average current seamlessly from 100% to 1%. linear regulator mode: when the adim pin voltage is at v adim2 (0. 2 to 1.0v), ap1651 stops the switching operation of the external n - channel power mosfet and the led current is controlled by the drain pin u sing the int ernal constant current source. this mode is suitable for tiny current applications such as a night light. ap165 1 also supports the pwm dimming. when the adim pin voltage is higher than the peak current control mode, the led average current is controlled by the external n channel power mosfet intermittent switching operation which is synchronizing with the pulse input from the pdim pin.
[ AP1651BEL ] 014003479 - e - 0 1 201 4 / 10 - 9 - dc - dc m ode figure 2 shows current path s of a buck converter and voltage and current waveforms of each node. figure 2 . operation images of buck c onvert e r the current of inductor l1 is controlled by tu rning on and off the external n - channel power mosfet (m1) with the gd pin output. the cur rent path when the gd pin turns on is shown as (1) and off is shown as (2) in figure 2 . when the coil (l 1 ) current reaches the peak current (l 1 peak ) while the gd pin is on, the a1 comparator which is internally con nected to the cs pin is inverted and the gd pin is switched off. the gd pin is switched on automatically when the o ff time which is determined by the cvly voltage is passed. the bottom current is detected by the a2 comparator connected to the cs pin and th e ap1651 controls the off ti me to keep the target value (vr l /8 ) by charging/discharging the cvly pin . relationship of the cvly pin voltage and the off time can be describ ed approximately as follow s ....(1) w here the range of v cvly is 0.125v vcvly 2.35v. the cvly pin is connected to an internal current source (i src ) and current sink (i snk ). the cvly pin charges a capacitor (c 4 ) , which is connected to the cvly pin , during the time from a falling edge of t leb until the a 2 compara tor output is inverted . t his pin is discharging the capacitor in any other time. the balance of this charge and discharge of the capacitor between the cvly pin and the gnd control s the cvly voltage (off - time) to be optimal for the output voltage, and the desired hysteresis width can be obtained. figure 3 shows a waveform of the cs pin voltage and the cvly pin voltage when the bottom current of the inductor is lower than the setting value. in this case, the off tim e needs to be shortened . after the gd pin turns on, the capacitor (c4) connected to the cvly pin is charged until the cs pin voltage reaches v r l/8 . this charge causes the cvly pin voltage to be increased, and the off time becomes shorter gradually. when th e cs pin voltage is equal to v r l/8 with the gd pin is on, the charge and discharge currents o n the cvly pin are ev enly balanced which means st able state. cs gd d2 l1 m 1 r 6 (1) (2) vin vout rvly cvly ref c4 i src i s n k r 5 r 4 gd cs voltage t on toff peak (vr_h/8) l1 current i l1 _ bottom i l1 _ peak ave rage bottom (vr_l/8) off time i l1 0 time on off 105 . 42 ] v [ v 842 . 16 ] s [ t cvly typ , off ? ? ? ?
[ AP1651BEL ] 014003479 - e - 0 1 201 4 / 10 - 10 - figure 3 . bottom current control by the cvly pin voltage on the other hand , in the case that the bottom current is higher than i l1 bottom , the cs pin voltage becomes over vr l/8 when t he gd pin turns on. consequently the capacitor (c4) connected to the cvly pin is not charged, and just dischar ged by a very small current (is nk). th e cvly pin voltage is decrease d by this discharging and the off time becomes longer in every switching cycle. when the cs pin voltage becomes equal to v r l/8 while the gd pin is on, the charge and discharge currents on the cvly pin are balanced in a st able state. 1) peak c urrent and hysteresis width s etting inductor average current ( i l1 ave ) in the constant hysteresis width control is determined by the peak current ( i l1 peak ) and the hysteresis width ( i l1 ) as follows: ( 2 ) hysteresis width s etting: the hy steresis width is determined by the rvly pin voltage. an approximation of the rvly pin voltage is described with the hysteresis width i l1 [a] and resistor r 6 [] as follows: [v] (3) in this case, v ref = 5v and the hysteresis width (v cshys ) that is dete cted by the cs pin is described by the following equation . [v] (4) p eak c urrent s etting: when the gd pin turns on, the cs pin voltage generated by the current and the resistor (r 6 ) is detected. when the adim pin voltage is higher than v mth (4.5v (typ)), the peak current ( i l1 peak ) is the current at 0.5v (typ) as the cs pin voltage. therefore, the peak current is set by r 6 []. the relationship between i l1 peak and r 6 is approximated by the following equation . [] (5) in this case, i l1 peak is a desired peak current. r 6 is calculated by the following equation. [] (6) the ratio of the inductor current and the hyster esis width with a maximum led current (v adim 4.5v) is described by v sen and v cshys as follows regarding equation (2), (4) and (6). vr_h/8 vr_l/8 v cs v cvly i l1 i l1 _peak i l1 _bottom time i l1 1 l peak _ 1 l ave _ 1 l i 2 1 i i ? ? 1 l 6 ref rvly i r 1 . 16 v v ? ? ? ? ? ? rvly ref 1 l 6 cshys v v 0621 . 0 i r v ? ? ? ? ? 6 sen peak _ 1 l r v i ? ave _ 1 l cshys sen peak _ 1 l sen 6 i 2 v v i v r ? ? ?
[ AP1651BEL ] 014003479 - e - 0 1 201 4 / 10 - 11 - (7) 2) switching f requency since the constant ripple current control keeps the peak and bottom current constant, the curr ent can be controlled without being affected by the input voltage f luctuation and led vf variation while the switching frequency is changed by these changes. figure 4 shows examples of the frequency change when th e input voltage and the number of leds connected in series (vf) are change d . in order to keep the frequency within desired switching frequency range, l1 and i l1 need to be configured properly. figure 4 . examples of s witching f requency c hange by input voltage and n umber of leds switching frequency f sw is approximately given by the following expression. [hz] (8) l 1 : i nductance va lue (h), i l1 : hysteresis width (a), v in : led anode voltage (v), v out : total voltage of forward direction of leds in series ( vf [ v ] ) equation ( 8 ) shows that the coil inductance value is determined by a switching frequency, input/output voltage condition and hysteresis width. therefore, for example, when desired input/output voltage conditions and switching frequency are known, the coil inductance value and the hysteresis width can be determined by deciding e ach one of the value . 3) leading edge blanking time and m inimum on time of the gd pin the ap1651 does not detect a current f or a certain period after the n - channel power mosfet (m 1 ) turns on. this is called leading edge blanking time (t leb ). this is a necessary period to avoid erroneous operation such as instantaneous shut down of the gd pin or ceasing the switching operation by the over current protection caused by a reverse recovery current of the d iode (d 2 ) or a discharge current from parasitic capacitor are large when the m 1 is turned on. 2 1 v v 1 i i cshys sen ave _ 1 l 1 l ? ? 20 40 60 80 100 120 140 100 150 200 250 300 350 400 450 switching frequency(khz) input voltage (vdc) switching freqency v.s. input voltage 24 series connected leds 64 66 68 70 72 74 76 78 16 18 20 22 24 26 28 30 32 34 series connected leds switching frequency v.s. number of leds input voltage: 1 7 0v ? ? out in in out 1 l 1 sw v v v v i l 1 f ? ? ? ?
[ AP1651BEL ] 014003479 - e - 0 1 201 4 / 10 - 12 - figure 5 . masking t ime for p reventing f alse d etection (t leb ) on t he cs p in v oltage however, all current detection on the cs pin starts after t leb , then the shortest on time of the m 1 is limited by t leb . the t leb is 450ns in the worst ca se at 25c. o n time (t on ) is limited by t leb and approximately gi ven by the following equat ion . (9) if o n time is less than t leb during th e operation, the peak current will be higher than the setting and the average current will also s hift higher, furthermore, the switching may be ceased due to the over curre nt protection on the external n - channel power mosfet. (10) figure 6 . peak current error by the shortest on time ( shortest on time < t leb ) gd cs mask area ton toff t leb t leb sw on in out f t v v ? ? on 1 l 1 out in t i l v v ? ? ? gd cs i l1 t leb ocp v sen
[ AP1651BEL ] 014003479 - e - 0 1 201 4 / 10 - 13 - linear r egulator m ode figure 7 shows current paths of a linear regulator with the ap1651 . the dashed line (3) is the current path. a fine current is controlled by flowing as v in ? led?l 1 ? r 7 ? drain pin ? rc p in ? r 2 ? gnd . figure 7 . operation image of linear regulator mode the rc pin is controlled as so that its voltage becomes the same level as the adin pin voltage. therefore , the current in this mode is det ermined by the r2 resistor which is connected to between the rc pin and the gnd. [] (11) i leds indicates the current [a] that flows led line, and v adim indicates the voltage of the adim pin in linear regulator mode. for example, a 5 00a (typ) current flows at v adim = 1v when the r2 resistor is 2 k . the r7 is a limiting resistor for the voltage between the drain pin and the rc pin in a linear regulator mode operation. heat generation of the ic can be suppressed by increasing the r7 va lue but the drain pin must always be equal to or more than 10v (r2=2 k ) in this mode. [] (12) v in, min indicates the operating minimum input voltage (v). v out, max indicates the operating maximum output voltage (v) and normally it is the total forward voltage of leds (vf). power loss of the ic: p ic is calculated by the following equation approximately. [w] (13) p ic should be considered for thermal design. please co nfirm these values on the actual printed boar d since t he thermal resistance of the ic differs depending on the board. when the ic is over heated, the linear regulator will be stopped by the thermal shut down function. when the vdd voltage is under uvlo voltage, a current of several hundred micro am pere flows between the drain pin and the gnd regardless of the adim pin or the pdim pin voltage . the power supply circuit to the vdd pin should be designed as that the vin becomes less than vf (vin < vf) before the vdd pin voltage drops under v uvl . leds adim 2 i v r ? led max , out min , in 7 i 10 v v r ? ? ? ? ? ? ? max led adim max led max led min out max in ic i v i r i v v p , 2 , 7 , , , ? ? ? ? ? ? ? drain d2 l1 m 1 r 6 ( 3 ) v dm1 rc r 7 r 2 hv depletion mode fet adim vin v adim
[ AP1651BEL ] 014003479 - e - 0 1 201 4 / 10 - 14 - di mming c ontrol 1) complex dimming by the adim pin wide dimming range using the adim pin is available. one of the following three modes of dimming operation: peak current control mode , peak current control with pwm dimming mode and linear regulator mod e is chosen by the adim pin voltage. the input voltage range of the adim pin is from 0v to vref(5v (typ)) . the led current is changed by the applied input voltage when it is less than 4v as figu re 8 shows. figu re 8 . complex dimming by dc input (adim pin) a brief overview of the three dimming methods by using the adim pin voltage, as shown on figu re 8 , is as follows: by decreasing the adim pin v oltage below 5v, the peak current control starts from 4v. in this mode, the average current goes down by decreasing the peak current under constant hysteresis width control . when the bottom current drops to a certain level, peak current control with pwm dimming mode is started. in this time, the peak c urrent stops decreasing at the adim voltage shown in figu re 8 , and simultaneously, pwm dimming starts. the value of the adim is approximately determined by the rv ly pin voltage defined by the ripple amplitude as following formula: (14 ) ? the average current is adjustable from 100% to 1% by changing the adim pin voltage in the range of v adim3 ( v ref to 1.5v). ? there is an invari able zone between 1.5v to 1v of the adim pin voltage where the average current cannot be changed at all. ? when the adim pin voltage is less than 1v, linear regulator mode starts. in this mode the switch ing operation stops (external n - channel power mosfet is always off), and an internal c onstant current source connected to the drain pin is active instead. the led current can be dimmed from approximately 500a to 100a by tuning the adim pin voltage between 1 v(typ) and 0.2v(typ). ? if the adim pin voltage is less than 0.05 v , the operation mode is changed from the constant current source mode to led current off mode in which the led turns off. ? operation of the pwm dimming in peak + pwm state is the same as pwm dimming by the pdim pin mentioned in the next paragraph except using an internal triangle waves. ? ? rvly ref v v 3375 . 0 2 ' adim ? ? ? ?
[ AP1651BEL ] 014003479 - e - 0 1 201 4 / 10 - 15 - pwm dimming frequency setting (c 3 ) in peak + pwm state is controlled by the adim pin. the pwm dimming frequency f pwm (khz) is approximately determined by the following expression according to the capacitor c 3 value ( f ) connected between the cpwm pin and the gnd. [khz] (15) the pwm dimming frequency must be set in the range from 20 0hz to 5 khz. figure 9 shows hysteresis in dimming characteristics around pwm minimum pulse wi dth. when a dimming level is lowered in the state where the bottom current control is perform ing , the led current is controlled according to pwm pulse width (point a). when a dimming level is raised after the state where the bottom current control does not perform or power off, in order to that the bottom current control may not perform until the pwm pulse high width becomes longer than the sum of gd on time (gd on) and maximum off time (40 ? sec), led current does not increase (point b). therefore, the dimmi ng c haracteristic s have a hysteresis . in complex dimming by the adim pin, the minimum duty of pwm signal which generate in ic is 5%. figure 9 . hysteresis in dimming characteristics around pwm minimum pulse wid th 9 3 pwm 10 33 . 10 c 1 f ? ? ? ? pwm signal gd si gnal coil current pwm signal gd signal coil current maximum off tome led current pwm pulse width gd on + maximum off time gd on (point a) (point b) b a
[ AP1651BEL ] 014003479 - e - 0 1 201 4 / 10 - 16 - 2) pwm dimming by the pdim pin led pwm dimming is available using the pdim pin. it is controlled by applying a pulse voltage to the pdim pin. waveform diagram of t he pdim pin voltage (v pdim ) , coil current (i l1 ), switching voltage of the current source for internal charging (s 1 ) and switching voltage of the current source for discharging (s 2 ) are shown in figure 10 . figure 10 . pwm dimming waveform when v pdim turns on from off state, the switching operation of the external n - channel power mosfet ( m 1 ) is started. the switching operation of the m 1 is stopped when v pdim is turned off. a dimming that is proportional to the pwm pulse duty is available by inputting pwm pulse to the pd im pin repeatedly . for the first switching operation, the s 1 voltage is forcibly opened to avoid a spike current caused by an over charge of the capacitance c4 connected to the cvly pin because the rise - up time that the i l1 reach to i l1 peak ( vr h/8 ) level af ter the m 1 is powered on is long. when v pdim is off, the s 2 voltage is opened by discharging the c 4 not to lower the bottom current. by these operations, the cvly pin voltage is kept in a level regardless of the duty of pwm dim m ing pulse. however, on pulse of v pdim is needed at least for 2cycles to charge the c 4 capacitor. the led current may be lower than the setting value if the on pulse is shorter than this cycle . the minimum on time of repeat ed pulse t pwm,on,min to the pdim pin is approximately calculat ed by the following expression. [s] (16) the cpwm pin should be connected to the gnd in an application that uses both peak dimming by the adim pin and pwm dimming by the pdim pin. by connecting the cpwm pin to the gnd, a conflict in pwm dimming ope ration can be avoided since pwm d imming in dc - dc mode (complex dimming) is not executed. v pdim i l 1 on off v cvly s 1 s 2 open open 6 out in 1 6 adim min , on , pwm 10 48 v v l r 4 2 v t ? ? ? ? ? ? ? ?
[ AP1651BEL ] 014003479 - e - 0 1 201 4 / 10 - 17 - gate d river (gd) the gd pin is a control pin for the external n - channel power mosfet. it turns on and off the external n - channel power mosfet in the buck converter circuit. the gd pin outputs an equivalent voltage with the vdd pin. so the vdd pin voltage should be set in consideration for breakdown voltage of the external n - channel power mosfet. the ap1651 controls the hysteresis width by detecting the current after masking per iod (t leb ) following a power - up of the external n - channel power mosfet . int ernal 5v r egulator (vref) the ap16 51 has a 5v internal regulator for a reference voltage of internal circuits. t he input voltage is applied from the vdd pin. a 5ma current at maximum c an be output from the vref pin u nder a proper thermal condition. a 1 f c apacitor should be connected between the vref pin and the gnd for a stabiliza tion . this connection line should be short as possible. up to 10 f capacit ance can be connected to the vref pin depending on the adim dimming. protection function table 1 . protection function list protection f unction detection pin operation detection condition corresponding block and operation release condition cs pin o pen cs dc - dc gd:on and cs0.8v driver output : gnd ( note 11 ) over c urrent cs dc - dc gd:on and cs0.8v driver output : gnd ( note 11 ) thermal p rotection none dc - dc and linear regulator tjt tsd (150c) driver output : gnd 5v reg.: stop linear reg: stop complex d imming controller: stop tj t tsd(150c) - t tsd hys(55c) vdd uvlo vdd dc - dc and linear regulator vdd v uvl (8.5v) driver output : gnd 5v reg.: stop linear reg: stop complex dimming controller: stop tsd: stop vddv uvh (10.5v) note 10 . values in this table are typical or design values. refer to the electrical characteristics for details. note 11 . in order t o release the latch off state, apply a voltage that is less than v uvl to the vdd pin for at least 10ms ( in t he case of the capacitor connected to the vref pin is 1f). note 12 . when the vref pin is shorted to the gnd, the ic prevents heat generation by limiting the m aximum current of the inte rnal regulator to 12ma (design value). 1) cs pi n o pen p rotection this function prevents that the external n - channel power mosfet continue s to be on w hen the cs pin is opened . if the cs pin is open, the cs pin voltage becomes the same level as the vref voltage by an internal pull - up current circuit of t he cs pin. by this voltage increase, over current protection is activated and the switching operation ceases. 2) over c urrent p rotection if the cs pin voltage becomes higher than 0.8v after t leb period w hile the gd pin on, the gd pin is turn ed off and fix ed. in order to resume the switching operation, the ic needs to be reset (the vdd needs to be lower than v uvl once ) . 3) thermal p rotection to prevent a thermal runaway of the ic, the junction temperature is always monitored and the ic operation is control led. when the junction temperature exceeds t tsd (150c typical in designed value), corresponding blocks shown in table 1 are powered down . the ap1651 returns to normal operation when the junction temp erature drops to the level below the hysteresis temperature t tsd hys (55c in design value).
[ AP1651BEL ] 014003479 - e - 0 1 201 4 / 10 - 18 - 4) uvlo (under vol tage lock o ut) malfunctions at low supply voltage and the situation of insufficient gate drive voltage for the external n - channel power mosfet are prevented. t ypical c haracteristic e xample s figure 11 . uvlo figure 12 . vref pin voltage figure 13 . cs pin pea k current detection voltage (vadim=5v) figure 14 . leading edge blanking time
[ AP1651BEL ] 014003479 - e - 0 1 201 4 / 10 - 19 - 11. recommended external circuits figure 15 . ap1651 external circuit example table 2 . recommended pa rts list (200v dc input, 90v - 700ma output) ref des qty description mfr mfr pn u1 1 led driver ic akm ap1651 l1 1 e30 core/4.53mh tdk pc47ee30a200 m1 1 nmos 500v/5a ciss=360pf on 2sk4196ls d1 1 zener 16v 200mw any - d2 1 frd 50ns 600v/5a on rd0506t c1 1 47f/450v rubycon 450px47mefc16x31.5 c2,c5 2 cer 10f/25v x5r 0805 any - c3 1 cer 0.022f/50v x5r 0603 any - c4 1 cer 2200pf/50v x5r 0603 any - c6 1 cer 10000pf/50v x5r 0603 any - c7 1 22f/250v rubycon 250px22mefc10x16 r2 1 smd 0603 2k smd 0603 16k smd 0603 24k smd 0805 2//2//1.6 1% smd 1206 150k 14 13 12 11 1 2 3 4 5 6 7 10 9 8 rc c vly c pwm vref adim rvly cs gd gnd vdd pdim nc nc drain +v pwm dim dc dim g + c1 c2 d1 r 5 r 4 c5 r 6 r 7 d2 l1 m 1 u1 vin + out - out 15v c 3 c 4 r2 + c 7 c6
[ AP1651BEL ] 014003479 - e - 0 1 201 4 / 10 - 20 - 12. typical application characteristics examples examples of application characteristics with figure 15 and table 2 are shown below. figure 16 . led current vs. vin(dc) (led vf=90v) figure 17 . led current ratio vs. vin(dc) (reference: vin=220v, led vf=90v) figure 18 . led current vs. led vf (vin(dc)=220v) figure 19 . led current ratio vs. led vf (reference: vin=220v, led vf=90v) figure 20 . efficiency vs. vin(dc) (led vf=90v) figure 21 . complex dimming performance (vadim)
[ AP1651BEL ] 014003479 - e - 0 1 201 4 / 10 - 21 - 13. ca lculation for external circuit constants expressions here are based on a condition that assumes the led current is 700ma, the power supply is 200v, the vf for led is 90v and the operation frequency is 70khz. rvly pin setting (r 4 , r 5 ) v rvly has a range of 1.8 v ~ 4.0 v and normally operates at 3.5v. the hysteresis width of the cs pin ( v cshys ) is determined by equation ( 1 7) using equation (4). [v] (4) (17) and then, the hysteresis width r atio is determined by equation (18) using equation (7) . (18) v rrly is determined by a resistor divider at the vref pin. (19) connect a 0.01 f capacitor (c 6 ) between the rvly pin and the vref pin to stabilize v rvly . cs pin setting (r 6 ) r 6 is determined by equation (20) using equation (6). (20) t he maximum peak current of the coil (except the spike noise when switching) , the n - channel power mosfet and a regenerative diode are equal to i l1 peak and it is determined by equation (21) using equation (5). [a] (21) coil inductance (l 1 ) as mentioned in 2) switching frequency , the inductance value of the coil is determined by input/output voltage conditions and switching frequency [fsw]. however, the setting calculations for the rvly pin and the cs pin do not include group delay of the circuit. for example, i l1 does not include group delay but t on include s group delay in e quation (10) . therefore, a t on value without group delay must be calculated to determine the coil inductance by equation (10). figure 22 s hows a detailed time waveform of the gd pin voltage, the cs pin voltage and the coil current, which is shown in figure 2 , with group delay. 772 . 0 6478 . 0 5 . 0 r 5 . 0 i 6 peak _ 1 l ? ? ? ] [ 6478 . 0 ] ma [ 700 2 ] mv [ 15 . 93 ] mv [ 500 i 2 v v r ave _ 1 l cshys sen 6 ? ? ? ? ? ? ] v [ 5 . 3 ] k [ 91 ] k [ 39 ] k [ 91 5 5 r 4 r 5 r v v ref rvly ? ? ? ? ? ? ? ? ? ? [%] 54 . 20 5 . 0 09315 . 0 5 . 0 1 2 1 v v 1 i i cshys sen ave _ 1 l 1 l ? ? ? ? ? ? ] v [ 09315 . 0 0621 . 0 ) 5 . 3 5 ( 0621 . 0 ) v v ( v rvly ref cshys ? ? ? ? ? ? ? ? ? rvly ref cshys v v 0621 . 0 v ? ? ?
[ AP1651BEL ] 014003479 - e - 0 1 201 4 / 10 - 22 - figure 22 . time waveform with group delay i n figure 22 , t dr indicates group delay from a rising of the gd pin voltage to a falling of the a2 comparator. t df indicates group delay from a peak current detection of the cs pin to a falling of the gd pin voltage . although these values vary depending on the characteristics of m 1 and ic performance, group delays are approximately determined by following expression s. table 3 . group delay gd falling group delay gd rising group delay the time ( t on ), which is from bottom limit setting value ( vr l/8 ) to the upper limit setting value ( vr h /8 ), is determined by equation (9 ) in consideration of group delay. (9) calculation for t on and inductance value l 1 from equation (9) , (10) and ( 4) are described as bellow. [s] (22) [h] (23) n - channel power mosfet select (m 1 ) the ap1651 executes bottom current detection on a timing of the gate voltage rising of an external n - channel power mosfet (m 1 ). use an n - c hannel power mosfet that has a small gate capacitance c iss to shorten the spike current period that is occurs at power - up of the mosfet. for example, c iss 500pf when the led current = 700ma . the c iss value should be in proportion to the led current. connect a heat sink if it is necessary for heat radiation. v gd v cs vr_h/8 i l1 i l1_ peak i l1_ ave vr_l/8 i l1_bottom tdf tdr t on ' on off ) typ ( df ns 200 t ? ) typ ( sw 9 dr ns f 101 10 210 t ? ? ? ? ? ? ? ? ? ? ? ? ? dr df sw in out on t t f v v ' t ? ? ? ? ? ? ? ? 3 6 cshys 6 on out in 1 10 5 . 4 09315 . 0 6478 . 0 10 877 . 5 90 200 v r ' t v v l ? ? ? ? ? ? ? ? ? ? ? ? ? 6 9 3 9 3 on 10 5.877 10 10 70 101 10 210 200 10 70 200 90 ' t ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?
[ AP1651BEL ] 014003479 - e - 0 1 201 4 / 10 - 23 - regenerative diode select (d 2 ) use a regenerative diode that has a breakdown voltage which is more than input voltage and an allowable current which is more than the maximum peak current i l1 peak . a diode t hat has a short recovery time has high efficiency and is effective for reducing noise s . connect a heat sink if it is necessary for heat radiation. bottom limit value of i nductance (l 1 ) in peak + pwm operation by the adim pin charging period t chg 101 > discharging period t dis must be satisfied to keep a steady state of the cvly voltage. if the charging period is shorter than this, led current may be short to the setting value. especially the bottom limit detection voltage will be in a lowest level if the adim pin voltage is 1.5vv adim adim . t he inductance and input/output voltage conditions should be determined carefully to ensure an enough charg ing time. therefore the coil inductance value (l 1 ) must satisfy the formula below when using the complex dimming by the adim pin. this inductance should be determined in consideration of the variation in characteristics and temperature characteristics of t he coil and leds. [h] (24) [ v ] (2 5 ) r 6 indicates the resistor ( ) between the cs pin and the gnd , v in,max indicates the maximum input voltage (v) of when the ap1651 is in operation, v out,min indicates the minimum output voltage (v) of when the ap1651 is in operation and v cshys indicates the hysteresis width (v) that i s detected by the cs pin. t he minimum necessary inductance value is described as shown below. [h] (2 6 ) check if this value satisfies equation (23) . (2 7 ) formula (2 7 ) proves that the inductanc e value calculated by equation (23) can be used in all states of complex dimming by the adim pin . on the other hand, if the inductance value does not satisfy formula (2 7 ), the adim pin operation in peak state works normally when the adim voltage satisfi es the expression below. [v] (2 8 ) the led current of the peak state with the adim pin voltage that satisfies formula (2 8 ) is approximately calculated as below. [a] (2 9 ) in this case, v adim sa tisfies 4vv adim v adim,min . for example, if the coil inductance l 1 is 1.5mh (wh ich does not satisfy formula (27 )), v adim,min becomes as shown below. [v] ( 30 ) in this case, the led current i led is determined as shown below. [ma] (3 1 ) therefore, the adim pin voltage can be set in a range of 0v to 1v or 2.5 3 v to v ref . 3 6 1 10 80 . 1 093 . 0 294 . 3 90 200 648 . 0 10 81 ? ? ? ? ? ? ? ? ? ? l ? ? ? ? ? ? ? ? ? ? ? ? ? 1 v 2 v r 2 1 i cshys adim 6 led 53 . 2 2 093 . 0 04 . 4 10 5 . 1 90 200 648 . 0 10 24 . 3 3 6 , ? ? ? ? ? ? ? ? ? ? ? ? min adim v ? ? 133 1 093 . 0 2 53 . 2 648 . 0 2 1 ? ? ? ? ? ? ? ? ? ? ? ? led i cshys min out max in v vbtm v v r l ? ? ? ? ? ? ? , , 6 6 1 10 81 ) 25 . ( 3 ) 23 . ( 3 1 10 80 . 1 10 5 . 4 eq eq l ? ? ? ? ? ? 2 04 . 4 10 24 . 3 1 , , 6 6 , ? ? ? ? ? ? ? ? ? cshys min out max in min adim v l v v r v 100 8 175 . 0 876 . 0 ? ? ? ? rvly v vbtm
[ AP1651BEL ] 014003479 - e - 0 1 201 4 / 10 - 24 - the maximum switching frequency of ap1651 is decided by the relation of input voltage, led v f voltage and current ripple amplitude. following tables are g uideline of maximum frequency and minimum coil value which is corresponds to maximum frequency at each led current i led max and led v f voltage when the v rvly =3.5v . in addition, when the switching frequency is high, please take care of heat of external mosfe t. ta ble 4 . at input voltage dc400v led v f maximum frequency i led 100ma 200ma 350ma 700ma 1000ma 25v 95khz l > 42.9mh l > 21.5mh l > 12.3mh l > 6.2mh l > 4.3mh 50v 154khz l > 40.1mh l > 20.1mh l > 11.5mh l > 5.8mh l > 4.0mh 7 5v 214khz l > 37.2mh l > 18.6mh l > 10.7mh l > 5.4mh l > 3.8mh 100v 273khz l > 34.3mh l > 17.2mh l > 9.8mh l > 4.9mh l > 3.5mh 125v 332khz l > 31.5mh l > 15.8mh l > 9.0mh l > 4.5mh l > 3.2mh 150v 392khz l > 28.6mh l > 14.3mh l > 8.2mh l > 4.1mh l > 2.9m h table 5 . at input voltage dc200v led v f maximum frequency i led 100ma 200ma 350ma 700ma 1000ma 25v 214khz l > 20.1mh l > 10.1mh l > 5.8mh l > 2.9mh l > 2.0mh 50v 332khz l > 17.2mh l > 8.6mh l > 4.9mh l > 2.5mh l > 1.8mh 75v 451khz l > 14.3mh l > 7.2mh l > 4.1mh l > 2.1mh l > 1.5mh 100v 569khz l > 11.5mh l > 5.8mh l > 3.3mh l > 1.7mh l > 1.2mh 125v 688khz l > 8.6mh l > 4.3mh l > 2.5mh l > 1.3mh l > 0.9mh 150v 806khz l > 5.8mh l > 2.9mh l > 1.7mh l > 0.9mh l > 0.6mh
[ AP1651BEL ] 014003479 - e - 0 1 201 4 / 10 - 25 - 14. pac kage outline dimensions ? 14 - pin sop [unit: mm] recommended pad dimensions
[ AP1651BEL ] 014003479 - e - 0 1 201 4 / 10 - 26 - marking upper product name ap 1651 b lower date code: 7 digits 2 digits (last 2 d igits of year) +2 digits (weekly code) + 3 digits (production code) ap1651 b x 1 x 2 x 3 x 4 x 5 x 6 x 7
[ AP1651BEL ] 014003479 - e - 0 1 201 4 / 10 - 27 - 15. revision history date (y/m/d) revision page contents 1 4/ 6 /2 5 0 0 first edition 14/10/ 30 01 4 correct adim range value from 4v~0.125v to 4 to 0.2v. 6 add min/max values i nto adim pin pull - up current 8 correct vadim2 voltage range of linear regulator mode from ? ? ? ? ? ? ? ? ? ? ?
[ AP1651BEL ] 014003479 - e - 0 1 201 4 / 10 - 28 - important notice 0. asahi kasei microdevices corporation (akm) reserves the right to make changes to the information contained in this document without notice. when you consider any use or application of akm product stipulated in this document ( product ) , please make inquiries the sales office of akm or authorized distributor s as to current status of the products. 1. all information included in this document are provided only to illustrate the operation and application examples of akm products . akm neither makes warranties or representations with respect to the accuracy or completeness of the information contained in this document nor grants any license to any intellectual property rights or any other rights of akm or any third party with respect to the information in this document. you are fully responsible for use of such information contained in this document in your product design or applications . akm assumes no liability for any losses incurred by you or third parties arising from the use of such information in your product design or applications. 2. the product is neither intended nor warranted for use in equipment or systems that require extraordinarily high levels of quality and/or reliability and/or a malfunction or failure of which may cause loss of human life, bodily injury, serious property damage or serious public impact , including but not limited to, equipment used in nuclear facilities, equipment used in the aerospace industry, medical equipment, equipment used for automobiles, trains, ships and other transportation, traffic signaling equipment, equipment used to control combustions or explosions, safety devices, elevators and escalators, devices related to electric power, and equipment used in fi nance - related fields. do not use product for the above use unless specifically agreed by akm in writing . 3. though akm works continually to improve the products quality and reliability, you are responsible for complying with safety standards and for provi ding adequate designs and safeguards for your hardware, software and systems which minimize risk and avoid situations in which a malfunction or failure of the product could cause loss of human life, bodily injury or damage to property, including data loss or corruption. 4. do not use or otherwise make available the product or related technology or any information contained in this document for any military purposes, including without limitation, for the design, development, use, stockpiling or manufacturing of nuclear, chemical, or biological weapons or missile technology products (mass destruction weapons). when exporting the p roducts or related technology or any information contained in this document, you should comply with the applicable export control laws and regulations and follow the procedures required by such laws and regulations. the p roducts and related technology may not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any applicable do mestic or foreign laws or regulations. 5. please contact akm sales representative for details as to environmental matters such as the rohs compatibility of the product. please use the product in compliance with all applicable laws and regulations that regu late the inclusion or use of controlled substances, including without limitation, the eu rohs directive. akm assumes no liability for damages or losses occurring as a result of noncompliance with applicable laws and regulations. 6. resale of the product wi th provisions different from the statement and/or technical features set forth in this document shall immediately void any warranty granted by akm for the product and shall not create or extend in any manner whatsoever , any liability of akm. 7. this docume nt may not be reproduced or duplicated, in any form, in whole or in part, without prior written consent of akm .

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