tq p3m900 5 high linearity lna gain block datasheet rev . e 0 5 - 0 7 - 1 4 - 1 of 9 - disclaimer: subject to change without notice ? 201 4 triquint www.triquint.com applications ? repeaters ? mobile infrastructure ? lte / wcdma ? general purpose wireless 16 - pin 3x3 mm qfn package pr oduct features ? 50 ? C ? 4000 mhz ? 15.3 ? db gain at 1.9 ? ghz ? 0.8 ? db noise figure at 1.9 ? ghz ? <1.5:1 i/o vswr ( >14 ? db i/o return loss) ? +34 ? dbm output ip3 ? +22.3 ? dbm p1db ? 50? ohm cascadable gain block ? unconditionally stable ? high input power capability ? single supply, 50 ? ma current f unctional block diagram 7 8 6 5 14 13 15 16 12 11 10 9 1 2 3 4 backside pad - rf/dc gnd pin 1 reference mark n/c rf in n/c n/c n/c rf out / v dd n/c n/c n/c n/c n/c n/c n/c n/c n/c n/c top view ordering information part no. description tqp3m9005 lna gain block tqp3m9005 - pcb 0.5 ? C ? ? 4 ghz evaluation board standard t/r size = 25 00 pieces on a 7 reel general description the tqp3m9005 is a high linearity lo w noise gain block amplifier in a low - cost surface - mount package. at 1.9 ghz, the amplifier typically provides 15.3 ? db gain, +34 dbm oip3, and 0.8 db noise figure while only drawing 50 ma current. the device is housed in a leadfree/green/rohs - compliant i ndustry - standard 16 - pin 3x3 ? mm qfn package. the tqp3m9005 has the benefit of having high linearity while also providing very low noise across a broad range of frequencies. this allows the device to be used in both receive and transmit chains for high per formance systems. the amplifier is internally matched using a high performance e - phemt process and only requires an external rf choke and blocking/bypass capacitors for operation from a single supply. the internal active bias circuit also enables stable operation over bias and temperature variations. the tqp3m9005 covers the 0.05 ? C ? 4 ghz frequency band and is targeted for wireless infrastructure or other applications requiring high linearity and/or low noise figure. pin configuration pin no. label 2 rf in 11 rf out / v dd all other pins n/c backside pad rf/dc gnd
tq p3m900 5 high linearity lna gain block datasheet rev . e 0 5 - 0 7 - 1 4 - 2 of 9 - disclaimer: subject to change without notice ? 201 4 triquint www.triquint.com recomm ended operating conditions parameter min typ max units device voltage (v dd ) +3.0 + 5.0 + 5.25 v t case ? 40 + 105 c tj for >10 6 hours mttf +1 9 0 c electrical specifications are measured at specified test conditions. specifications are not guaranteed over all recommended operating conditions. absolute maximum ratings parameter rating storage temperature ? 5 5 to 150 ? c rf input power, cw, 50, t=25 c + 2 0 ? dbm device voltage (v dd ) + 7 ? v operation of this device outside the parameter ranges give n above may cause permanent damage. electrical specifications test conditions unless otherwise noted: v dd =+5 v, temp = +25 ? c, 50 system parameter conditions min typ max units operational frequency range 50 4000 mhz test frequency 1900 mhz gain 13.9 15.3 16.9 db input return loss 12 db output return loss 14 db output p1db +22.3 dbm output ip3 pout=+2 dbm/tone, ?f=1 mhz +30 +34 dbm noise figure 0.8 db current, i dd see note 1 35 50 68 ma thermal resistance, jc junction to case 76.8 c/w
tq p3m900 5 high linearity lna gain block datasheet rev . e 0 5 - 0 7 - 1 4 - 3 of 9 - disclaimer: subject to change without notice ? 201 4 triquint www.triquint.com device characterization data 5 10 15 20 25 30 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 gain (db) frequency (ghz) de - embedded gain v dd = +5v temp=+25 ? c 0 1.0 1.0 -1.0 10.0 10.0 -10.0 5.0 5.0 -5.0 2.0 2.0 -2.0 3.0 3.0 -3.0 4.0 4.0 -4.0 0.2 0.2 -0.2 0.4 0.4 -0.4 0.6 0.6 -0.6 0.8 0.8 -0.8 11 swp max 6ghz swp min 0.01ghz s(1,1) 0 1.0 1.0 -1.0 10.0 10.0 -10.0 5.0 5.0 -5.0 2.0 2.0 -2.0 3.0 3.0 -3.0 4.0 4.0 -4.0 0.2 0.2 -0.2 0.4 0.4 -0.4 0.6 0.6 -0.6 0.8 0.8 -0.8 22 swp max 6ghz swp min 0.01ghz s(2,2) s - parameters test conditions: v dd = +5 ? v, i dd =50?ma , t=+25 ? c, 50 ohm system, calibrated to device leads freq ( m hz) s11 (db) s11 (ang) s21 (db) s21 (ang) s12 (db) s12 (ang) s22 (db) s22 (ang) 50 - 10.60 - 165.03 18.97 169.37 - 28.21 3.31 - 20.93 - 16.62 100 - 9.49 175.55 18.25 174.21 - 28.93 7.02 - 18.17 - 16.66 200 - 10.87 147.24 19.40 177.58 - 27.58 15.94 - 20.08 - 53.04 400 - 17.37 131.91 20.53 160.55 - 26.03 13.26 - 35.69 161.57 800 - 19.08 - 162.95 19. 71 130.50 - 25.55 10.38 - 18.59 54.50 1000 - 16.31 - 155.70 18.89 118.70 - 25.42 10.64 - 17.17 35.91 1200 - 14.56 - 155.11 18.10 108.64 - 25.21 11.47 - 16.62 16.88 1500 - 13.21 - 157.04 16.88 94.87 - 24.85 13.11 - 15.65 - 9.94 1900 - 12.17 - 158.41 15.32 79.10 - 24.31 1 3.69 - 14.06 - 43.51 2000 - 11.91 - 158.36 14.97 75.77 - 24.10 13.71 - 13.59 - 50.29 2200 - 11.68 - 157.13 14.26 68.76 - 23.87 13.48 - 12.60 - 62.64 2500 - 11.30 - 155.40 13.24 59.49 - 23.35 12.97 - 11.28 - 75.63 2600 - 11.2 3 - 154.34 12.9 2 56.5 3 - 23.20 12.81 - 10.96 - 79. 40 3000 - 11.03 - 150.07 11.67 45.14 - 22.54 11.37 - 9.77 - 89.57 3500 - 11.47 - 147.07 10.53 31.94 - 21.61 7.86 - 9.39 - 100.67 4000 - 13.13 - 160.94 9.56 16.71 - 20.66 1.90 - 10.56 - 116.49
tq p3m900 5 high linearity lna gain block datasheet rev . e 0 5 - 0 7 - 1 4 - 4 of 9 - disclaimer: subject to change without notice ? 201 4 triquint www.triquint.com tqp3m900 5 - pcb evaluation board c2 100 pf j1 rf input c6 18 pf j2 rf output c1 0.1 uf c3 4.7 uf backside paddle ground l2 33 nh u1 vdd notes: 1. see pc board layout in appl ications section for more information. 2. components shown on the silkscreen but not on the schematic are not used. 3. b1 (0 jumper) may be replaced with copper trace in the target application layout. 4. all components are of 0603 size unless stated on the schem atic. 5. c6 and l2 value are critical for linearity performance. bill of material ? tqp3m9005 - pcb reference des. value description manufacturer part number u1 n/a high linearity lna gain block triquint tqp3m9005 c2 100 pf cap, chip, 0603, 50v, npo, 5% various c6 18 pf cap, chip, 0603, 50v, npo, 5% various c1 0.1 uf cap, chip, 0603, 16v, x7r, 10% various l2 33 nh ind, chip, 0603, 5% various c3 4.7 uf cap, chip, 0603, 6.3v, x5r, 20% various b1 0 res, chip, 0603, 1/16w, 5% various l1, d1, c4 do not place various typical performance ? tqp3m900 5 - pcb test conditions unless otherwise noted: v dd =+5 ? v, i dd = 50? ma, temp = +25 ? c, 50 system. parameter typical value units frequency 500 900 1900 2700 3500 4000 mhz gain 22.8 22.3 20.6 19.0 1 7.6 16.0 db input return loss 10 12 16 18 10 7.3 db output return loss 9.5 12 17 13 12.4 14 db output p1db +20.9 +19.7 +19.9 +19.4 +19.7 +18.5 dbm oip3 +37.5 +37.6 +36 +35.3 +34.7 +33.7 dbm noise figure 1.1 1.1 1.3 1.6 2 2.5 db notes: 1. oip3 measured with two tones at an output power of +2 dbm / tone separated by 1 mhz. 2. noise figure data shown in the table above is corrected for pcb losses of 0.11 db at 0.5 ghz, board loss of 0.08 ?db at 0.9 ghz, board loss of 0.13?db at 1.9 ghz, board loss of 0.14?db at 2.1 ghz and board loss of 0.17db at 2.6 ghz.
tq p3m900 5 high linearity lna gain block datasheet rev . e 0 5 - 0 7 - 1 4 - 5 of 9 - disclaimer: subject to change without notice ? 201 4 triquint www.triquint.com performance plots ? tqp3m900 5 - pcb t est conditions unless otherwise noted: v dd =+5 ? v, i dd =85 ? ma, temp=+25 ? c, 50 system. n oise figure plot has been corrected for evaluation board loss of 0.13 db at 1.9 ghz. 6 8 10 12 14 16 18 20 22 24 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 gain (db) frequency (ghz) gain vs. frequency +85 c +25 c ?40 c vcc = 5v - 25 - 20 - 15 - 10 - 5 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 input return loss (db) frequency (ghz) input return loss vs. frequency +85 c +25 c ?40 c vcc = 5v - 25 - 20 - 15 - 10 - 5 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 output return loss (db) frequency (ghz) output return loss vs. frequency +85 c +25 c ?40 c vcc = 5v 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0.5 1.0 1.5 2.0 2.5 3.0 nf (db) frequency (ghz) noise figure vs. frequency vcc = 5 v +85 c +25 c ?40 c 25 30 35 40 0 2 4 6 8 10 oip3 (dbm) output power (dbm) oip3 vs. output power/tone freq. = 900 mhz 1mhz tone spacing vcc = 5v +85 c +25 c ?30 c ?40 c 25 30 35 40 0 2 4 6 8 10 oip3 (dbm) output power/tone (dbm) oip3 vs. output power/tone freq. = 1900 mhz 1 mhz tone spacing vcc = 5v +85 c +25 c ?30 c ?40 c 25 30 35 40 0.5 1.0 1.5 2.0 2.5 oip3 (dbm) frequency (ghz) oip3 vs. frequency 1 mhz tone spacing temp. = 25 o c vcc = 5v 20 21 22 23 24 - 40 - 20 0 20 40 60 80 p1db (dbm) temperature ( c) p1db vs. temperature 1900 mhz 900 mhz vcc = 5v 25 30 35 40 3.0 3.3 3.5 3.8 4.0 4.3 4.5 4.8 5.0 oip3 (dbm) vdd(v) oip3 vs. vdd pout per tone = 2dbm 900mhz 1900 mhz 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.0 3.3 3.5 3.8 4.0 4.3 4.5 4.8 5.0 nf (db) vdd (v) noise figure vs. vdd 1900 mhz 900 mhz 40 42 44 46 48 50 3.0 3.3 3.5 3.8 4.0 4.3 4.5 4.8 5.0 idd (ma) vdd (v) idd vs. vdd 15 17 19 21 23 25 3.0 3.3 3.5 3.8 4.0 4.3 4.5 4.8 5.0 p1db (dbm) vdd (v) p1db vs. vdd 900mhz 1900 mhz
tq p3m900 5 high linearity lna gain block datasheet rev . e 0 5 - 0 7 - 1 4 - 6 of 9 - disclaimer: subject to change without notice ? 201 4 triquint www.triquint.com tqp3m9005 low frequency performance test conditions unless otherwise noted: v dd =+5 ? v, i dd = 50? ma, temp = +25 ? c, 50 system. param eter typical value units schematic frequency 50 100 200 mhz c2 0.01 uf j1 rf input c6 0.01 uf j2 rf output c1 0.1 uf c3 4.7 uf backside paddle ground l2 560 nh u1 vdd gain 18.9 18.3 19.4 db input return loss 10 9.7 11.5 db output return loss 16 18 22 db output p1db +18.7 +19.45 + 21.4 dbm oip3 +29.2 + 29.7 + 27.5 dbm noise figure 6.6 5.1 2.9 db no tes: 1. oip3 measured with two tones at an output power of +2 dbm / tone separated by 1 mhz. low frequency performance plots test conditions unless otherwise noted: v dd =+5 ? v, i dd = 50 ? ma, temp = +25 ? c, 50 system. 15 16 17 18 19 20 21 22 0 100 200 300 400 500 gain (db) frequency (mhz) gain vs. frequency temp. = +25 c - 30 - 25 - 20 - 15 - 10 - 5 0 0 100 200 300 400 500 s11 (db) frequency (mhz) return loss vs. frequency s11 s22 temp. = +25 c 15 16 17 18 19 20 21 22 23 20 40 60 80 100 120 140 160 180 200 p1db (dbm) frequency (mhz) p1db vs. frequency temp. = +25 c 15 20 25 30 35 20 40 60 80 100 120 140 160 180 200 oip3 (dbm) frequency (mhz) oip3 vs. frequency temp. = +25 c 0 1 2 3 4 5 6 7 8 9 10 40 60 80 100 120 140 160 180 200 nf (db) frequency (mhz) noise figure vs. frequency temp. = +25 c
tq p3m900 5 high linearity lna gain block datasheet rev . e 0 5 - 0 7 - 1 4 - 7 of 9 - disclaimer: subject to change without notice ? 201 4 triquint www.triquint.com pin configuration and description 7 8 6 5 14 13 15 16 12 11 10 9 1 2 3 4 backside pad - rf/dc gnd pin 1 reference mark n/c rf in n/c n/c n/c rf out / v dd n/c n/c n/c n/c n/c n/c n/c n/c n/c n/c top view pin no. label description 2 rf input input, matched to 50 ohms. external dc block is required. 11 vdd / rfout output, matched to 50 ohms, external dc b lock is required and supply voltage . all other pins n/c no internal connection. provide grounded pads on pcb land pattern for optimal isolation and mounting integrity. . backside pad rf/dc gnd backside pad . multiple vias should be employed to minimize i nductance and thermal resistance; see pcb mounting pattern in mechanical information section. evaluation board pcb information triquint pcb 107 6342 material and stack - up 1 oz. cu bottom layer nelco n-4000-13 core nelco n-4000-13 1 oz. cu top layer 1 oz. cu inner layer 1 oz. cu inner layer 0.062" 0.006" finished board thickness 0.014" 0.014" 5 0 ohm line dimensions : width = .0 29, spacing = .035
tq p3m900 5 high linearity lna gain block datasheet rev . e 0 5 - 0 7 - 1 4 - 8 of 9 - disclaimer: subject to change without notice ? 201 4 triquint www.triquint.com package marking and dimensions package marking: part number ? 900 5 year, week code - yyww assembly code ? axxxx top view side view bottom view 3.000.05 3.000.05 .20 ref. 0.000-0.050 pin #1 identification chamfer 0.300 x 45 1.700.05 exp.dap 0.230.05 0.50 bsc 1.50 ref. 1.700.05 exp.dap 0.850.05 pin 1 locator gnd/thermal pad 0.380.05 n otes : 1. all dimensions are in millimeters. angles are in degrees. 2. dimension and tolerance formats conform to asme y14.4m - 1994. 3. the terminal #1 identifie r and terminal numbering conform to jesd 95 - 1 spp -012. 4. contact plating: nipdau pcb mounting pattern package outline 0.31 0.09 0.55 0.32 0.64 pin 1 locator component side 7x 1 16x 0.32 0.50 pitch 16x 16x 0.52 1.50 1.50 n otes : 1. all dimensions are in millimeters. angles are in degrees. 2. use 1 oz. copper minimum for top and bottom layer metal. 3. vias are required und er the backside paddle of this device for proper rf/dc grounding and thermal dissipation. 4. we recommend a 0.35mm (#80/.0135") diameter bit for drilling via holes and a final plated thru diameter of 0.25 mm (0.10). 5. ensure good package backside paddle s older attach for best electrical and thermal performance. 9005 yyww axxxx
tq p3m900 5 high linearity lna gain block datasheet rev . e 0 5 - 0 7 - 1 4 - 9 of 9 - disclaimer: subject to change without notice ? 201 4 triquint www.triquint.com product compliance information esd sensitivity ratings caution! esd - sensitive device esd rating: class 1 a value: 250v to < 500 v test: human body model (hbm) standard: jedec standard js - 001 - 2012 esd rating: class c3 value: 1000 v test: charged device model (cdm) standard: jedec standard jesd22 - c101 f solderability compatible with both lead - free (260c maximum reflow temperature) and tin/lead (245c m aximum reflow temperature) soldering processes. contact plating: nipdau rohs compliance this part is compliant with eu 2002/95/ec rohs directive (restrictions on the use of certain hazardous substances in electrical and electronic equipment). this pr oduct also has the following attributes: ? lead free ? halogen free (chlorine, bromine) ? antimony free ? tbbp - a (c 15 h 12 br 4 0 2 ) free ? pfos free ? svhc free msl rating msl rating: level 1 test: 260c convection reflow standard: jedec standard ipc/jedec j - std - 020 contact information for the latest specifications, additional product information, worldwide sales and distribution locations, and information about triquint: web: www.triquint.com tel: +1.503.615.9000 e mail: info - sales@t riquint .com fax: +1.503.615.8902 for technical questions and application information: email: sjcapplications.engineering@ triqui nt .com important notice the information contained herein is believed to be reliable. triquint makes no warranties regarding the information contained herein. triquint assumes no responsibility or liability whatsoever for any of the information con tained herein. triquint assumes no responsibility or liability whatsoever for the use of the information contained herein. the information contained herein is provided "as is, where is" and with all faults, and the entire risk associated with such inform ation is entirely with the user. all information contained herein is subject to change without notice. customers should obtain and verify the latest relevant information before placing orders for triquint products. the information contained herein or an y use of such information does not grant, explicitly or implicitly, to any party any patent rights, licenses, or any other intellectual property rights, whether with regard to such information itself or anything described by such information. triquint pr oducts are not warranted or authorized for use as critical components in medical, life - saving, or life - sustaining applications, or other applications where a failure would reasonably be expected to cause severe personal injury or death.
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