july 2007 rev 3 1/7 AN1229 application note sd2932 rf mosfet for 300 w fm amplifier introduction this application note gives a description of a broadband power amplifier operating over the frequency range 88 - 108 mhz using the new stmicroelectronics rf mosfet transistor sd2932. table 1. typical achievable performances parameter performance device 1 x sd2932 frequency 88-108 mhz vdd 50 v idq 200 ma pout 300 w gain >19 db input return loss < -11 db drain efficiency >70% www.st.com
amplifier design AN1229 2/7 1 amplifier design 1.1 input matching network typical input gate-to-gate impedance of sd2932 at 100 mhz is zin = rs + jxs = 2 - 2.6 j, and can also be expressed as the combination of parallel resistance and reactance using the following formulas: equation 1 equation 2 therefore, in order to achieve good input matching performances over the frequency range 88-108 mhz the unbalanced 50 ? is to be transformed into an impedance with a value as close as possible to rp of 5.38 ? . from the circuit schematic given in figure 6 , we can see that the input matching network is based on a two section balun (1:1 balun in cascade with a 9:1 balun transformer) which transforms the unbalanced 50 ? to a balanced 5.56 ? (2 x 2.78 ? / 9:1 ratio). the first section, a 5" long - 50 ? coaxial cable and the second section, a two 3.9" long - 25 ? flexible coaxial cables with ferrite core neoside, are connected as described: a 10 nh inductor (l1) is connected between the two gates to compensate sd2932 input parallel reactance xp. 1.2 input matching network tuning figure 1. input impedance of 1:1 balun in cascade with 4:1 balun rp rs 1 xs rs ------- ?? ?? 2 + ? 5.38 ? = = x p r p x s r s ------- ?? ?? ? 4.14j ? ? = = 0 50 100 150 200 250 300 350 frequency (mhz) -35 -30 -25 -20 -15 -10 s11 (db)
AN1229 amplifier design 3/7 figure 2. input impedance of 1:1 balun in cascade with 9:1 balun sd2932 input matching network was tuned in order to achieve the best compromise in terms of power gain (gp) and input return loss (rtl) over the frequency range 88 - 108 mhz. best results were achieved by adding a 10 pf chip capacitor (c1) between rfin and the 1 nf blocking capacitor (c2). 1.3 output matching network the output impedance of each side is a combination of the output capacitance coss ( 195 pf) and the optimum load resistance which can be determined as follows: equation 3 the total optimum load, seen by sd2932 (drain to drain), is 2 x 6.02 = 12.04 ? . therefore, a simple two section balun (1:1 balun in cascade with a 4:1 balun transformer) is used to transform the unbalanced 50 ? to a balanced 12.5 ? (2 x 6.25 ? ) which is very near to the total optimum load resistance. the first section, a 5" long - 50 ? flexible coaxial cable, and the second section, two 5" long - 25 ? flexible coaxial cables, are connected as described in figure 6 . to compensate for the output capacitance co ss of sd2932 , a 40 nh inductor (l2) is connected between the two drains. this lc network (l2 & coss) is a high pass filter with a resonance frequency calculated at 10 % below the minimum operating frequency: equation 4 equation 5 equation 6 0 50 100 150 200 250 300 350 frequency (mhz) -35 -30 -25 -20 -15 -10 -5 0 s11 (db) rp 0.85 vdd ? () 2 2 pout ? ------------------------------------ - 0.85 2500 ? 2 150w ? ------------------------------ - 6.02 ? = = = c oss c oss 2 -------------- - = 180pf 2 ----------------- 90pf = = (per side) frequency of resonance 0.9 88mhz 80mhz = ? = l2 coss 2 pi f ? ? () ? ? 2 1 l2 44nh = =
amplifier design AN1229 4/7 figure 3. power gain vs. frequency figure 4. drain efficiency vs. frequency figure 5. drain efficiency vs. frequency 85 90 95 100 105 110 frequency (mhz) 17 18 19 20 21 22 power gain (db) pout = 300w vdd = 50v idq = 200 ma 85 90 95 100 105 110 frequency (mhz) 60 62 64 66 68 70 72 74 76 78 80 drain efficiency (%) pout = 300w vdd = 50v idq = 200 ma 85 90 95 100 105 110 frequency (mhz) -20 -18 -16 -14 -12 -10 -8 -6 -4 -2 0 return loss - rtl (db) pout = 300w vdd = 50v idq = 200 ma
AN1229 sd2932 typical performances and conclusion 5/7 2 sd2932 typical performances and conclusion figure 3 , figure 4 and figure 5 show power gain, efficiency and input return loss over the frequency range 88 - 108 mhz at a constant output power of 300 w and a drain supply voltage of 50 v and a quiescent current of 200 ma. typical performances are as follows: finally, in this report we have demonstrated st?s sd2932 mosfet transistor excellent performance as a wideband 300 w - 50 v push-pull amplifier for fm applications. figure 6. 88-108 mhz circuit schematic table 2. typical performances parameters min max gp 19.3 db 19.6 db r tl -18 db -11 db eff 71% 73% table 3. 88-108 mhz circuit components list symbol description pcb 1/32? woven fiberglass 0.0030 cu, 2 side, er t1 50 ? flexible coax cable od 0.006?, 5? long t2/ t3 9:1 transformer, 25 ? flexible coax cable od 0.1? 3.9?. ferrite core neoside t4 / t5 4:1 transformer, 25 ? flexible coax cable od 0.1? 5.0? long. t6 50 ? flexible coax cable od 0.1? 5.0? long. fb1 vk200 c1 10 pf ceramic capacitor c2/c3/c4/c7/c8 1 nf chip capacitor c5/c6 1 nf atc chip capacitor
revision history AN1229 6/7 3 revision history c9 470 pf atc chip capacitor c10 100 nf chip capacitor r1 56 ? resistor r2/r4 10 ? chip resistor r3 10 k ? resistor r5 5.6 k ? resistor r6 10k ? 10 turn trim resistor r7 3.3 k ? / 1 w resistor r8 15 ? / 1 w resistor d1 6.8 v zener diode l1 10 nh inductor l2 40 nh inductor l3 70 nh inductor table 3. 88-108 mhz circuit components list (continued) symbol description table 4. revision history date revision changes 21-jun-2006 2 minor text changes 30-jul-2007 3 the document has been reformatted
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