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| geometry process details principal device types cmlm0305 cmldm7003 cmpdm7003 ctldm7003-m621 gross die per 6 inch wafer 51,400 process CP354X small signal mosfet transistor n-channel enhancement-mode transistor chip process epitaxial planar die size 21.7 x 21.7 mils die thickness 5.5 mils gate bonding pad area 4.7 x 4.7 mils source bonding pad area 4.7 x 10.2 mils top side metalization al-si - 37,000? back side metalization au - 12,000? www.centralsemi.com r2 (22-march 2010)
process CP354X typical electrical characteristics www.centralsemi.com r2 (22-march 2010) |
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