cystech electronics corp. spec. no. : c814y3 issued date : 2012.05.15 revised date : 2012.05.17 page no. : 1/8 MTN003N02Y3 cystek product specification 20v n-channel enhancement mode mosfet MTN003N02Y3 features ? simple drive requirement ? small package outline ? pb-free package symbol outline absolute maximum ratings (ta=25 c) parameter symbol limits unit drain-source voltage v ds 20 gate-source voltage v gs 8 v continuous drain current @ t a =25 c, v gs =4.5v (note 3) 560 continuous drain current @ t a =85 c, v gs =4.5v (note 3) i d 400 ma pulsed drain current (notes 1, 2) i dm 2.5 a t a =25 150 maximum power dissipation (note 3) t a =85 p d 80 mw esd susceptibility 2000 (note 4) v operating junction and storage temperature tj, tstg -55~+150 c note : 1. pulse width limited by maximum junction temperature. 2. pulse width 300 s, duty cycle 2%. 3.surface mounted on fr-4 board. 3. human body model, 1.5k in series with 100pf MTN003N02Y3 sot-723 bv dss 20v i d 560ma r dson @v gs =4v, i d =300ma 290m (typ) r dson @v gs =2.5v,i d =300ma 440m (typ) r dson @v gs =1.8v,i d =300ma 845m (typ) d g gate s source d drain s g
cystech electronics corp. spec. no. : c814y3 issued date : 2012.05.15 revised date : 2012.05.17 page no. : 2/8 MTN003N02Y3 cystek product specification thermal performance parameter symbol limit unit thermal resistance, j unction-to-ambient(pcb mounted) rth,ja 833 c/w electrical characteristics (tj=25 c, unless otherwise noted) symbol min. typ. max. unit test conditions static bv dss 20 - - v v gs =0, i d =250 a ? bv dss / ? tj - 0.02 - v/ c reference to 25c, i d =1ma v gs(th) 0.5 0.92 1.2 v v ds =10v, i d =1ma i gss - - 10 v gs = 8v, v ds =0 - - 1 v ds =20v, v gs =0 i dss - - 10 a v ds =16v, v gs =0 (tj=70 c) - 290 400 v gs =4v, i d =300ma - 440 600 v gs =2.5v, i d =300ma *r ds(on) - 845 1200 m v gs =1.8v, i d =300ma *g fs - 0.9 - s v ds =10v, i d =300ma dynamic ciss - 60 - coss - 14 - crss - 9 - pf v ds =10v, v gs =0, f=1mhz t d(on) - 5 - t r - 5 - t d(off) - 24 - t f - 18 - ns v ds =10v, i d =150ma, v gs =4v r g =10 qg - 0.76 - qgs - 0.074 - qgd - 0.27 - nc v ds =10v, i d =250ma, v gs =4.5v source-drain diode *v sd - 0.75 1.2 v v gs =0v, i s =100ma *pulse test : pulse width 300 s, duty cycle 2% ordering information device package shipping marking MTN003N02Y3 sot-723 (pb-free package) 8000 pcs / tape & reel qt
cystech electronics corp. spec. no. : c814y3 issued date : 2012.05.15 revised date : 2012.05.17 page no. : 3/8 MTN003N02Y3 cystek product specification typical characteristics typical output characteristics 0.0 0.5 1.0 1.5 2.0 2.5 3.0 012345 v ds , drain-source voltage(v) i d , drain current (a) v gs =2.5v 5v, 4.5v, 4v, 3.5v v gs =1v v gs =1.5v v gs =2v v gs =3v brekdown voltage vs ambient temperature 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) bv dss , normalized drain-source breakdown voltage i d =250 a, v gs =0v static drain-source on-state resistance vs drain current 0 200 400 600 800 1000 1200 1400 1600 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) v gs =4.5v v gs =2.5v v gs =1.8v reverse drain current vs source-drain voltage 0 0.2 0.4 0.6 0.8 1 0 0.2 0.4 0.6 0.8 1 i dr , reverse drain current (a) v sd , source-drain voltage(v) tj=25c tj=150c v gs =0v static drain-source on-state resistance vs gate-source voltage 0 100 200 300 400 500 600 700 800 024681 0 drain-source on-state resistance vs junction tempearture 0.6 0.8 1 1.2 1.4 1.6 -60 -20 20 60 100 140 180 tj, junction temperature(c) r ds( on) , normalized static drain- source on-state resistance v gs =4.5v, i d =300ma v gs =1.8v, i d =300ma v gs =2.5v, i d =300ma v gs , gate-source voltage(v) r ds(on) , static drain-source on- state resistance(m) i d =300ma
cystech electronics corp. spec. no. : c814y3 issued date : 2012.05.15 revised date : 2012.05.17 page no. : 4/8 MTN003N02Y3 cystek product specification typical characteristics(cont.) capacitance vs drain-to-source voltage 1 10 100 0.1 1 10 100 v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss threshold voltage vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 1.6 -60 -40 -20 0 20 40 60 80 100 120 140 160 tj, junction temperature(c) v gs( th) , normalized threshold voltage i d =250 a single pulse power rating, junction to ambient (note on page 2) 0 2 4 6 8 10 0.001 0.01 0.1 1 10 100 pulse width(s) power (w) t j( max) =150c t a =25c r ja =833c/w gate charge characteristics 0 2 4 6 8 10 00.511.5 qg, total gate charge(nc) v gs , gate-source voltage(v) 2 v ds =10v i d =250ma maximum safe operating area 0.001 0.01 0.1 1 10 0.01 0.1 1 10 100 v ds , drain-source voltage(v) i d , drain current (a) dc 10ms 100m 1ms 100 s t a =25c, tj=150c, v gs =4.5v, r ja =833c/w single pulse maximum drain current vs junctiontemperature 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 25 50 75 100 125 150 175 tj, junction temperature(c) i d , maximum drain current(a) t a =25c, v gs =4.5v, r ja =833c/w
cystech electronics corp. spec. no. : c814y3 issued date : 2012.05.15 revised date : 2012.05.17 page no. : 5/8 MTN003N02Y3 cystek product specification typical characteristics(cont.) typical transfer characteristics 0 1 2 3 4 5 6 0123456 v gs , gate-source voltage(v) i d , drain current (a) v ds =5v power derating curve 0 0.05 0.1 0.15 0.2 0 20 40 60 80 100 120 140 160 t a , ambient temperature() p d , power dissipation(w) mounted on fr-4 board forward transfer admittance vs drain current 0.01 0.1 1 10 0.001 0.01 0.1 1 i d , drain current(a) g fs , forward transfer admittance(s) ta=25c pulsed v ds =10 v v ds =5v transient thermal response curves 0.001 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 1.e+03 t 1 , square wave pulse duration(s) normalized transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r ja (t)=r(t)*r ja 2.duty factor, d=t 1 /t 2 3.t jm -t a =p dm *z ja (t) 4. r ja =833 c/ w
cystech electronics corp. spec. no. : c814y3 issued date : 2012.05.15 revised date : 2012.05.17 page no. : 6/8 MTN003N02Y3 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c814y3 issued date : 2012.05.15 revised date : 2012.05.17 page no. : 7/8 MTN003N02Y3 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 5 +1/-1 seconds 260 +0/-5 c recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of t he package, measured on the package body surface.
cystech electronics corp. spec. no. : c814y3 issued date : 2012.05.15 revised date : 2012.05.17 page no. : 8/8 MTN003N02Y3 cystek product specification sot-723 dimension marking: qt style: pin 1.gate 2.source 3.drain 3-lead sot-723 plastic surface mounted package cystek package code: y3 *typical millimeters inches millimeters inches dim min. max. min. max. dim min. max. min. max. a 0.000 0.500 0.000 0.020 d 1. 150 1.250 0.045 0.049 a1 0.000 0.050 0.000 0.002 e 1.150 1.250 0.045 0.049 b 0.170 0.270 0.007 0.011 e1 0.750 0.850 0.030 0.033 b1 0.270 0.370 0.011 0.015 e 0.800* 0.031* c 0.000 0.150 0.000 0.006 7 ref 7 ref notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitable for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .
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