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primary side regulation off - line pwm control lers with integrated power mosfet str 5a100d series str 5a100d - ds rev. 1.2 sanken electric co.,ltd. 1 dec. 25, 2013 general descriptions the str 5a100d series is power ic with primary side regulation for switching power supplies, incorporating a sense mosfet and a current mode pwm controller ic. employing the primary side regulation, the product achie ves power supply systems with few external components. including a startup circuit and a standby function in the controller, the product achieves the low standby power by the automatic switching between the pwm operation in normal operation and the burst - o scillation under light load conditions. the rich set of protection features helps to realize low component counts, and high performance - to - cost power supply. features ? primary side regulation ? constant voltage (cv), constant current (cc) control ? auto standb y function no load power consumption < 3 0mw ? operation mode ? normal operation -------------------------- pwm mode ? light load operation ---------------------- green - mode ? standby ------------------------- burst oscillation mode ? build - in startup circuit (reducing power consumption at standby operation, shortening the startup time) ? current mode type pwm control ? random switching function ? leading edge blanking function ? soft start function (reducing the stress of power mosfet and secondary side rectifier diode at startup) ? protections overcurrent protection (ocp) ------------ pulse - by - pulse overvoltage protection (ovp) ------------- auto - restart thermal shutdown protection (tsd) ----- auto - restart typical application circuit package dip8 not to scale lineup ? electrical characteristics v d /st (max.) = 7 30 v f osc(avg) (typ.) = 65 khz products r ds(on) ( max. ) i dlim(h) str5a162d 24.6 ? output power , p out * products adapt e r open frame ac230v ac85 ~265v ac230v ac85 ~265v str5a162d 4 w 3.5 w 5 w 4.5 w STR5A164D 6.0 w 5.5 w 8.5 w 7 w * the e i - 16 core of transformer is assumed. the output power is based on the thermal ratings, and the peak output power can be 120 to 140 % of the value stated here. at low output voltage, small core and short on duty, the output power may be less than the value stated here. applications ? white goods ? other smps http://www.sanken - ele.co.jp 1 5 6 7 8 4 2 f b v c c d / s t s / g n d s / g n d c o m p s / g n d v a c c 1 r 1 d 1 t 1 d p c 5 c 4 c 3 r 6 r 3 r 5 d 2 b r 1 c o m p s / g n d v c c n c f b d / s t s / g n d s / g n d 8 7 6 5 s t r 5 a 1 0 0 d u 1 1 2 4 r 2 l 1 c 2 r 4 d 5 0 s 1 v o u t g n d c 5 2 c 5 1 r 5 1 c 6 r 7 r 5 2
str 5a100d series str 5a100d - ds rev. 1.2 sanken electric co.,ltd. 2 dec. 25, 2013 contents general descriptions -------------------------------- -------------------------------- ------- 1 1. absolute maximum ratings -------------------------------- ------------------------- 3 2. recommended operating conditions -------------------------------- ------------- 3 3. electrical cha racteristics -------------------------------- ---------------------------- 3 4. performance curves -------------------------------- -------------------------------- -- 5 5. functional block diagram -------------------------------- --------------------------- 6 6. pin configuration defi nitions -------------------------------- ----------------------- 6 7. typical application circuit -------------------------------- ------------------------- 6 8. package outline -------------------------------- -------------------------------- -------- 7 9. marking diagram -------------------------------- -------------------------------- ----- 7 10. operational description -------------------------------- ------------------------------ 8 10.1 startup operation -------------------------------- ---------------------------- 8 10.2 undervoltage lockout (uvlo) -------------------------------- ----------- 8 10.3 auxiliary winding -------------------------------- ---------------------------- 8 10.4 soft start function -------------------------------- --------------------------- 9 10.5 primary side regulation (psr) -------------------------------- ----------- 9 10.6 constant voltage (cv) control -------------------------------- ---------- 10 10.7 constant current (cc) control -------------------------------- ---------- 10 10.8 leading edge blanking function -------------------------------- -------- 11 10.9 random switching function -------------------------------- -------------- 11 10.10 auto standby function -------------------------------- --------------------- 11 10.11 overcurrent protection function (ocp) ------------------------------- 11 10.12 overvoltage protection (ovp) -------------------------------- ------------ 12 10.13 thermal sh utdown protection (tsd) -------------------------------- --- 12 11. design notes -------------------------------- -------------------------------- ----------- 12 11.1 external components -------------------------------- ----------------------- 12 11.2 pcb trace layout and component placement ----------------------- 15 12. pa ttern layout example -------------------------------- ---------------------------- 17 13. reference design of power supply -------------------------------- --------------- 18 operating precautions -------------------------------- ------------------------ 20 important notes -------------------------------- -------------------------------- --- 21
str 5a100d series str 5a100d - ds rev. 1.2 sanken electric co.,ltd. 3 dec. 25, 2013 1. absolute maximum ratings ? the polarity value for current specifies a sink as "+," and a source as "?," referencing the ic. ? unless otherwise specified, t a is 25 c, 5 pin = 6 pin = 7 pin parameter symbol test conditions pins rating units notes fb pin voltage v fb 1 C fb single pulse 1 C ? cc 2 C ? d/st pin voltage v d/st 4 C ? dp positive: single pulse negative : within 2s of pulse width 4 C ? ? comp 8 C ? (1) p d (2) C op C ? stg C ? j C (1) refer to mosfet temperature versus power dissipation curve (2) when embedding this hybrid ic onto the printed circuit board (cupper area in a 15mm15mm) 2. recommend ed operating conditions recommended operating conditions means the operation conditions maintained normal function shown in electrical characteristics. parameter symbol min. max. units notes d/st pin voltage in operation v d/st(op) ? cc(op) 11 27 v 3. electrical characteristics ? the polarity value for current specifies a sink as "+," and a source as "?," referencing the ic. ? unless otherwise specified, t a is 25 c, v d/st = 1 0 v , pin = 6 pin = 7 pin parameter symbol test conditions pins min. typ. max. units notes power supply startup operation operation start voltage v cc(on) 2 C cc(off) 2 C cc(on) v cc = 12 v 2 C C C startup v cc = 13.5 v 4 C startup v cc = 13.5 v v d/st = 100 v 2 C ? ? ? pwm operation average switching frequency f osc(avg) v comp = 5.5 v 4 C khz frequency modulation deviation 4 C C C
str 5a100d series str 5a100d - ds rev. 1.2 sanken electric co.,ltd. 4 dec. 25, 2013 parameter symbol test conditions pins min. typ. max. units notes feedback reference voltage v fb(ref) 1 C 5 2.45 2.50 2.55 v feedback current v fb( op ) v fb = 2.4 v 1 C 5 ? 2.4 ? 0.8 ? a minimum sampling time t fbms 1 C 5 C C 2.2 s standby operation threshold voltage v stbop 8 C 5 1.7 2.3 3.1 v 5 a16 2d 1.3 2.0 2.7 v 5 a16 4d standby operation cycle t stbop 4 C 5 C 1.3 C ms maximum on duty d max 4 C 5 50 57 64 % comp pin sink current i comp(si) v comp = 5.5 v 8 C 5 C 4.5 C a comp pin source current i comp(so) v comp = 2.5 v 8 C 5 C C 4.5 C a error amplifier conductance gm v fb = 2.4v to 2.6v C C 16 C s protection function leading edge blanking time (1) t bw C C 250 C ns drain current limit compensation on duty (1) d dpc C C 27 C % drain current limit ( on duty 27 % ) i dlim(h) 4 C 5 0.250 0.285 0.320 a 5 a16 2d 0.36 0.41 0.46 a 5 a16 4d drain current limit (on duty = 0 %) i dlim(l) 4 C 5 0.210 0.242 0.280 a 5 a16 2d 0.29 0.34 0.39 a 5 a16 4d ovp threshold voltage v cc(ovp) 2 C 5 27.5 29. 3 31.3 v c onstant c urrent control delay time t ccd 4 C 5 C 90 C ms thermal shutdown operating temperature (1) t j(tsd) C 135 C C c thermal shutdown hysteresis (1) t j(tsdhys) C C 70 C c power mosfet drain leakage current i dss t j = 125 c v d/st = 584 v 4 C 5 C C 50 a on resistance r ds(on) i d = 28.5 m a 4 C 5 C 21.0 24.6 5 a16 2d i d = 41 m a 4 C 5 C 11 13 5 a16 4d switching time t f 4 C 5 C C 250 ns thermal characteristics thermal resistance junction to frame (1)(2) j - f C C C 20 c/w thermal resistance junction to case (1)(3) j - c C C C 24 c/w (1) design assurance (2) frame temperature (t f ) measured at the root of the 6 pin (s/gnd) (3) case temperature (t c ) measured at the center of the case top surface
str 5a100d series str 5a100d - ds rev. 1.2 sanken electric co.,ltd. 5 dec. 25, 2013 4. performance curves 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 0 25 50 75 100 125 150 allowable power dissipation, p d ( w ) ambient temperature, t a ( c) 1.53 figure 4 - 3 ambient temperature versus power dissipation curve figure 4 - 2 str5a162d transient thermal resistance curve time (s) transient thermal resistance j - c ( c ) figure 4 - 2 STR5A164D transient thermal resistance curve time (s) transient thermal resistance j - c ( c )
str 5a100d series str 5a100d - ds rev. 1.2 sanken electric co.,ltd. 6 dec. 25, 2013 5. functional block diagram 6. pin configuration definitions pin name descriptions 1 fb input of constant voltage control signal 2 vcc power supply voltage input for control part and input of overvoltage protection (ovp) signal 3 C (pin removed) 4 d/st mosfet drain and i nput of startup current 5 s /gnd mosfet source and g round 6 7 8 comp input of phase compensation 7. typical application circuit 1 5 6 7 8 4 2 fb vcc d / st s / gnd s / gnd comp s / gnd u v l o r e g o v p t s d p w m o s c l e b o c p f e e d b a c k c o n t r o l s q r 4 5 , 6 , 7 2 1 f b v c c d / s t s / g n d d r v p r o t e c t i o n s t a r t u p s / h e / a c o m p 8 v a c c 1 r 1 d 1 t 1 d p c 5 c 4 c 3 r 6 r 3 r 5 d 2 b r 1 c o m p s / g n d v c c n c f b d / s t s / g n d s / g n d 8 7 6 5 s t r 5 a 1 0 0 d u 1 1 2 4 r 2 l 1 c 2 r 4 d 5 0 s 1 v o u t g n d c 5 2 c 5 1 r 5 1 c 6 r 7 r 5 2
str 5a100d series str 5a100d - ds rev. 1.2 sanken electric co.,ltd. 7 dec. 25, 2013 8. package outline dip8 notes: 1) unit : mm (inch) 2) controlling dimensions are in inches; millimeter dimensions are for reference only 3) pb - free. device composition compliant with the rohs directive 9. marking diagram l o t n u m b e r y = l a s t d i g i t o f y e a r ( 0 t o 9 ) m = m o n t h ( 1 t o 9 , o , n o r d ) d = p e r i o d o f d a y s ( 1 t o 3 ) 1 : 1 s t t o 1 0 t h 2 : 1 1 t h t o 2 0 t h 3 : 2 1 s t t o 3 1 s t 1 8 p a r t n u m b e r 5 a 1 d s k y m d s a n k e n c o n t r o l n u m b e r
str 5a100d series str 5a100d - ds rev. 1.2 sanken electric co.,ltd. 8 dec. 25, 2013 10. operational description ? all of the parameter values used in these descriptions are typical values , unless they are specified as minimum or maximum. ? with regard to current direction, "+" indicates sink current (toward the ic) and " C " indicates source current (from the ic). 10.1 startup operation figure 10 - 1 shows the vcc pin peripheral circuit . the ic incorporates the startup circuit. the circuit is connected to d/st pin. when d/st pin voltage reaches to startup circuit operation voltage v startup = 29 v , the startup circuit starts operation. during the startup process, the constant current, i startup = ? 2.1 ma , charges c 4 at vcc pin. when vcc pin voltage increases to v cc(on) = 15. 0 v , the control circuit starts switc hing operation. after switching operation begins, the startup circuit turns off automatically so that its current consumption becomes zero. the approximate startup time of ic, t start , is calculated as follows : ( 1 ) where, t start : startup time of ic in second v cc(int) : initial voltage on vcc pin in v figure 10 - 1 vcc pin peripheral circuit 10.2 undervoltage lockout (uvlo) figure 10 - 2 shows the relationship of vcc pin voltage and circuit current i cc . when v cc pin voltage increases to v cc(on) = 15. 0 v , the control circuit starts switching operation and the circuit current i cc increases. when v cc pin voltage decreases to v cc(off) = 8.1 v , the control circuit stops operation by uvlo (undervoltage lockout) circuit, and reverts to the state before startup. figure 10 - 2 relationship between vcc pin voltage and i cc 10.3 auxiliary winding figure 10 - 3 shows vcc voltage behavior during the startup period. when vcc pin voltage increases to v cc(on) = 15. 0 v at startup, the ic starts the operation. then circuit current increases and vcc pin voltage decreases. since the operation stop voltage v cc(off) = 8.1 v is low, the auxiliary winding voltage reaches to setting value before vcc pin voltage decreases to v cc(off) . thus control circuit continues the operation. the voltage from the auxiliary winding d in figure 10 - 1 becomes a power source to the control circuit in operation. the approximate value of auxiliary winding voltage is about 12 v to 16 v, taking account of the winding turns of d winding so that v cc pin voltage satisfies equation ( 2 ) within the specification of inp ut and output voltage variation of power supply. figure 10 - 3 v cc pin voltage during startup period startup ) int ( cc ) on ( cc start i v v 4 c t ? ? c i r c u i t c u r r e n t , i c c i c c o n v c c o f f v c c o n v c c p i n v o l t a g e s t a r t s t o p i c s t a r t s o p e r a t i o n v c c p i n v o l t a g e v c c ( o n ) v c c ( o f f ) s t a r t u p f a i l u r e s t a r t u p s u c c e s s t a r g e t o p e r a t i n g v o l t a g e t i m e i n c r e a s e w i t h r i s i n g o f o u t p u t v o l t a g e v a c c 2 d 2 r 6 c 4 t 1 d p v c c s / g n d d / s t 4 5 , 6 , 7 2 u 1 v d c 1 l 1 f b 1 r 3 r 4 r 5
str 5a100d series str 5a100d - ds rev. 1.2 sanken electric co.,ltd. 9 dec. 25, 2013 ? cc < 27.5 (v) ( 2 ) in addition, the auxiliary winding voltage v d is determined as follows: ( 3 ) where, n d : turns of auxiliary winding of transformer n s : turns of secondary side winding of transformer v out : output voltage v f : forward drop voltage of secondary side rectifier diode d50 when vcc pin voltage reaches to v cc(off) and a startup failure occurs as shown in figure 10 - 3 , increase the c4 value. since the larger capacitance causes the longer startup time of ic , it is necessary to check and adjust the startup process based on actual operation in the application. 10.4 soft start function figure 10 - 4 shows the behavior of vcc pin voltage and drain current during the startup period. the ic activates the soft start circuitry during the startup period. soft start time is fixed to around 4 .5 ms. during the so ft start period, over current threshold is increased step - wisely ( 7 steps ). this function reduces the voltage and the current stress of mosfet and secondary side rectifier diode. figure 10 - 4 v cc and i d behavior during startup since the leading edge blanking function ( refer to section 10.8 ) is deactivated dur ing the soft start period, there is the case that on time is less than the leading edge blanking time, t bw = 250 ns. after the soft start period, d/st pin current , i d , is limited by the drain current limit, i dlim(h) , until the output voltage increases to the target operating voltage. t his period is g iven as t lim . in case t lim is longer than the cc operation del ay time, t ccd , the output power is limited by the cc mode. thus, it is necessary to adjust the value of output capacitor and the turn ratio of a uxiliary w inding d so that the t lim is less than t ccd = 90 ms . 10.5 primary side regulation (psr) the ic is for primary s ide r egulation (psr) . in psr, the auxiliary winding voltage is divided by resistors (r3, r4 and r5) and is induced into fb pin as shown in figure 10 - 5 . t he constant voltage output control is achieved by using fb pin voltage. figure 10 - 6 shows the detection timing of auxiliary winding vo ltage v d . when the power mosfet turns off, the energy stored in transformer is provided to secondary side of the circuit. then the current i do flows through the secondary side rectifier diode. after the transfer of energy, power mosfet continues off state and the free oscillation of v d starts. during the free oscillation period, i do becomes zero. the feedback signal is generated by sampling the shoulder of v d waveform (point a in figure 10 - 6 ). thus the effect of v f is minimized. t he minimum sampling time , t fbms , is 2.2 s (max.) . since the sampling time becomes the short est in burst oscillation mode (refer to section 10.10 ) , the sampling time should be more than t fbms (shown in figure 10 - 6 ). the ideal waveform of auxiliary winding voltage v d is shown in figure 10 - 6 . the v d waveform depends on the waveform of the primary winding p voltage. in order to reduce the transient surge of v d waveform, a clamp snubber circuit of a capacitor - resistor - diode (crd) combination should be added on the primary winding p as shown in figure 10 - 5 . in order to improve the accuracy of v d waveform sampling, the ic has sampling delay time, t fbd , so that the surge component of the waveform at the turning off of power mosfet is not sampled. in case that the width of the surge component is longer than t fbd = 0.9 s , the width should be adjusted to be under t fbd . it is achieved by adjusting the value of r1 and c3 and by reducing the peak and width of the surge component. in addition, in order to realize the ideal v d waveform shown in figure 10 - 6 , add the resistor r2 in series with the diode of crd circuit to suppress the ringing of the waveform. .) (min v v .) (max v ) ovp ( cc cc ) off ( cc ? ? ) v v ( n n v f out s d d ? ? v c c ( o n ) v c c ( o f f ) t i m e v c c p i n v o l t a g e s t a r t u p o f s m p s n o r m a l o p e r t i o n d / s t p i n c u r r e n t , i d t l i m < t c c d s o f t s t a r t p e r i o d a p p r o x i m a t e l y 4 . 5 m s ( f i x e d ) t i m e s t a r t u p o f i c t s t a r t i d l i m ( h )
str 5a100d series str 5a100d - ds rev. 1.2 sanken electric co.,ltd. 10 dec. 25, 2013 figure 10 - 5 fb pin peripheral circuit figure 10 - 6 detection timing of auxiliary winding voltage 10.6 constant voltage (cv) control the ic achieves the constant voltage (cv) control of the power supply output by using the peak - current - mode control method , which enhances the response speed and provides the stable operation. the ic controls the peak value of the voltage of build - in sense resistor (v rocp ) to be close to target voltage (v sc ), comparing v rocp with v sc by internal fb comparator. feedback contro l circuit receives the sampling voltage which is the reversed auxiliary winding voltage by using error amplifier ( refer to figure 10 - 7 and figure 10 - 8 ) ? light load conditions the fb pin voltage increases with the increase of the output voltage when the output load becomes light. accordingly, the output voltage of internal error amplifier (target voltage v sc ) decreases. as a result, the peak value of v rocp is controlled to be lower so that the peak of the drain current decreases. this control prevents the output voltage from increasing. ? heavy load conditions the control circuit performs reverse operations to th e former. the target voltage v sc of internal comparator becomes higher and the peak drain current increases. this control prevents the output voltage from decreasing. figure 10 - 7 fb pin peripheral circuit figure 10 - 8 drain current i d and fb comparator in steady operation 10.7 constant current (cc) c ontrol the ic operates in constant current (cc) control when output current reaches to constant load and the stat e continu es for more than the constant current control delay time, t ccd = 90 ms. in case the ic is in discontinuous operation, the cv/cc characteristic is as shown in figure 10 - 9 . when output current reaches to constant load , mosfet drain current is limited to the drain c u rrent limit i dlim (h) . when the output voltage becomes low, the cc control is maintained by lowering the oscillation frequency f osc . when the output voltage becomes low, the fb pin voltage becomes low. when fb pin voltage r o c p 5 , 6 , 7 1 2 s / g n d f b v c c u 1 v r o c p d c 4 r 6 r 3 r 5 d 2 4 d / s t - v s c + p w m c o n t r o l r 4 e / a - + f b c o m p f e e d b a c k c o n t r o l s / h v a c d p d / s t 1 2 u 1 f b v d s r 1 c 3 r 2 d 1 d 2 r 3 r 5 c 1 c r d c l a m p s n u b b e r p s r c i r c u i t r 6 v d c 2 l 1 r 4 4 s / g n d 5 ~ 8 v s c f b c o m p a r a t o r d r a i n c u r r e n t , i d + - v o l t a g e o n b o t h s i d e o f r o c p v r o c p i d p k 0 v f d i o d e d r o p p e d v o l t a g e t o n t o f f t o n t f b d s a m p l i n g s e t p o i n t a t f b m s d / s t p i n c u r r e n t , i d s e c o n d a r y s i d e r e c t i f i e r d i o d e c u r r e n t , i d o a u x i l i a r y w i n d i n g v o l t a g e , v d f s d error v n n v ? ? ? ? ? ? f out s d d v v n n v ? ? ? out s d v n n ? s p dpk dopk n n i i ? ?
str 5a100d series str 5a100d - ds rev. 1.2 sanken electric co.,ltd. 11 dec. 25, 2013 decreases to about 1.6 v or less, the ic is stops oscillation and restarts. the ic repeats the i ntermittent oscillation operation until the fb pin voltage keeps abou t 1.6 v or more a fter the output voltage increases . figure 10 - 9 cv/cc characteristics 10.8 leading edge blanking function the ic uses the peak - current - mode control method for the constant voltage control of output. in peak - current - mode control method, there is a case that the power mosfet turns off due to unexpected response of fb comparator or overcurrent protection circuit (ocp) to the steep surge current in turni ng on a power mosfet. in order to prevent this operation, leading edge blanking time, t bw = 250 ns is built - in. in the period of t bw , the ic does not respond to the surge voltage in turning on the power mosfet. 10.9 random switching function t he ic modulates its switching frequency randomly by superposing the modulating frequency on f osc(avg) in normal operation. this function reduces the conduction noise compared to other s without this function, and simplifies noise filtering of the input lines of power supply. 10.10 auto standby function auto standby function automatically changes the oscillation mode to green mode or burst oscillation mode, when the output load becomes lower, the drain current i d decreases and the oscillation frequen cy becomes lower gradually (green mode) as shown in figure 10 - 10 . in order to reduce the swi tching loss, the number of switching is reduced in green mode and the switching operation is stopped during a constant period in burst oscillation mode. t he burst oscillation mode operates by the standby operation cycle , t stbop = 1.3 ms and the switching frequency about 23 khz. in light load, the number of minimum switching times is two times in t stbop (refer to figure 10 - 11 ) s ince the oscillator of burst oscillation cycle setting and the oscillator of switching oscillation frequency setting are not synchronized each other , the switching frequency may be high at near the standby operation threshold voltage , v stbop . figure 10 - 10 relationship between p o and f osc figure 10 - 11 switching waveform at burst oscillation 10.11 overcurrent protection function (ocp) overcurrent protection function (ocp) detects each drain peak current level of a power m osfet on pulse - by - pulse basis , and limits the output power when the current level reaches to drain current limit . when t his ocp operation continue s for more than the constant current control delay time, t ccd = 90 ms, constant current (cc) control is activated (refer to 10.7 constant current (cc) c ontrol). input compensation f unction ics with pwm control usually have some propagation delay tim e . the steeper the slope of the actual drain current at a high ac input voltage is , the larger the actual drain peak current is, compared to the drain current limit. thus, the peak current has some variation d epending on the ac input voltage in the drain current limitation state. in order to reduce the variation of peak current in the drain current limitation state, t h e ic incorporates a built - in input compensation function . the input compensation function s upe rposes a signal with a constant slope ( figure 10 - 12 ) i nto the internal current detection signal and varies the internal threshold voltage. v o u t o u t p u t c u r r e n t i o u t c v m o d e c c m o d e o u t p u t v o l t a g e out osc 2 dlim p ) k p ( out v 2 f i l i ? ? ? ? ? s w i t c h i n g f r e q u e n c y f o s c o u t p u t p o w e r , p o 6 5 k h z a b o u t 2 3 k h z b u r s t o s c i l l a t i o n n o r m a l o p e r a t i o n s t a n d b y p o w e r g r e e n m o d e b u r s t c y c l e i s 1 . 3 m s t i m e i d t s t b o p = 1 . 3 m s a b o u t 2 3 k h z
str 5a100d series str 5a100d - ds rev. 1.2 sanken electric co.,ltd. 12 dec. 25, 2013 when ac inpu t voltage is low (on duty is broad) , the drain current limit after compensation increases. the difference of peak drain current become small compared with the case where the ac input voltage is high (on duty is narrow). the compensation signal depends on o n duty. t he relation between the on duty and the drain current limit after compensation i dlim ' is expressed as equation ( 4 ) . when on duty is broader than 27 % , the drain current limit becomes a constant value i dlim (h) . ( 4 ) where, duty : mosfet on duty (%) i dlim(h) : drain current limit (on duty 27 %) i dlim(l) : drain current limit (on duty = 0 %) i dlim(h) i dlim(l) str5a162d 0.285 a 0.242 a STR5A164D 0.41 a 0.34 a figure 10 - 12 relationship between on duty and drain current limit after compensation 10.12 overvoltage protection (ovp) when a voltage between vcc pin and s/gnd terminal increases to v cc(ovp) = 29. 3 v or more, ovp f unction is activated and stops switching operation . when ovp function is activated, vcc pin voltage decreases to operation stop voltage v cc(off) = 8.1 v . after that, the ic reverts to the initial state by uvlo (undervoltage lockout) circuit , and the ic starts operation when vcc pin voltage increases to v cc(on) = 15. 0 v by startup current. thus the intermittent operation by uvlo is repeated in ovp condition. this intermittent operation reduces the stress of parts such as power mosfet and secondary side r ectifier diode. in addition, thi s operation reduces power consumption because the switching period in this intermittent operation is short compared with oscillation stop period. when the abnormal condition is removed, the ic returns to normal operation aut omatically. in case the vcc pin voltage is provided by using auxiliary winding of transformer, the overvoltage conditions such as fb pin open can be detected because the vcc pin voltage is proportional to fb pin voltage. the approximate value of output vol tage v out(ovp) in ovp condition is calculated by using e quation ( 5 ) . ( 5 ) where, v out(normal) : output voltage in normal operation v cc(normal) : vcc pin voltage in normal operation 10.13 thermal shutdown protection (tsd) when the temperature of control circuit increases to thermal shutdown operating temperature t j(tsd) = 135 c ( min. ) or more, t hermal shutdown protection function is a ctivated and stops switching operation. in tsd condition, the intermittent operation by uvlo is repeated by same mechanism as described in 10.12 o vervoltage protection (ovp) . the tsd function of the ic incorporates the hysteresis. when the temperature of the ic decreases to t j(tsd) ? t j(tsdhys) , the ic release s the tsd operation and restarts . 11. design notes 11.1 external components take care to use properly rated, including derating as necessary and proper type of components . figure 11 - 1 peripheral circuit of fb pin and vcc pin o n d u t y 0 % 2 7 % i d l i m ( l ) 0 i d l i m ( h ) 5 7 % d r a i n c u r r e n t l i m i t a f t e r c o m p e n s a t i o n , i d l i m ' d d p c d m a x ? ? ? ? 29.3 v v v normal cc normal out out(ovp) ? ? ) l ( dlim ) l ( dlim ) h ( dlim dlim i y dut (%) 27 i i ' i ? ? ? ? v a c d p v c c 1 2 u 1 f b r 1 c 3 r 2 d 1 d 2 r 3 r 5 c 1 c r d c l a m p s n u b b e r r 6 v d c 2 l 1 r 4 d / s t 4 s / g n d 5 ~ 8 c 4 d 5 0 s 1 v o u t g n d c 5 2 c 5 1 r 5 1 r 5 2
str 5a100d series str 5a100d - ds rev. 1.2 sanken electric co.,ltd. 13 dec. 25, 2013 ? output electrolytic capacitor apply proper derating to ripple current, voltage, and temperature rise. use of high ripple current and low impedance types, designed for switch mode power supplies, is recommended. ? fb p in p eripheral c ircuit and crd c lamp s nubber figure 11 - 1 shows the f b pin peripheral circuit . the auxiliary winding voltage, v d is divided by resistors (r3, r4 and r5) and induced into fb pin. the fb pin voltage is controlled to be feedback reference voltage , v fb(ref) = 2.50 v. the value of r5 is about 3.3 k to 10 k . the value of r3 and r4 are calculated as follows: ( 6 ) where, n d : turns of auxiliary winding of transformer n s : turns of secondary side winding of transformer v out : output voltage v f : forward drop voltage of secondary side rectifier diode d50 v f b(ref) : feedback reference voltage , 2.50 v i f b(op) : feedback current, ? 0.8 a in addition, the negative voltage is input to fb pin . as shown in figure 11 - 2 , the negative voltage , v fw, of v d is calculated as follows: ( 7 ) w here, v in(ac) : input voltage n d : turns of d winding n p : turns of p winding figure 11 - 2 the auxiliary winding voltage waveform the absolute maximum rating of f b pin source current , i fb is ? 10 ma. the value of r3 and r4 are chosen so that the fb pin source current, i fb(fw) , satisfies equation ( 8 ) considered about surge. ( 8 ) t here, the maximum input voltage substitutes in v in(ac) . r3, r4 and r5 should be adjusted in actual operation condition. the ic generates the feedback signal by sampl ed v d waveform that is fb pin input signal . in order to improve the accuracy of v d waveform sampling, it is necessary to realize the ideal v d waveform for reducing the peak and width of the surge component and suppressing the ringing. because the v d waveform depends on the waveform of the primary winding p voltage, a clamp snubber circuit should be added on the primary winding p. the method of setting the value of the clamp snubber circuit is shown in 10.5 primary side regulation (psr) . in order t o maintain the sampling accuracy during light load operation, an auxiliary switch diode sars05 should be used as d1 where the approximate value of r2 is 220 to 470 . r2 should be adjusted to obtain proper v d wavefor m in actual operation condition. ? vcc p in p eripheral c ircuit the reference value of c 4 ( see figure 11 - 1 ) is generally from 4.7 f to 2.2 f . the startup time is determined by the value of c 4 (refer to section 10.1 startup operation ). in actual power supply circuits, there are cases in which the vcc pin voltage fluctuates in proportion to the output current, i out ( see figure 11 - 3 ), and the overvoltage protection function (ovp) on the vcc pin may be activated. this happens because c 4 is charged to a peak voltage on the auxiliary winding d, which is caused by the transient surge voltage coupled from the primary winding when the power mosfet turns off. figure 11 - 3 variation of vcc pin voltage and power supply output current with / without r6 resistor a u x i l i a r y w i n d i n g v o l t a g e , v d 0 v r e v v f w w i t h o u t r 6 w i t h r 6 v c c p i n v o l t a g e o u t p u t c u r r e n t i o u t 2 v n n v in(ac) p d fw ? ? ? ma 5 2 4 r 3 r v n n ) ac ( in p d ? ? ? ? ? ? 4 r 3 r v i fw fb(fw) ? ? ? ? ) op ( fb ) ref ( fb ) ref ( fb f out s d i 5 r v v v v n n 4 r 3 r ? ? ? ? ? ?
str 5a100d series str 5a100d - ds rev. 1.2 sanken electric co.,ltd. 14 dec. 25, 2013 for alleviating c 4 peak charging, it is effective to add some value r 6 , of several tenths of ohms to several ohms, in series with d2 (see figure 11 - 1 ). the optimal value of r 6 should be determined using a transformer matching what will be used in the actual application, because the variation of the auxiliary winding voltage is affected by the transformer structural design. ? comp pin peripheral circuit figure 11 - 4 shows the comp pin peripheral circuit. the capacitor c5 between comp pin and s/gnd pin performs for high frequency noise reduction and phase compensation. c5 should be connected to both comp pin and s/gnd pin as short as possible. t he recommended value of c5 is 10 0 p f to 680 pf . the approximate value of both c6 and r7 are 680 p f to 2200 pf and 680 k , respectively. these should be adjusted on actual operation . because the internal impedance of comp pin is high, the measurement of comp pin waveform by using the oscilloscope needs a caution . especially in light load condition, the probe of the oscilloscope may affect the control of ic . thus the vo ltage - follower (buffer) circuit with high imped ance op amp should be used for the measurement of comp pin . figure 11 - 4 comp pin peripheral circuit ? d/st pin the internal power mosfet connected to d/st pin (see figure 11 - 1 ) is permanently damaged when the d/st pin voltage and the current exceed the absolute maximum ratings. therefore, as shown in figure 11 - 5 , the d/st pin voltage is tuned to be less than about 90 % of t he absolute maximum ratings ( 657 v ) in all condition of actual operation , and the value of transformer and component s should be selected based on actual operation in the application. and the d/st pin voltage in normal operation is tuned to be the recommended operating conditions , v d/st(op) < 584 v. the fast recovery diodes are rec ommended for using as d2 and d51. the way of setting the value of the clamp snubber circuit is shown in section 10.5 primary side regulation . figure 11 - 5 d/st pin voltage waveform ? b leeder r esistance since the ic employ s the p rimary s ide r egulation , the ic continues burst oscillation operation at light load in order to detect the state of secondary side. in case the power supply is used under light load condition (input power is 25 mw or less at maximum input voltage) or no load condition, in order to prevent the increase of output voltage , the bl eeder resistance, r52, is conne cted to both ends of the output capacitor, c52, as shown in figure 11 - 1 . the value of r52 should be selected based on actual operation in the applicati on after the r52 which loss of r52 becomes about 10 mw is connected. ? transformer apply proper design margin to core temperature rise by core loss and copper loss. because the switching currents contain high frequency currents, the skin effect may become a consideration. choose a suitable wire gauge in consideration of the rms current and a current density of about 3 to 4a/mm 2 . if measures to further reduce temperature are still necessary, the following should be considered to increase the total surface area of the wiring: ? increase the number of wires in parallel. ? use litz wires. ? thicken the wire gauge . when the leakage inductance between primary winding and secondary winding increases, the turn - on surge of mosfet becomes large . and in case the leakage induc tance between secondary winding and auxiliary winding increases, the accuracy of feedback detection may become low. thus figure 11 - 6 shows the w inding structural examples to decrease the leakage inductance of transformer . figure 11 - 6 shows the w inding structural examples of 5 , 6 , 7 8 s / g n d c o m p u 1 c 5 c 6 r 7 + - p r o b e b u f f e r c i r c u i t d / s t p i n v o l t a g e < 6 5 7 v v d / s t ( o p ) < 5 8 4 v t i m e
str 5a100d series str 5a100d - ds rev. 1.2 sanken electric co.,ltd. 15 dec. 25, 2013 two outputs circuit. p1 an d p2 are windings divided t he primar y winding into two . s1 is a stabilized output winding of secondary - side windings , controlled to constant voltage. ? winding structural example (a): separating the auxiliary winding d from the primar y windings p1 and p2. ? winding structural example (b): placing the auxiliary winding d within the secondary - side stabiliz ed output winding , s1 , in order to improve the coupling of those windings. figure 11 - 6 winding structural examples 11.2 pcb trace layout and component placement since the pcb circuit trace design and the component layout significantly affects operation, e mi noise, and power dissipation , the high frequency pcb trace s hould be low impedance with small loop and wide trace . in addition, the ground traces affect radiated emi noise, and wide, short traces should be taken into account. figure 11 - 7 shows the circuit design example. (1) main circuit trace layout : s/gnd pin to c2 to t1 (winding p) to d/st pin this is the main trace containing switching currents, and thus it should be as wide trace and small loop as possible. if c 2 and the ic are distant from each other, placing a capacitor such as film capacitor (about 0.1 f and with proper voltage rating) clo se to the transformer or the ic is recommended to reduce impedance of the high frequency current loop. (2) control g round trace layout since the operation of ic may be affected from the large current of the main trace that flow s in control ground tra ce, the co ntrol ground trace should be connected at a single point grounding of point a as close to the s/gnd pin as possible. (3) vcc trace layout : s/gnd pin to c4 (negative) to t1 (winding d ) to r6 to d2 to c4 ( positive ) to vcc pin this is the trace for supplying power to the ic, and thus it should be as small loop as possible. if c 4 and the ic are distant from each other, placing a capacitor such as film capacitor c f ( about 0.1 f to 1.0 f) close to the vcc pin and the s/ gnd pin is recommended. (4) comp trace layout c5, c6 and r7 are connected to comp pin for phase compensation. these capacitors and resistor should be placed to shorten the trace between comp pin and s/gnd pin. in order to stabilize the operation of ic, a dedicated trace to s/gnd pin is r ecommended. (5) fb trace layout t he auxiliary winding voltage is divided by resistors and is induced to fb pin. in order to achieve the accurate primary side regulation, the trace between the resistors and fb pin should be as short as possible. (6) secondary recti fier smoothing circuit trace layout : t1 (winding s ) to d50 to c52 th is is the trace of the rectifier smoothing loop, carr ying the switching current , and thus it should be as wide trace and small loop as possible. if this trace is thin and long, inductance resulting from the loop may increase surge voltage at turning off the power mosfet. proper rectifier smoothing trace layout helps to increase margin against the power mosfet breakdown voltage, and reduces s tress on the clamp snubber circuit and losses in it. (7) thermal c onsideration s because the power mosfet has a positive thermal coefficient of r ds(on) , consider it in thermal design. since the copper area under the ic and the s/gnd trace act as a heatsink, its traces should be as wide as possible. m a r g i n t a p e m a r g i n t a p e m a r g i n t a p e m a r g i n t a p e p 1 s 1 p 2 s 2 d p 1 s 1 d s 2 s 1 p 2 w i n d i n g s t r u c t u r a l e x a m p l e ( a ) w i n d i n g s t r u c t u r a l e x a m p l e ( b ) p 1 p 2 p r i m a r y m a i n w i n d i n g d p r i m a r y a u x i l i a r y w i n d i n g s 1 s e c o n d a r y s t a b i l i z e d o u t p u t w i n d i n g s 2 s e c o n d a r y o u t p u t w i n d i n g b o b b i n b o b b i n
str 5a100d series str 5a100d - ds rev. 1.2 sanken electric co.,ltd. 16 dec. 25, 2013 figure 11 - 7 example of peripheral circuit around the ic c 2 c 3 r 1 d 1 d 2 r 6 c 4 t 1 d p s r 3 r 5 1 2 4 c o m p s / g n d v c c n c f b d / s t 8 7 5 s t r 5 a 1 d u 1 s / g n d s / g n d 6 r 2 c 5 r 4 d 5 0 c 5 2 r 5 1 c 5 1 v a c b r 1 l 1 c 1 f 1 c 7 c 8 r 5 2 v o u t g n d c 6 r 7 ( 1 ) m a i n t r a c e s h o u l d b e w i d e t r a c e a n d s m a l l l o o p ( 3 ) l o o p o f t h e p o w e r s u p p l y s h o u l d b e s m a l l ( 6 ) m a i n t r a c e o f s e c o n d a r y s i d e s h o u l d b e w i d e t r a c e a n d s m a l l l o o p ( 4 ) t h e c o m p o n e n t s c o n n e c t e d t o c o m p p i n s h o u l d b e s h o r t , a n d t h e s e c o m p o n e n t s c o n n e c t e d t o s / g n d p i n s h o u l d b e d e d i c a t e d t r a c e . ( 5 ) t h e c o m p o n e n t s c o n n e c t e d t o f b p i n s h o u l d b e s h o r t ( 7 ) t r a c e o f s / g n d p i n s h o u l d b e w i d e f o r h e a t r e l e a s e ( 2 ) g n d t r a c e f o r i c s h o u l d b e c o n n e c t e d a t a s i n g l e p o i n t
str 5a100d series str 5a100d - ds rev. 1.2 sanken electric co.,ltd. 17 dec. 25, 2013 12. pattern layout example the following show the pcb pattern layout example and the circuit schematic with str 5a100d series. figure 12 - 1 pcb circuit trace layout example figure 12 - 2 circuit schematic for pcb circuit trace layout the above circuit symbols correspond to these of figure 12 - 1 . top view bottom view s lit width v a c c 1 r 1 d 1 t 1 d p c 5 c 4 c 3 r 6 r 3 r 5 d 2 b r 1 c o m p s / g n d v c c n c f b d / s t s / g n d s / g n d 8 7 6 5 s t r 5 a 1 0 0 d u 1 1 2 4 r 2 l 1 c 2 r 4 d 5 0 s 1 v o u t g n d c 5 2 c 5 1 r 5 1 c 6 r 7 r 5 2 c 8 c 7 f 1 c 5 4 1 2 3 5 7 9
str 5a100d series str 5a100d - ds rev. 1.2 sanken electric co.,ltd. 18 dec. 25, 2013 13. reference design of power supply as an example, the following show the power supply specification, the circuit schematic, the bill of materials, and the transformer specification. ? power s upply specification ic STR5A164D input voltage ac 85 v to ac 265 v maximum output power 5 w (max . ) output voltage 5 v output current 1 a (max . ) ? circuit schematic ? bill of materials symbol part type ratings (1) recommended sanken parts symbol part type ratings (1) recommended sanken parts br1 general 600 v , 1 a r4 (2) chip 1 5 k f1 fuse ac 250 v , 1 a r5 (2) chip 4.7 k l1* (2) c m inductor 330 h r6 (2) chip 0 c1 electrolytic 400 v , 4.7 f r7 (2) chip 680 k c2 elect rolytic 400 v , 4.7 f d1 general 800 v, 1 a sars05 c3 ceram ic, chip 630 v , 1000 pf d2 fast recovery, chip frd 200 v , 1 a c4 elect rolytic 50 v , 10 f u1 ic STR5A164D c5 (2) ce ramic, chip 330 pf t1 transformer see the specification c6 (2) ce ramic, chip 10 00 pf d50 schottky 60 v , 3 a sjpb - l 6 c7 (2) ce ramic, chip open c51 ceramic, chip 50 v, 2200 pf c8 (2) ce ramic, chip open c52 (2) electrolytic 10v, 470f r1 (3) metal oxide, c hip 470 k r51 chip 22 r2 chip 2 7 0 r52* (2) chip 2 . 7 k r3 (2) ch ip 3.9 k (1) unless otherwise specified, the voltage rating of capacitor is 50 v or less and the power rating of resistor is 1/8 w or less . (2) it is necessary to be adjusted based on actual operation in the application. (3) resistors applied high dc voltage and of high resistance are recommended to select resistors designed against electromigration or use combinations of resistors in series for that to reduce each applied voltage, according to the requirement of the application. v a c c 1 r 1 d 1 t 1 d p c 5 c 4 c 3 r 6 r 3 r 5 d 2 b r 1 c o m p s / g n d v c c n c f b d / s t s / g n d s / g n d 8 7 6 5 s t r 5 a 1 0 0 d u 1 1 2 4 r 2 l 1 c 2 r 4 d 5 0 s 1 5 v / 1 a g n d c 5 2 c 5 1 r 5 1 c 6 r 7 r 5 2 c 8 c 7 f 1
str 5a100d series str 5a100d - ds rev. 1.2 sanken electric co.,ltd. 19 dec. 25, 2013 ? transformer specification ? primary induc tance, l p : 1. 7 mh ? core size : ei - 16 ? al - value 118 nh/n 2 ( center gap of about 0. 3 mm ) ? winding specification winding symbol number of turns ( t ) wire diameter ( mm ) c onstruction wire primary winding 1 p1 80 two layers e nameled copper wire primary winding 2 p2 40 single - layer e nameled copper wire auxiliary winding d 18 single - layer e nameled copper wire output winding 1 s1 8 single - layer triple insulated wire output winding 2 s2 8 single - layer triple insulated wire figure 13 - 1 example of transformer structure notes: 1) coupling between d winding and s1 winding should be adjusted and be improved by applying the solid winding construction in d winding, for example. 2) the peak value of drain current i d in normal operation is determined by l p value. since the slope of i d is expressed as v ds /l p , the smaller the l p value, the steeper the slope of i d becomes. thus the peak value of dr ain current becomes high as shown in figure 13 - 2 . the ic limits the peak current by drain current limit i dlim (overcurrent state). if l p value becomes small by variation, there is the case that the system is in overcurrent state. t hen the designed output power cannot be achieved. thus the l p value should be determined after the confirmation in actual operation using minimum l p value within the variation , where the peak current value should be less than i dlim (min) in minimum input voltage of power supply. figure 13 - 2 relation between l p and drain current i d i d l i m l p ( m a x . ) l p ( t y p . ) l i m i t e d b y i d l i m o v e r c u r r e n t s t a t e d r a i n c u r r e n t , i d t i m e l p ( m i n . ) b o b b i n d s 1 p 1 v d c d / s t v c c g n d 5 v g n d s 2 s 1 d s 2 p 2 p 2 5 p i n 3 p i n 2 p i n 1 p i n 7 p i n 9 p i n p 1 c r o s s - s e c t i o n v i e w : s t a r t a t t h i s p i n
str 5a100d series str 5a100d - ds rev. 1.2 sanken electric co.,ltd. 20 dec. 25, 2013 operating precautions in the case that you use sanken products or design your products by using sanken products, the reliability largely depends on the degree of derating to be made to the rated values. derating may be interpreted as a case that an operation range is set by derating the load from each rated value or surge voltage or noise is considered for derating in order to assure or improve the reliability. in general, derating factors include electric stresses such as electric voltage, electric current, electri c power etc., environmental stresses such as ambient temperature, humidity etc. and thermal stress caused due to self - heating of semiconductor products. for these stresses, instantaneous values, maximum values and minimum values must be taken into consider ation. in addition, it should be noted that since power devices or ics including power devices have large self - heating value, the degree of derating of junction temperature affects the reliability significantly. because reliability can be affected advers ely by improper storage environments and handling methods, please observe the following cautions. cautions for storage ? ensure that storage conditions comply with the standard temperature (5 to 35c) and the standard relative humidity (around 40 to 75%) ; av oid storage locations that experience extreme changes in temperature or humidity. ? avoid locations where dust or harmful gases are present and avoid direct sunlight. ? reinspect for rust on leads and solderability of the products that have been stored for a long time. cautions for testing and handling when tests are carried out during inspection testing and other standard test periods, protect the products from power surges from the testing device, shorts between the product pins, and wrong connections. ensure all test parameters are within the ratings specified by sanken for the product s . remarks a bout using silicone grease with a heatsink ? when silicone grease is used in mounting the product s on a heatsink, it shall be applied eve nly and thinly. if more silicone grease than required is applied, it may produce excess stress. ? volatile - type silicone greases may crack after long periods of time, resulting in reduced heat radiation effect. silicone greases with low consistency (hard gre ase) may cause cracks in the mold resin when screwing the products to a heatsink. our recommended silicone greases for heat radiation purposes, which will not cause any adverse effect on the product life, are indicated below: type suppliers g746 shin - etsu chemical co., ltd. yg6260 momentive p erformance m aterials inc. sc102 dow corning toray co., ltd. soldering ? when soldering the products, please be sure to minimize the working time, within the following limits: ? 260 5 c 10 1 s (flow, 2 times) ? 380 10 c 3 .5 0.5 s (soldering iron , 1 time ) ? soldering should be at a distance of at least 1.5 mm from the body of the products. electrostatic discharge ? when handling the products, the operator must be grounded. grounded wrist straps worn should have at least 1m of resistance from the operator to ground to prevent shock hazard, and it should be placed near the operator. ? workbenches where the products are handled should be grounded and be provided with conductive table and floor mats. ? when using measuring equipment such as a curve tracer, the equipment should be grounded. ? when soldering the products, the head of soldering irons or the solder bath must be grounded in order to prevent leak voltages generated by them from being applied to the products. ? the pr oducts should always be stored and transported in sanken shipping containers or conductive containers, or be wrapped in aluminum foil.
str 5a100d series str 5a100d - ds rev. 1.2 sanken electric co.,ltd. 21 dec. 25, 2013 important notes ? the contents in this document are subject to changes, for improvement and other purposes, without notice. make sure that this is the latest revision of the document before use. ? application and operation examples described in this document are quoted for the sole purpose of reference for the use of the products herein and sanken can assume no responsibi lity for any infringement of industrial property rights, intellectual property rights or any other rights of sanken or any third party which may result from its use. unless otherwise agreed in writing by sanken, sanken makes no warranties of any kind, whet her express or implied, as to the products, including product merchantability, and fitness for a particular purpose and special environment, and the information, including its accuracy, usefulness, and reliability, included in this document. ? although sanke n undertakes to enhance the quality and reliability of its products, the occurrence of failure and defect of semiconductor products at a certain rate is inevitable. users of sanken products are requested to take, at their own risk, preventative measures in cluding safety design of the equipment or systems against any possible injury, death, fires or damages to the society due to device failure or malfunction. ? sanken products listed in this document are designed and intended for the use as components in gener al purpose electronic equipment or apparatus (home appliances, office equipment, telecommunication equipment, measuring equipment, etc.). when considering the use of sanken products in the applications where higher reliability is required (transportation equipment and its control systems, traffic signal control systems or equipment, fire/crime alarm systems, various safety devices, etc.), and whenever long life expectancy is required even in general purpose electronic equipment or apparatus, please contact your nearest sanken sales representative to discuss, prior to the use of the products herein. the use of sanken products without the written consent of sanken in the applications where extremely high reliability is required (aerospace equipment, nuclear p ower control systems, life support systems, etc.) is strictly prohibited. ? when using the products specified herein by either (i) combining other products or materials therewith or (ii) physically, chemically or otherwise processing or treating the products , please duly consider all possible risks that may result from all such uses in advance and proceed therewith at your own responsibility. ? anti radioactive ray design is not considered for the products listed herein. ? sanken assumes no responsibility for any troubles, such as dropping products caused during transportation out of sankens distribution network. ? the contents in this document must not be transcribed or copied without sankens written consent.

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