www.pericom.com ps9016b 12/09/10 1 features ? sata2 i, m; external sata2 ? two 3.0gbps diferential signal pairs ? independent digital output emphasis control ? 100 diferential cml i/os ? input signal level detect and squelch for each channel ? oob support ? enhanced mode features: a djustable receiver equalization i ndependent analog output swing adjustment i ndependent analog output emphasis control i ndependent channel power down control ? low power (220mw per channel) ? stand-by mode C power down state ? supply voltage: 3.3v ? packaging (pb-free & green): 2 0-tqfn (4x4mm) description pericom semiconductors PI3EQX4951B is a low power, signal redriver?. the device provides programmable equalization, to optimize performance over a variety of physical mediums by reducing inter-symbol interference. PI3EQX4951B supports two 100 differential cml data i/os between the protocol asic to a switch fabric, across a backplane, or to extend the signals across other distant data pathways on the users plat- form. the integrated equalization circuitry provides fexibility with signal integrity of the signal before the redriver. a low-level input signal detection and output squelch function is provided for each channel. each channel operates fully indepen- dently. when the channels are enabled (x_en=1) and operating, that channels input signal level (on xi+/-) determines whether the output is active. if the input signal level of the channel falls below the active threshold level (vth-) then the outputs are driven to the common mode voltage. in addition to signal conditioning, when en = 0, the device enters a low power standby mode. block diagram pin diagram (top side view) en x_eq x_em x_en# xl+ xl- xo+ xo- limiting amp equalizer emx power management control circuit - repeated 2 times - cml cml signal detection 2 3 4 5 6 7 8 9 19 18 17 16 15 14 13 12 10 11 1 20 a _en# bo- ai+ ai- bo+ vdd en b_eq a_eq mode vdd ao+ ao- b_en# bi- bi+ b_em vdd vdd a_em gnd 19 1 2 3 4 5 7 16 15 14 13 12 11 108 9 18 17 gnd gnd ai+ ai- bo- bo+ vdd vdd ao+ ao- gnd bi- bi+ vdd en b_em gnd mode gnd 6 a_em 20 vdd standard mode (mode = 0) enhanced mode (mode = 1) PI3EQX4951B 3.3v, 1-port, sata2 i/m redriver? with analog/digital confguration 10-0248
www.pericom.com ps9016b 12/09/10 2 PI3EQX4951B 3.3v, 1-port, sata2 i/m redriver? with analog/digital confguration pin description standard mode pin # enhanced mode pin # pin name type description 9 19 a_em input output emphasis adjustment for channel a. w hen in standard mode (mode= 0) digital control is enabled, and a 100k pull-up resistor is enabled on a_em. w hen in enhanced mode (mode= 1) analog resistive adjustment of emphasis is enabled. refer to confguration tables and system implementation diagrams for design guidelines. 3 a_en# input channel a enable, is active only when in enhanced mode (mode=1). low is normal operation. high is power down mode. has internal 100k pull-down resistor. 18 a_eq input channel a equalization adjustment is active only in enhanced mode (mode = 1). with internal 100k pull-up to v dd . refer to enhanced mode confguration table and system implementation diagram for design guidelines. 1 2 1 2 ai+ ai- input cml input forward channel a with internal 50 pull-up resistors connected to vbias (100 diferential). 14 15 14 15 ao- ao+ output cml output channel a with internal 50 pull-up resistors connected to vbias (100 diferential). 8 9 b_em input output emphasis adjustment for channel b. w hen in standard mode (mode= 0) digital control is enabled, and a 100k pull-up resistor is enabled on a_em. w hen in enhanced mode (mode= 1) analog resistive adjustment of emphasis is enabled. refer to confguration tables and system implementation diagrams for design guidelines. 13 b_en# input channel b enable, is active only when in enhanced mode (mode=1). low is normal operation. high is power down mode. has internal 100k pull-down resistor. 8 b_eq input channel a equalization adjustment, is active only in enhanced mode (mode = 1). with internal 100k pull-up to v dd . refer to enhanced mode confguration table and system implementation diagram for design guidelines. 11 12 11 12 bi+ bi- input cml input return channel b with internal 50 pull-up, resistor connected to vbias (100 diferential). 4 5 4 5 bo- bo+ output positive cml output channel b with internal 50 pull-up resistor connected to vbias (100 diferential). 7 7 en input chip enable "high" provides normal operation. "low" for power down mode. with internal 100k pull-up resistor. 3, 13, 18, 19, center pad center pad gnd gnd supply ground. 6,10, 16, 20 6, 10, 16, 20 v dd power 3.3v supply voltage 10% 17 17 mode input mode selects enhanced mode operation and pin function when high. when mode is low, standard mode operation is selected. with internal 100k pull- up resistor to v dd . see confguration tables for use information. 10-0248
www.pericom.com ps9016b 12/09/10 3 PI3EQX4951B 3.3v, 1-port, sata2 i/m redriver? with analog/digital confguration confguration table (standard mode) en mode b_em (1) a_em (1) output b emphasis output a emphasis input b equalization @ f=1.5ghz input a equalization @ f=1.5ghz 0 x x x disable disable disable disable 1 0 0 0 0db 0db 2.5db 2.5db 1 0 0 1 0db 3.0db 2.5db 2.5db 1 0 1 0 3.0db 0db 2.5db 2.5db 1 0 1 1 3.0db 3.0db 2.5db 2.5db note: 1. r efer to standard mode implementation diagram confguration table (enhanced mode) en mode x_en# x_eq input x equaliza- tion x_em output x emphasis function 0 x x x n/a x n/a chip power down 1 1 1 x n/a x n/a chip enabled, channel x disabled 1 1 0 0 2.5db 1.1k to 15k resistor resistor controlled, 6db to 0db (1) chip and channel enabled, low input equalization 1 1 0 1 6.5db 1.1k to 15k resistor resistor controlled, 6db to 0db (1) chip and channel enabled, high input equalization note: 1. r efer to enhanced mode implementation diagram 10-0248
www.pericom.com ps9016b 12/09/10 4 PI3EQX4951B 3.3v, 1-port, sata2 i/m redriver? with analog/digital confguration storage temperature ................................................................C 65c to +150c supply voltage to ground potential ........................................C 0.5v to +4.6v dc sig voltage .................................................................C 0.5v to v dd +0.5v current output .................................................................... C 25ma to +25ma power dissipation continuous ............................................................. 5 00mw operating temperature .....................................................................0 t o +70c esd, human body model.....................................................C6kv to +6kv note: stresses greater than those listed under maximum rat- ings may cause permanent damage to the device. tis is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specifcation is not implied. exposure to absolute maximum rating conditions for extended periods may afect reliability. maximum ratings (above which useful life may be impaired. for user guidelines, not tested.) ac/dc electrical characteristics symbol parameter conditions min. typ. max. units v dd power supply voltage 3.0 3.6 v p standby supply power, standby en = 0 1.5 mw p idle supply power, idle en = 1, x_en# = 0 diffp-p < v th-sd 235 mw p active supply power, active en = 1, x_en# = 0 diffp-p v th-sd 440 mw i dd-standby supply current standby en = 0 0.4 ma i dd-idle supply current idle en = 1, x_en# = 0, v rx-dif- fp-p < v th-sd 70 i dd-active supply current active en = 1, x_en# = 0, v rx-dif- fp-p v th-sd 120 t pd latency from input to output 2.0 ns cml receiver input z rx-dc dc input impedance 40 50 60 z rx-diff-dc dc diferential input impedance 80 100 120 v rx-diffp-p diferential input peak-to- peak voltage 0.2 1.6 v v rx-cm-acp ac peak common mode input voltage 150 mv v th-sd signal detect treshold en = 1, x_en# = 0 50 200 (1) mvppd note: using compliance test at 1.5gbps and 3gbps. also using oob (oob is formed by alignp primitive or d24.3) test patterns at 1.5gbps. te align primi- tive (k28.5+d10.2+d27.3 = 0011111010+0101010101+0010011100). te d24.3 = 00110011001100110011 (continued) 10-0248
www.pericom.com ps9016b 12/09/10 5 PI3EQX4951B 3.3v, 1-port, sata2 i/m redriver? with analog/digital confguration symbol parameter conditions min. typ. max. units rl dd11_rx rx diferential mode return loss 75mhz-300mhz 300mhz-600mhz 600mhz-1.2ghz 1.2ghz-2.4ghz 2.4ghz-3.0ghz 3.0 ghz-5.0ghz 18 14 10 8 3 1 db rl cc11_rx rx common mode return loss 150mhz C 300mhz 300mhz C 600mhz 600mhz C 1.2ghz 1.2ghz C 2.4ghz 2.4ghz C 3.0ghz 3.0ghz C 5.0ghz 5 5 2 2 1 1 db rl dc11_rx rx impedance balance 150mhz C 300mhz 300mhz C 600mhz 600mhz C 1.2ghz 1.2ghz C 2.4ghz 2.4ghz C 3.0ghz 3.0ghz C 5.0ghz 30 30 20 10 4 4 db equalization t j total jitter measured at 3gbps/500 0.37 ui d j deterministic jitter measured at 3gbps/500 0.19 ui cml transmitter output (100? diferential) 1 z tx-diff-dc dc diferential tx imped- ance 80 100 120 v tx-diffp-p diferential peak-to-peak output voltage v tx-diffp-p = 2 * | v tx-d+ - v tx-d- | 500 600 mv v tx-c common-mode voltage | v tx-d+ + v tx-d-| /2 1 1.8 v t f , t r transition time 20% to 80% (1) 50 150 ps t f -t r mis-match transition time 3g only; hftp, mftp 20 % v amp_bal tx amplitude imbalance 3g only; hftp, mftp 10 % t skew tx diferential skew 1.5g and 3g; hftp, mftp 20 ps v cm_ac tx ac common mode voltage 3g only; mftp 50 mvpp v cmoob oob common mode delta voltage 50 mv v difoob oob diferential delta voltage 25 mv v tx-pre-ratio-max max tx pre-emphasis level 6 db ac/dc electrical characteristics ( cml receiver input continued) (continued) note: 1. r ecommended output coupling capacitor is 4.7nf to 12nf (on each output) 10-0248
www.pericom.com ps9016b 12/09/10 6 PI3EQX4951B 3.3v, 1-port, sata2 i/m redriver? with analog/digital confguration symbol parameter conditions min. typ. max. units rl dd11_tx tx diferential mode return loss 150mhz C 300mhz 300mhz C 600mhz 600mhz C 1.2ghz 1.2ghz C 2.4ghz 2.4ghz C 3.0ghz 3.0 ghz C 5.0ghz 14 8 6 6 3 1 db rl cc11_tx tx common mode return loss 150mhz C 300mhz 300mhz C 600mhz 600mhz C 1.2ghz 1.2ghz C 2.4ghz 2.4ghz C 3.0ghz 3.0 ghz C 5.0ghz 5 5 2 2 1 1 db rl dc11_tx tx impedance balance 150mhz C 300mhz 300mhz C 600mhz 600mhz C 1.2ghz 1.2ghz C 2.4ghz 2.4ghz C 3.0ghz 3.0 ghz C 5.0ghz 30 20 10 10 4 4 db lvcmos control pins v ih input high voltage 0.65 v dd v v il input low voltage 0.35 v dd i ih input high current 100 a i il input low current 100 ac/dc electrical characteristics (cml transmitter output continued) 10-0248
www.pericom.com ps9016b 12/09/10 7 PI3EQX4951B 3.3v, 1-port, sata2 i/m redriver? with analog/digital confguration test condition referenced in the electrical characteristic table d.u.t. signal source sma connector in out a sma connector b c fr4 30 in standard mode implementation diagram xi+ xi- eq xo+ xo- x_em r3 mode recommended coupling capacitors are 4.7nf output t/s/t 4/8/4 mil fr4 pcb trace output awg 28 sata cable r3 < 6 inch < 36 inch 0 > 6 inch > 36 inch open emphasis setting for pcb trace or cable v d+ common mode voltage v_d+ - v_d- 0v v cm v diff v d- v diffp-p v diffp-p v d+ v cm v diff v d- 1 st t bit 2 nd + t bit(s) v diff-pre pre-emphasis = 20 . log(v diff-pre /v diff ) defnition of diferential voltage and diferential voltage peak-to-peak defnition of pre-emphasis 10-0248
www.pericom.com ps9016b 12/09/10 8 PI3EQX4951B 3.3v, 1-port, sata2 i/m redriver? with analog/digital confguration notes: 1. pericom pi3eqx4951 control pins are with internal 100k pull up r. 2. the r6, r10, r11 are use in standard mode. xi+ xi- x_eq eq v dd xo+ xo- x_em rem recommended coupling capacitors are 4.7nf 1.0k 6 inch > 36 inch open equalization setting for pcb trace or cable output t/s/t 4/8/4 mil fr4 pcb trace output awg 28 sata cable pre-emphasis db rem < 3 inch < 18 inch 0 15k 4 inch 30 inch 1.5db 7.5k 6 inch 30 inch 2.0db 6.2k 8 inch 40 inch 2.5db 5.1k 12 inch 60 inch 3.5db 3.3k 16 inch 48 inch 4.5db 2.2k 24 inch 48 inch 6.0db 1.1k rem suggested inital values for pcb trace or cable enhanced mode implementation diagram application schematic 10-0248
www.pericom.com ps9016b 12/09/10 9 PI3EQX4951B 3.3v, 1-port, sata2 i/m redriver? with analog/digital confguration 1 : 20-lead, thin fine pitch quad flat no-lead (tqfn) noitpircsed :edoc egakcap 2084-dp :# lortnoc tnemucod -- :noisiver 80/11/90 :etad zd20 08-0456 ordering information ordering number package code package description PI3EQX4951Bzde zd pb-free and green 20-contact tqfn (4x4mm) notes: ? t ermal characteristics can be found on the company web site at www.pericom.com/packaging/ ? e = p b-free and green ? x s ufx = tape/reel pericom semiconductor corporation ? 1-800-435-2336 ? all trademarks are property of their respective owners. packaging mechanical: 20-contact tqfn (zd) note: for latest package info, please check: http://www.pericom.com/products/packaging/mechanicals.php 10-0248
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