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c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - s e p . , 2 0 1 3 a p l 3 2 1 2 a / b / c w w w . a n p e c . c o m . t w 1 a n p e c r e s e r v e s t h e r i g h t t o m a k e c h a n g e s t o i m p r o v e r e l i a b i l i t y o r m a n u f a c t u r a b i l i t y w i t h o u t n o t i c e , a n d a d v i s e c u s t o m e r s t o o b t a i n t h e l a t e s t v e r s i o n o f r e l e v a n t i n f o r m a t i o n t o v e r i f y b e f o r e p l a c i n g o r d e r s . l i + c h a r g e r p r o t e c t i o n i c p r o v i d e i n p u t o v e r - v o l t a g e p r o t e c t i o n p r o g r a m m a b l e i n p u t o v e r - c u r r e n t p r o t e c t i o n b a t t e r y o v e r - v o l t a g e 4 . 3 5 v / 4 . 4 3 5 v p r o t e c t i o n o v e r - t e m p e r a t u r e p r o t e c t i o n h i g h i m m u n i t y o f f a l s e t r i g g e r i n g h i g h a c c u r a c y p r o t e c t i o n t h r e s h o l d s f a u l t s t a t u s i n d i c a t i o n e n a b l e i n p u t a v a i l a b l e i n t d f n 2 x 2 - 8 p a c k a g e lead free and green devices available (rohs compliant) t h e a p l 3 2 1 2 a / b / c p r o v i d e c o m p l e t e l i + c h a r g e r p r o t e c - t i o n s a g a i n s t o v e r - v o l t a g e , o v e r - c u r r e n t , a n d b a t t e r y o v e r - v o l t a g e . t h e i c i s d e s i g n e d t o m o n i t o r i n p u t v o l t a g e , i n - p u t c u r r e n t , a n d b a t t e r y v o l t a g e . w h e n a n y o f t h e m o n i - t o r e d p a r a m e t e r s a r e o v e r t h e t h r e s h o l d , t h e i c r e m o v e s t h e p o w e r f r o m t h e c h a r g i n g s y s t e m b y t u r n i n g o f f a n i n - t e r n a l s w i t c h . a l l p r o t e c t i o n s a l s o h a v e d e g l i t c h t i m e a g a i n s t f a l s e t r i g g e r i n g d u e t o v o l t a g e s p i k e s o r c u r r e n t t r a n s i e n t s . t h e a p l 3 2 1 2 a / b / c a l s o p r o v i d e o v e r - t e m p e r a - t u r e p r o t e c t i o n , a f a u l t o u t p u t p i n t o i n d i c a t e t h e f a u l t c o n d i t i o n s , a n d t h e e n p i n t o a l l o w t h e s y s t e m t o d i s a b l e t h e i c . f e a t u r e s g e n e r a l d e s c r i p t i o n a p p l i c a t i o n s s m a r t p h o n e s a n d p d a s d i g i t a l s t i l l c a m e r a s p o r t a b l e d e v i c e s p i n c o n f i g u r a t i o n s i m p l i f i e d a p p l i c a t i o n c i r c u i t = exposed pad ( connected to ground plane for better heat dissipation ) tdfn 2 x 2 - 8 ( top view ) acin 1 batsl 3 8 out gnd 2 7 ilim 6 bat fault 4 5 en acin ilim out bat gnd apl 3212 a / b / c li + battery en fault 5 v adapter or usb charger input charger output and system batsl
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - s e p . , 2 0 1 3 w w w . a n p e c . c o m . t w 2 a p l 3 2 1 2 a / b / c o r d e r i n g a n d m a r k i n g i n f o r m a t i o n n o t e : a n p e c l e a d - f r e e p r o d u c t s c o n t a i n m o l d i n g c o m p o u n d s / d i e a t t a c h m a t e r i a l s a n d 1 0 0 % m a t t e t i n p l a t e t e r m i n a t i o n f i n i s h ; w h i c h a r e f u l l y c o m p l i a n t w i t h r o h s . a n p e c l e a d - f r e e p r o d u c t s m e e t o r e x c e e d t h e l e a d - f r e e r e q u i r e m e n t s o f i p c / j e d e c j - s t d - 0 2 0 d f o r m s l c l a s s i f i c a t i o n a t l e a d - f r e e p e a k r e f l o w t e m p e r a t u r e . a n p e c d e f i n e s ? g r e e n ? t o m e a n l e a d - f r e e ( r o h s c o m p l i a n t ) a n d h a l o g e n f r e e ( b r o r c l d o e s n o t e x c e e d 9 0 0 p p m b y w e i g h t i n h o m o g e n e o u s m a t e r i a l a n d t o t a l o f b r a n d c l d o e s n o t e x c e e d 1 5 0 0 p p m b y w e i g h t ) . a b s o l u t e m a x i m u m r a t i n g s ( n o t e 1 ) symbol parameter rating unit v acin in input voltage (acin in to gnd) - 0.3 to 30 v v out , v bat out, bat pins to gnd voltage - 0.3 to 7 v v lim , v fault , v en, v batsl ilim, fault, en,batsl to gnd voltage - 0.3 to 7 v t j maximum junction temperature 150 o c t stg storage temperature range - 65 to 150 o c t sdr maximum lead soldering temperature , 10 seconds 260 o c n o t e 1 : s t r e s s e s b e y o n d t h o s e l i s t e d u n d e r " a b s o l u t e m a x i m u m r a t i n g s " m a y c a u s e p e r m a n e n t d a m a g e t o t h e d e v i c e . t h e s e a r e s t r e s s r a t i n g s o n l y a n d f u n c t i o n a l o p e r a t i o n o f t h e d e v i c e a t t h e s e o r a n y o t h e r c o n d i t i o n s b e y o n d t h o s e i n d i c a t e d u n d e r " r e c o m - m e n d e d o p e r a t i n g c o n d i t i o n s " i s n o t i m p l i e d . e x p o s u r e t o a b s o l u t e m a x i m u m r a t i n g c o n d i t i o n s f o r e x t e n d e d p e r i o d s m a y a f f e c t d e v i c e r e l i a b i l i t y . apl 3212 a / b / c package code qb : tdfn 2 x 2 - 8 operating ambient temperature range i : - 40 to 85 o c handling code tr : tape & reel assembly material g : halogen and lead free device handling code temperature range package code apl 3212 a qb : x - date code assembly material l 12 a x apl 3212 b qb : x - date code l 12 b x apl 3212 c qb : x - date code l 12 c x t h e r m a l c h a r a c t e r i s t i c s symbol parameter typical value unit q ja junction to ambient t hermal r esistance in free air (note 2) tdfn2x2 - 8 75 c/w note 2 : q ja is measured with the component mounted on a high effective thermal conductivity test board in free air.
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - s e p . , 2 0 1 3 w w w . a n p e c . c o m . t w 3 a p l 3 2 1 2 a / b / c r e c o m m e n d e d o p e r a t i n g c o n d i t i o n s ( n o t e 3 ) symbol parameter range unit v acin acin input voltage 4.5 to 5.5 v i out out output current 0 to 2 a t j junction temperature - 40 to 125 c t a ambient temperature - 40 to 85 c note 2 : refer th the typical application circuit. apl3212a/b/c symbol parameter test conditions min. typ. max. unit acin input current and power - on - reset(por) en = low - 250 350 i acin acin supply current en = high - 100 150 m a v acin acin por threshold v in rising 2.4 2.6 2.8 v acin por hyster esis 200 250 300 t b(acin) acin power - on blanking time v in rising to v out rising - 8 - ms internal switch on resistance r on power switch on resistance i out = 0.8a - 130 - m w out discharge resistance v out = 3v - 500 - w input over - voltage protection (ovp) apl3212a, t j = - 40~125 o c 5.7 5.85 6.0 apl3212b, t j = - 40~125 o c 6.6 6.8 7.0 v ovp input ovp threshold apl3212c t j = - 40~125 o c 7.0 7.2 7.4 v input ovp hysteresis - 250 - mv input ovp propagation delay vacin=5 to 12v, i ut =10ma - 1 - m s t on(ovp) input ovp recovery time - 8 - ms over - current protection (ocp) ocp threshold r ocset =25k w , t j =25 o c 900 1000 1100 ma i ocp ocp accuracy i ocp =800ma~2500ma(or 1a~1.5a), t j =25 o c - 10 - +10 % i ocp(max) maximum ocp threshold r ocset =0 w , t j =25 o c - 3 - a t b(ocp ) ocp blanking time - 176 - m s t on(ocp) ocp recovery time - 64 - ms refer to the typical application circuit. these specifications apply over v in =5v, t a = -40~85 c , unless otherwise specified. typical values are at t j =25 c. e l e c t r i c a l c h a r a c t e r i s t i c s
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - s e p . , 2 0 1 3 w w w . a n p e c . c o m . t w 4 a p l 3 2 1 2 a / b / c refer to the typical application circuit. these specifications apply over v in =5v, t a = -40~85 c , unless otherwise specified. typical values are at t a =25 c. e l e c t r i c a l c h a r a c t e r i s t i c s apl3212a/b/c symbol parameter test conditions min. typ. max. unit battery over - voltage protection batsl = low or floating, t j = - 40 ~ 1 25 o c 4.4 4.435 4.47 v v bovp battery ovp threshold batsl = high, t j = - 40 ~ 1 25 o c 4.30 4.35 4.40 v battery o vp hysteresis 200 250 300 mv i bat bat pin leakage current v bat = 4.4v - - 20 na t b(bovp) battery ovp blanking time - 176 - m s batsl logic levels batsl input logic high 1.4 - - v v batsl batsl input logic low - - 0.4 v i batsl batsl input current v batsl = 3.3v - 1.5 - m a en logic levels en input logic high 1.4 - - v v en en input logic low - - 0.4 v en internal pull - low resistor - 500 - k w fault logic levels and delay time v fault fault output low voltage sink 5ma current - - 0.4 v fault leakage current v fault = 5v - - 1 m a thermal shutdown protection t otp thermal shutdown threshold - 140 - c thermal shutdown hysteresis - 20 - c
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - s e p . , 2 0 1 3 w w w . a n p e c . c o m . t w 5 a p l 3 2 1 2 a / b / c t y p i c a l o p e r a t i n g c h a r a c t e r i s t i c s input ovp threshold vs . junction temperature i n p u t o v p t h r e s h o l d , v o v p ( v ) junction temperature ( o c ) 6 . 2 6 . 3 6 . 4 6 . 5 6 . 6 6 . 7 6 . 8 - 40 0 40 80 120 v in decreasing v in increasing battery ovp threshold vs . junction temperature b a t t e r y o v p t h r e s h o l d , v b o v p ( v ) junction temperature ( o c ) 4 4 . 1 4 . 2 4 . 3 4 . 4 4 . 5 4 . 6 - 40 0 40 80 120 batsl = low v bat decreasing v bat increasing battery ovp threshold vs . junction temperature b a t t e r y o v p t h r e s h o l d , v b o v p ( v ) junction temperature ( o c ) 3 . 9 4 4 . 1 4 . 2 4 . 3 4 . 4 4 . 5 - 40 0 40 80 120 batsl = high v bat decreasing v bat increasing in supply current vs . junction temperature i n s u p p l y c u r r e n t , i c c ( m a ) junction temperature ( o c ) 180 200 220 240 260 280 - 40 0 40 80 120 por threshold vs . junction temperature junction temperature ( o c ) p o r t h r e s h o l d , v p o r ( v ) 2 2 . 1 2 . 2 2 . 3 2 . 4 2 . 5 2 . 6 - 40 0 40 80 120 v in decreasing v in increasing ocp threshold vs . junction temperature o c p t h r e s h o l d , i o c p ( a ) junction temperature ( o c ) 0 . 5 0 . 7 0 . 9 1 . 1 1 . 3 1 . 5 - 40 0 40 80 120
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - s e p . , 2 0 1 3 w w w . a n p e c . c o m . t w 6 a p l 3 2 1 2 a / b / c t y p i c a l o p e r a t i n g c h a r a c t e r i s t i c s power switch on resistance vs . junction temperature p o w e r s w i t c h o n r e s i s t a n c e , r d s , o n ( m w ) junction temperature ( o c ) 50 100 150 200 250 300 - 40 0 40 80 120 p o w e r s w i t c h o n r e s i s t a n c e , r d s , o n ( m w ) power switch on resistance vs . input voltage input voltage ( v ) i out = 0 . 5 a 50 100 150 200 250 300 2 . 5 3 3 . 5 4 4 . 5 5 5 . 5
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - s e p . , 2 0 1 3 w w w . a n p e c . c o m . t w 7 a p l 3 2 1 2 a / b / c o p e r a t i n g w a v e f o r m s normal power on v in = 0 to 5 v c out = 1 m f , c in = 1 m f , r out = 10 w ch 1 : v in , 5 v / div , dc ch 2 : v out , 2 v / div , dc ch 3 : i out , 0 . 5 a / div , dc time : 2 ms / div 1 2 3 v in v out i out ovp at power on v in = 0 to 7 v c out = 1 m f , c in = 1 m f , r out = 10 w ch 1 : v in , 5 v / div , dc ch 2 : v out , 2 v / div , dc ch 3 : v fault , 5 v / div , dc time : 2 ms / div 1 2 3 v fault v in v out input over - voltage protection 1 2 3 v in = 5 to 7 v c out = 1 m f , c in = 1 m f , r out = 50 w ch 1 : v in , 5 v / div , dc ch 2 : v out , 2 v / div , dc ch 3 : v fault , 5 v / div , dc time : 20 m s / div v fault v in v out recovery from input ovp 1 2 3 v in = 7 v to 5 v c out = 1 m f , c in = 1 m f , r out = 50 w ch 1 : v in , 5 v / div , dc ch 2 : v out , 5 v / div , dc ch 3 : v fault , 5 v / div , dc time : 2 ms / div v fault v in v out
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - s e p . , 2 0 1 3 w w w . a n p e c . c o m . t w 8 a p l 3 2 1 2 a / b / c o p e r a t i n g w a v e f o r m s battery over - voltage protection 1 2 3 v bat = 3 . 6 v to 4 . 4 v to 3 . 6 v c out = 1 m f , c in = 1 m f , r out = 33 w ch 1 : v bat , 2 v / div , dc ch 2 : v out , 2 v / div , dc ch 3 : v fault , 5 v / div , dc time : 10 ms / div v fault v bat v out battery over - voltage protection 1 2 3 v bat = 3 . 6 v to 4 . 4 v c out = 1 m f , c in = 1 m f , r out = 33 w ch 1 : v bat , 2 v / div , dc ch 2 : v out , 2 v / div , dc ch 3 : v fault , 5 v / div , dc time : 40 m s / div v fault v bat v out recovery from battery ovp v bat = 4 . 4 v to 3 . 6 v c out = 1 m f , c in = 1 m f , r out = 33 w ch 1 : v bat , 2 v / div , dc ch 2 : v out , 2 v / div , dc ch 3 : v fault , 5 v / div , dc time : 100 m s / div 1 2 3 v fault v bat v out over - current protection c out = 1 m f , c in = 1 m f ch 1 : i out , 0 . 5 a / div , dc ch 2 : v out , 5 v / div , dc ch 3 : v fault , 5 v / div , dc time : 100 m s / div 1 2 3 v fault i out v out
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - s e p . , 2 0 1 3 w w w . a n p e c . c o m . t w 9 a p l 3 2 1 2 a / b / c pin no. name function 1 acin power supply input, connect to external dc supply. connect external 1f ceramic capacitor (minimum) to gnd. 2 gnd ground pin of the circuitry. all voltage levels are measured with respect to this pin. 3 batsl battery ovp t hreshold selection: v batsl = high, v bovp = 4.30v ~ 4.4v. v batsl = low, v bovp = 4.4v ~ 4.47v. 4 fault fault indication pin. this pin goes low when input ovp, ocp or battery ovp is detected. 5 en enable input. pull th is pin to high to disable the device and pull this pin to low to enable device. 6 bat battery ovp sense pin. connect to positive terminal of battery through a resistor. 7 ilim over - current protection setting pin. connect a resistor (r ocset ) to gnd to set the over - current threshold. when left open, the internal power fet will be turned off . 8 out output pins. output voltage pin. the output voltage follows the input voltage when no fault is detected exposed pad - exposed thermal pad. connect this pad to s ystem ground plane for good thermal conductivity. p i n d e s c r i p t i o n b l o c k d i a g r a m gate driver and control logic por acin bat ilim out otp charge pump fault en gnd 0 . 5 v 1 . 2 v batsl 0 . 8 v bat ovp acin ovp ocp battery ovp threshold selection
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - s e p . , 2 0 1 3 w w w . a n p e c . c o m . t w 1 0 a p l 3 2 1 2 a / b / c t y p i c a l a p p l i c a t i o n c i r c u i t figure 1. the typical protection circuit for charger systems. mcu li + battery pmu c out 1 m f 200 k w apm 2805 qa 0 . 2 w acin out bat ilim apl 3212 a / b / c fault en gnd batsl c acin 1 m f 5 v adapter / usb vio gpi o gpi o gpi o 50 k w 50 k w 50 k w 50 k w chrin gtdrv isens vbat 25 k 1 2 4 7 5 3 6 8 1 m f , 10 v , x 5 r , 0603 murata grm 188 r 61 a 105 k c out murata grm 188 r 61 e 105 k c acin designation 1 m f , 25 v , x 5 r , 0603 murata website : www . murata . com
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - s e p . , 2 0 1 3 w w w . a n p e c . c o m . t w 1 1 a p l 3 2 1 2 a / b / c the output current is monitored by the internal ocp circuit. when the output current reaches the ocp threshold, the device limits the output current at ocp threshold level. if the ocp condition continues for a blanking time of t b(ocp) , the internal power fet is turned off. after the recovery time of t on(ocp) , the fet will be turned on again and the output current is monitored again. the ocp threshold is programmed by a resistor r ilim connected from ilim pin to gnd. the ocp threshold is calculated by the following equation: the apl3212a/b/c provide an open-drain output to indi- cate that a fault has occurred. when any of input ovp, ocp, battery ovp, is detected, the fault goes low to indicate that a fault has occurred. since the fault pin is an open-drain output, connecting a resistor to a pull high voltage is necessary. enable/shutdown pull the en pin voltage above 1.4v to disable the device and pull en pin voltage below 0.4v to enable the device. the en pin has an internal pull-down resistor and can be left floating. when the ic is latched off due to the total count of ocp or battery ovp reaches 16, disable and re- enable the device with the en pin can clear the counter. over-temperature protection when the junction temperature exceeds 140 o c, the inter- nal thermal sense circuit turns off the power fet and allows the device to cool down. when the device?s junc- tion temperature cools by 20 o c , the internal thermal sense circuit will enable the device, resulting in a pulsed output during continuous thermal protection. thermal protec- tion is designed to protect the ic in the event of over tem- perature conditions. for normal operation, the junction temperature cannot exceed t j =+125 o c. the apl3212a/b/c monitor the bat pin voltage for battery over-voltage protection. the battery ovp threshold is in- ternally set to 4.35v. when the bat pin voltage exceeds the battery ovp threshold for a blanking time of t b(bovp) , battery over-voltage protection f u n c t i o n d e s c r i p t i o n acin power-on-reset (por) the apl3212a/b/c have a built-in power-on-reset circuit to keep the output shutting off until internal circuitry is operating properly. the por circuit has hysteresis and a de-glitch feature so that it will typically ignore undershoot transients on the input. when input voltage exceeds the por threshold and after 8ms blanking time, the output voltage starts a soft-start to reduce the inrush current. ilim ilim ocp r k i = over-current protection (ocp) i n p u t o v e r - v o l t a g e p r o t e c t i o n ( o v p ) the input voltage is monitored by the internal ovp circuit. when the input voltage rises above the input ovp threshold, the internal fet will be turned off within 1 m s to protect connected system on out pin. when the input voltage returns below the input ovp threshold minus the hysteresis, the fet is turned on again after 8ms recovery time. the input ovp circuit has a 250mv hysteresis and a recovery time of t on(ovp) to provide noise immunity against transient conditions.(see figure 2.) the internal power fet is turned off. when the bp voltage returns below the battery ovp threshold minus the hysteresis, the fet is turned on again. the apl3212a/b/ c have a built-in counter. when the total count of battery ovp fault reaches 16, the fet is turned off permanently, requiring either a v in por or en re-enable again to restart. fault output where k ilim =25000a w esd tests the apl3212a/b/c vin input pin fully supports the iec61000-4-2. that means the vin pin has immunity of + 15kv esd discharge in air condition, and immunity of + 8kv esd discharge in contact condition.
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - s e p . , 2 0 1 3 w w w . a n p e c . c o m . t w 1 2 a p l 3 2 1 2 a / b / c f u n c t i o n d e s c r i p t i o n ( c o n t . ) powering an accessory device in some applications, such as usb on-the-go, users need to power an accessory device by using the portable device?s battery through the jack holes of ac adapter. the apl3212a/b/c provide reverse current flow path from out to in. if v out > v por + 0.7v, fet q1 is turned on, and the reverse current does not flow through the diode but through q1. q1 will then remain on as long as v out > v por -v por_hys + r ds_on *isupply. within this voltage range, the reverse current capability is the same as the forward capability, 1.5a. it should be noted that there is no overcurrent protection in this direction. apl 3212 charger battery accessory power supply to system enable disable jack accessory device portable device in out gate driver and logic control q 1 i supply v out
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - s e p . , 2 0 1 3 w w w . a n p e c . c o m . t w 1 3 a p l 3 2 1 2 a / b / c f u n c t i o n d e s c r i p t i o n ( c o n t . ) t b(in) v in v out t on(ovp) v ovp v por v fault figure 2. ovp timing chart figure 3 . ocp timing chart i out v out v fault t b ( ocp ) t on ( ocp ) t b ( ocp ) ocp threshold
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - s e p . , 2 0 1 3 w w w . a n p e c . c o m . t w 1 4 a p l 3 2 1 2 a / b / c f u n c t i o n d e s c r i p t i o n ( c o n t . ) figure 4. battery ovp timing chart t b(bovp) count 13 times v out v bat v fault v bovp v bovp v bovp total count 16 times ic is latched off t b(bovp) t b(bovp)
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - s e p . , 2 0 1 3 w w w . a n p e c . c o m . t w 1 5 a p l 3 2 1 2 a / b / c a p p l i c a t i o n i n f o r m a t i o n r bat selection connect the bat pin to the positive terminal of battery through a resistor r bat for battery ovp function. the r bat limits the current flowing from bat to battery in case of bat pin is shortened to vin pin under a failure mode. the recommended value of r bat is 100k w . in the worse case of an ic failure, the current flowing from the bat pin to the battery is: (30v-3v)/ 100k w =270 m a where the 30v is the maximum in voltage and the 3v is the minimum battery voltage. the current is so small and can be absorbed by the charger system. the disadvantage with the large r bat is that the error of the battery ovp threshold will be increased. the addi- tional error is the voltage drop across the r bat because of the bat bias current. when r bat is 100k w, the worse- case additional error is 100k w x20na=2mv, which is ac- ceptable in most applications. r en selection since the io voltage is divided by r en and en internal pull low resistor for en voltage. it has to be ensured that the en voltage is above the en logic high voltage when the gpio output of the mcu is high. fault output since the fault pin is an open-drain output, connecting a resistor r up to a pull high voltage is necessary. it is also recommended that connect the fault to the mcu gpio through a resistor r fault . the r fault prevents damage to the mcu under a failure mode. the recommended value of the resistors should be between 10k w to 100k w . capacitor selection the input capacitor is for decoupling and prevents the input voltage from overshooting to dangerous levels. in the ac adapter hot plug-in applications or load current step-down transient, the input voltage has a transient spike due to the parasitic inductance of the input cable. a 25v, x5r, dielectric ceramic capacitor with a value be- tween 1 m f and 4.7 m f placed close to the in pin is recommended. the output capacitor is for output voltage decoupling, and also can be as the input capacitor of the charging circuit. at least, a 1 m f, 10v, x5r capacitor is recommended. for the same reason as the bat pin case, the en pin should be connected to the mcu gpio pin through a resistor. the value of the r en is dependent on the io voltage of the mcu. in some failure modes, a high voltage may be applied to the device. make sure the clearance constraint of the pcb layout must satisfy the design rule for high voltage. the exposed pad of the tdfn2x2-8 performs the func- tion of channeling heat away. it is recommended that connect the exposed pad to a large copper ground plane on the backside of the circuit board through several ther- mal vias to improve heat dissipation. the input and output capacitors should be placed close to the ic. r ilim also should be placed close to the ic. the high current traces like input trace and output trace must be wide and short. layout consideration bat li+ battery en fault mcu r up r fault r en r bat vio gpio gpio figure 5. r up , r fault , r en and r bat
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - s e p . , 2 0 1 3 w w w . a n p e c . c o m . t w 1 6 a p l 3 2 1 2 a / b / c p a c k a g e i n f o r m a t i o n t d f n 2 x 2 - 8 min. max. 0.80 0.00 0.18 0.30 1.00 1.60 0.05 0.60 a a1 b d d2 e e2 e l millimeters a3 0.20 ref tdfn2x2-8 0.30 0.45 1.00 0.008 ref min. max. inches 0.031 0.000 0.007 0.012 0.039 0.063 0.024 0.012 0.018 0.70 0.039 0.028 0.002 0.50 bsc 0.020 bsc s y m b o l 1.90 2.10 0.075 0.083 1.90 2.10 0.075 0.083 d e a b a1 a3 d2 e 2 l e pin 1 corner
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - s e p . , 2 0 1 3 w w w . a n p e c . c o m . t w 1 7 a p l 3 2 1 2 a / b / c package type unit quantity tdfn2x2 - 8 tape & reel 3000 c a r r i e r t a p e & r e e l d i m e n s i o n s application a h t1 c d d w e1 f 178.0 ? 2.00 50 min. 8.4+2.00 - 0.00 13.0+0.50 - 0.20 1.5 min. 20.2 min. 8.0 ? 0.20 1.75 ? 0.10 3.50 ? 0.05 p 0 p1 p 2 d 0 d1 t a 0 b 0 k 0 tdfn2x2 - 8 4.0 ? 0.10 4.0 ? 0.10 2.0 ? 0.05 1.5+0.10 - 0.00 1.5 min. 0.6+0.00 - 0 .4 3.35 min 3.35 min 1.30 ? 0.20 (mm) h t1 a d a e 1 a b w f t p0 od0 b a0 p2 k0 b 0 section b-b section a-a od1 p1 d e v i c e s p e r u n i t
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - s e p . , 2 0 1 3 w w w . a n p e c . c o m . t w 1 8 a p l 3 2 1 2 a / b / c t a p i n g d i r e c t i o n i n f o r m a t i o n c l a s s i f i c a t i o n p r o f i l e t d f n 2 x 2 - 8 user direction of feed
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - s e p . , 2 0 1 3 w w w . a n p e c . c o m . t w 1 9 a p l 3 2 1 2 a / b / c profile feature sn - pb eutectic assembly pb - free assembly preheat & soak temperature min (t smin ) temperature max (t smax ) time (t smin to t smax ) ( t s ) 100 c 150 c 60 - 120 seconds 150 c 200 c 60 - 1 2 0 seconds average ramp - up rate (t smax to t p ) 3 c/second ma x. 3 c/second max. liquidous temperature ( t l ) time at l iquidous (t l ) 183 c 60 - 150 seconds 217 c 60 - 150 seconds peak package body temperature (t p ) * see classification temp in table 1 see classification temp in table 2 time (t p ) ** within 5 c of the spec ified c lassification t emperature ( t c ) 2 0 ** seconds 3 0 ** seconds average r amp - down rate (t p to t smax ) 6 c/second max. 6 c/second max. time 25 c to p eak t emperature 6 minutes max. 8 minutes max. * tolerance for peak profile temperature (t p ) is defined a s a supplier minimum and a user maximum. ** tolerance for time at peak profile temperature (t p ) is defined as a supplier minimum and a user maximum. c l a s s i f i c a t i o n r e f l o w p r o f i l e s table 2. pb - free process ? classification temperatures (tc) package thickness volume mm 3 <350 volume mm 3 350 - 2000 volume mm 3 >2000 <1.6 mm 260 c 260 c 260 c 1.6 mm ? 2.5 mm 260 c 250 c 245 c 3 2.5 mm 250 c 245 c 245 c table 1. snpb eutectic process ? classification temperatures (tc) package thickness volume mm 3 <350 volume mm 3 3 350 <2.5 mm 235 c 22 0 c 3 2.5 mm 220 c 220 c r e l i a b i l i t y t e s t p r o g r a m test item method description solderability jesd - 22, b102 5 sec, 245 c holt jesd - 22, a108 1000 hrs, bias @ 125 c pct jesd - 22, a102 168 hrs, 100 % rh, 2atm , 121 c tct jesd - 22, a104 500 cycles, - 65 c~150 c hbm mil - std - 883 - 3015.7 vhbm ? 2kv mm jesd - 22, a115 vmm ? 200v latch - up jesd 78 10ms, 1 tr ? 100ma
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - s e p . , 2 0 1 3 w w w . a n p e c . c o m . t w 2 0 a p l 3 2 1 2 a / b / c c u s t o m e r s e r v i c e a n p e c e l e c t r o n i c s c o r p . head office : no.6, dusing 1st road, sbip, hsin-chu, taiwan, r.o.c. tel : 886-3-5642000 fax : 886-3-5642050 t a i p e i b r a n c h : 2 f , n o . 1 1 , l a n e 2 1 8 , s e c 2 j h o n g s i n g r d . , s i n d i a n c i t y , t a i p e i c o u n t y 2 3 1 4 6 , t a i w a n t e l : 8 8 6 - 2 - 2 9 1 0 - 3 8 3 8 f a x : 8 8 6 - 2 - 2 9 1 7 - 3 8 3 8

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