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cmos single-supply, rail-to-rail input/output operational amplifiers with shutdown AD8591/ad8592/ad8594 rev. b information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2009 analog devices, inc. all rights reserved. features single-supply operation: 2.5 v to 6 v high output current: 250 ma extremely low shutdown supply current: 100 na low supply current: 750 a/amp wide bandwidth: 3 mhz slew rate: 5 v/s no phase reversal very low input bias current high impedance outputs when in shutdown mode unity-gain stable applications mobile communication handset audio pc audio pcmcia/modem line driving battery-powered instrumentation data acquisition asic input or output amplifiers lcd display reference level drivers general description the AD8591, ad8592, and ad8594 are single, dual, and quad rail-to-rail, input and output single-supply amplifiers featuring 250 ma output drive current and a power saving shutdown mode. the ad8592 includes an independent shutdown function for each amplifier. when both amplifiers are in shutdown mode, the total supply current is reduced to less than 1 a. the AD8591 and ad8594 include a single master shutdown function that reduces the total supply current to less than 1 a. all amplifier outputs are in a high impedance state when in shutdown mode. these amplifiers have very low input bias currents, making them suitable for integrators and diode amplification. outputs are stable with virtually any capacitive load. supply current is less than 750 a per amplifier in active mode. applications for these amplifiers include audio amplification for portable computers, portable phone headsets, sound ports, sound cards, and set-top boxes. the ad859x family is capable of driving heavy capacitive loads, such as lcd panel reference levels. the ability to swing rail to rail at both the input and output enables designers to buffer cmos dacs, asics, and other wide output swing devices in single-supply systems. pin configurations o ut a 1 v? 2 +in a 3 v+ 6 sd 5 ?in a 4 ad 8591 top view (not to scale) 0 1106-001 figure 1. 6-lead sot-23 (rj suffix) sdb v? +in b out a ?in a +in a v+ out b ?in b sda 1 2 3 4 5 10 9 8 7 6 ad 8592 top view (not to scale) 0 1106-002 figure 2. 10-lead msop (rm suffix) out a ?in a v+ +in a +in b ?in b out b nc out d ?in d +in d v? +in c ?in c out c sd 1 2 3 4 16 15 14 13 5 12 6 11 7 10 8 9 nc = no connect ad 8594 top view (not to scale) 01106-003 figure 3. 16-lead narrow soic (r suffix) out a ?in a v+ +in a +in b ?in b out b nc out d ?in d +in d v? +in c ?in c out c sd nc = no connect 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 ad 8594 top view (not to scale) 01106-004 figure 4. 16-lead tssop (ru suffix) the AD8591, ad8592, and ad8594 are specified over the industrial temperature range (?40c to +85c). the AD8591, single, is available in the tiny 6-lead sot-23 package. the ad8592, dual, is available in the 10-lead surface-mount msop package. the ad8594, quad, is available in 16-lead narrow soic and 16-lead tssop packages.
AD8591/ad8592/ad8594 rev. b | page 2 of 16 table of contents features .............................................................................................. 1 ? applications ....................................................................................... 1 ? general description ......................................................................... 1 ? pin configurations ........................................................................... 1 ? revision history ............................................................................... 2 ? specifications ..................................................................................... 3 ? electrical characteristics ............................................................. 3 ? absolute maximum ratings ............................................................ 5 ? thermal resistance ...................................................................... 5 ? esd caution .................................................................................. 5 ? typical performance characteristics ............................................. 6 ? theory of operation ...................................................................... 11 ? input voltage protection............................................................ 11 ? output phase reversal ............................................................... 11 ? output short-circuit protection .............................................. 11 ? power dissipation....................................................................... 11 ? capacitive loading ..................................................................... 12 ? pc98-compliant headphone/speaker amplifier .................. 12 ? a combined microphone and speaker amplifier for cellphone and portable headsets ............................................ 13 ? an inexpensive sample-and-hold circuit ............................. 13 ? direct access arrangement for pcmcia modems (telephone line interface) ........................................................ 14 ? single-supply differential line driver .................................... 14 ? outline dimensions ....................................................................... 15 ? ordering guide .......................................................................... 16 ? revision history 1/09rev. a to rev. b updated format .................................................................. universal changes to table 1 ............................................................................ 3 changes to table 2 ............................................................................ 4 deleted spice model for AD8591/ad8592/ad8594 amplifiers sections ............................................................................................ 12 changes to pc98-compliant headphone/speaker amplifier section and figure 38 ..................................................................... 12 changes to figure 39 ...................................................................... 13 changes to figure 42 and figure 43 ............................................. 14 updated outline dimensions ....................................................... 15 changes to ordering guide .......................................................... 16
AD8591/ad8592/ad8594 rev. b | page 3 of 16 specifications electrical characteristics v s = 2.7 v, v cm = 1.35 v, t a = 25c, unless otherwise noted. table 1. parameter symbol test conditions min typ max unit input characteristics offset voltage v os 25 mv ?40c < t a < +85c 30 mv input bias current i b 5 50 pa ?40c < t a < +85c 60 pa input offset current i os 1 25 pa ?40c < t a < +85c 30 pa input voltage range 0 2.7 v common-mode rejection ratio cmrr v cm = 0 v to 2.7 v 38 45 db large signal voltage gain a vo r l = 2 k, v o = 0.3 v to 2.4 v 25 v/mv offset voltage drift v os /t ?40c < t a < +85c 20 v/c bias current drift i b /t ?40c < t a < +85c 50 fa/c offset current drift i os /t ?40c < t a < +85c 20 fa/c output characteristics output voltage high v oh i l = 10 ma 2.55 2.61 v ?40c to +85c 2.5 v output voltage low v ol i l = 10 ma 60 100 mv ?40c to +85c 125 mv output current i out 250 ma open-loop impedance z out f = 1 mhz, a v = 1 60 power supply power supply rejection ratio psrr v s = 2.5 v to 6 v 45 55 db supply current per amplifier i sy v o = 0 v 1 ma ?40c < t a < +85c 1.25 ma supply current shutdown mode i sd all amplifiers shut down 0.1 1 a ?40c < t a < +85c 1 a i sd1 amplifier 1 shut down (ad8592) 1.4 ma i sd2 amplifier 2 shut down (ad8592) 1.4 ma shutdown inputs logic high voltage v inh ?40c < t a < +85c 1.6 v logic low voltage v inl ?40c < t a < +85c 0.5 v logic input current i in ?40c < t a < +85c 1 a dynamic performance slew rate sr r l = 2 k 3.5 v/s settling time t s to 0.01% 1.4 s gain bandwidth product gbp 2.2 mhz phase margin o 67 degrees channel separation cs f = 1 khz, r l = 2 k 65 db noise performance voltage noise density e n f = 1 khz 45 nv/hz f = 10 khz 30 nv/hz current noise density i n f = 1 khz 0.05 pa/hz
AD8591/ad8592/ad8594 rev. b | page 4 of 16 v s = 5.0 v, v cm = 2.5 v, t a = 25c, unless otherwise noted. table 2. parameter symbol test conditions min typ max unit input characteristics offset voltage v os 2 25 mv ?40c < t a < +85c 30 mv input bias current i b 5 50 pa ?40c < t a < +85c 60 pa input offset current i os 1 25 pa ?40c < t a < +85c 30 pa input voltage range 0 5 v common-mode rejection ratio cmrr v cm = 0 v to 5 v 38 47 db large signal voltage gain a vo r l = 2 k, v o = 0.5 v to 4.5 v 15 30 v/mv offset voltage drift v os /t ?40c < t a < +85c 20 v/c bias current drift i b /t ?40c < t a < +85c 50 fa/c offset current drift i os /t ?40c < t a < +85c 20 fa/c output characteristics output voltage high v oh i l = 10 ma 4.9 4.94 v ?40c to +85c 4.85 v output voltage low v ol i l = 10 ma 50 100 mv ?40c to +85c 125 mv output current i out 250 ma open-loop impedance z out f = 1 mhz, a v = 1 40 power supply power supply rejection ratio psrr v s = 2.5 v to 6 v 45 55 db supply current per amplifier i sy v o = 0 v 1.25 ma ?40c < t a < +85c 1.75 ma supply current shutdown mode i sd all amplifiers shut down 0.1 1 a ?40c < t a < +85c 1 a i sd1 amplifier 1 shut down (ad8592) 1.6 ma i sd2 amplifier 2 shut down (ad8592) 1.6 ma shutdown inputs logic high voltage v inh ?40c < t a < +85c 2.4 v logic low voltage v inl ?40c < t a < +85c 0.8 v logic input current i in ?40c < t a < +85c 1 a dynamic performance slew rate sr r l = 2 k 5 v/s full power bandwidth bw p 1% distortion 325 khz settling time t s to 0.01% 1.6 s gain bandwidth product gbp 3 mhz phase margin o 70 degrees channel separation cs f = 1 khz, r l = 10 k 65 db noise performance voltage noise density e n f = 1 khz 45 nv/hz f = 10 khz 30 nv/hz current noise density i n f = 1 khz 0.05 pa/hz
AD8591/ad8592/ad8594 rev. b | page 5 of 16 absolute maximum ratings thermal resistance table 3. parameter rating supply voltage 6 v input voltage gnd to v s differential input voltage 6 v output short-circuit duration to gnd 1 observe derating curves storage temperature range ?65c to +150c operating temperature range ?40c to +85c junction temperature range ?65c to +150c lead temperature (soldering, 60 sec) 300c ja is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. table 4. package type ja jc unit 6-lead sot-23 (rj) 230 92 c/w 10-lead msop (rm) 200 44 c/w 16-lead soic (r) 120 36 c/w 16-lead tssop (ru) 180 35 c/w 1 for supplies less than 5 v, the differ ential input voltage is limited to the supplies. esd caution stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability.
AD8591/ad8592/ad8594 rev. b | page 6 of 16 typical performance characteristics 10 0.1 1 100 1k 1k 0.01 0.1 1 10 100 load current (ma) output voltage (mv) v s = 2.7v t a = 25c source sink 01106-005 figure 5. output voltage to supply rail vs. load current 10 0.1 1 100 10k 1k 1k 0.01 0.1 1 10 100 load current (ma) output voltage (mv) v s = 5v t a = 25c source sink 0 1106-006 figure 6. output voltage to supply rail vs. load current ?40 ?20 100 0 20406080 0.90 0.50 0.85 0.70 0.65 0.60 0.55 0.80 0.75 v s = 5v v s = 2.7v temperature (c) supply current/amplifier (ma) 01106-007 figure 7. supply current per amplifier vs. temperature 0.8 0.7 0 0.4 0.3 0.2 0.1 0.6 0.5 t a = 25c supply voltage (v) supply current/amplifier (ma) 0.75 1.25 1.75 2.25 2.75 3.00 01106-008 figure 8. supply current per amplifier vs. supply voltage ? 2 ?8 ?50 ?35 85 5 ?3 ?4 ?5 ?6 ?7 ?15 temperature (c) input offset voltage (mv) 25 45 65 v s = 5v v cm = 2.5v 01106-009 figure 9. input offset voltage vs. temperature 8 2 7 6 5 4 3 temperature (c) input bias current (pa) ?50 ?35 85 5 ?15 25 45 65 v s = 2.7v, 5v v cm = v s /2 01106-010 figure 10. input bias current vs. temperature
AD8591/ad8592/ad8594 rev. b | page 7 of 16 4 ?2 3 2 1 0 ?1 temperature (c) input offset current (pa) ?50 ?35 85 5 ?15 25 45 65 v s = 2.7v, 5v v cm = v s /2 01106-011 figure 11. input offset current vs. temperature 5 1 0 234 8 7 1 5 4 3 2 6 common-mode voltage (v) input bias current (pa) v s = 5v t a = 25c 0 1106-012 figure 12. input bias current vs. common-mode voltage 80 60 40 0 20 45 90 135 180 phase shift (degrees) frequency (hz) gain (db) 1k 10k 100k 1m 10m 100m v s = 2.7v r l = no load t a = 25c 01106-013 figure 13. open-loop gain and phase vs. frequency 80 60 40 0 20 45 90 135 180 phase shift (degrees) frequency (hz) gain (db) 1k 10k 100k 1m 10m 100m v s = 5v r l = no load t a = 25c 01106-014 figure 14. open-loop gain and phase vs. frequency 5 4 0 3 2 1 frequency (hz) output swing (v p-p) 1k 10k 100k 1m 10m v s = 2.7v r l = 2k ? t a = 25c v in = 2.5v p-p 01106-016 figure 15. closed-loop output voltage swing vs. frequency 5 4 0 3 2 1 frequency (hz) output swing (v p-p) 1k 10k 100k 1m 10m v s = 5v r l = 2k ? t a = 25c v in = 2.5v p-p 01106-017 figure 16. closed-loop output voltage swing vs. frequency
AD8591/ad8592/ad8594 rev. b | page 8 of 16 80 60 40 0 20 100 120 140 160 180 200 frequency (hz) impedance ( ? ) 1k 10k 100k 1m 10m 100m a v = 10 a v = 1 v s = 5v t a = 25c 01106-018 figure 17. closed-loop outp ut impedance vs. frequency 110 90 50 80 70 60 100 frequency (hz) cmrr (db) 1k 10k 100k 1m 10m v s = 5v t a = 25c 01106-019 figure 18. common-mode reje ction ratio vs. frequency 80 60 40 0 20 100 120 140 ?20 ?40 ?60 frequency (hz) psrr (db) 100 1k 10k 100k 1m 10m v s = 2.5v t a = 25c +psrr ?psrr 01106-020 figure 19. power supply reje ction ratio vs. frequency 80 60 40 0 20 100 120 140 ?20 ?40 ?60 frequency (hz) psrr (db) 100 1k 10k 100k 1m 10m v s = 5v t a = 25c +psrr ?psrr 01106-021 figure 20. power supply reje ction ratio vs. frequency 60 50 0 30 20 10 40 capacitance (pf) small signal overshoot (%) 10 100 1k 10k v s = 2.5v r l = 2k ? t a = 25c +os ?os 01106-022 figure 21. small signal overshoot vs. load capacitance 60 50 0 30 20 10 40 capacitance (pf) small signal overshoot (%) 10 100 1k 10k v s = 5v r l = 2k ? t a = 25c +os ?os 01106-023 figure 22. small signal overshoot vs. load capacitance
AD8591/ad8592/ad8594 rev. b | page 9 of 16 500 ns/div 20mv/di v 0v v s = 1.35v v in = 50mv a v = +1 r l = 2k ? c l = 300pf t a = 25c 01106-024 figure 23. small signal transient response 500 ns/div 20mv/di v 0v v s = 2.5v v in = 50mv a v = +1 r l = 2k ? c l = 300pf t a = 25c 01106-025 figure 24. small signal transient response 01106-026 10 500mv 500ns 100 0 90 v s = 1.35v a v = +1 r l = 2k ? t a = 25c figure 25. large signal transient response 01106-027 10 500mv 500ns 100 0 90 v s = 2.5v a v = +1 r l = 2k ? t a = 25c figure 26. large signal transient response 01106-028 10 1v 10s 1v 100 0 90 v s = 2.5v a v = +1 t a = +25c figure 27. no phase reversal 1 0.1 0.01 frequency (hz) current noise density (pa/ hz) 10 100 1k 10k 100k v s = 5v t a = 25c 01106-029 figure 28. current noise density vs. frequency
AD8591/ad8592/ad8594 rev. b | page 10 of 16 100v/div marker 41v/ hz 01106-030 10 100 0 90 v s = 5v a v = +1000 t a = 25c frequency = 1khz figure 29. voltage noise density vs. frequency 200v/di v marker 25.9 v/ hz 01106-031 10 100 0 90 v s = 5v a v = +1000 t a = 25c frequency = 10khz figure 30. voltage noise density vs. frequency 300 500 600 400 200 100 ?12 ?14 6 ?10 v s = 2.7v v cm = 1.35v t a = 25c 0 input offset voltage (mv) quantity (amplifiers) ?8 ?6 ?4 ?2 0 2 4 01106-032 figure 31. input offset voltage distribution 300 500 600 400 200 100 ?12 ?14 6 ?10 v s = 5v v cm = 2.5v t a = 25c 0 input offset voltage (mv) quantity (amplifiers) ?8 ?6 ?4 ?2 0 2 4 0 1106-033 figure 32. input offset voltage distribution
AD8591/ad8592/ad8594 rev. b | page 11 of 16 theory of operation the ad859x amplifiers are cmos, high output drive, rail-to- rail input and output single-supply amplifiers designed for low cost and high output current drive. the parts include a power saving shutdown function that makes the AD8591/ad8592/ ad8594 op amps ideal for portable multimedia and telecommunications applications. figure 33 shows the simplified schematic for the AD8591/ad8592/ ad8594 amplifiers. two input differential pairs, consisting of an n-channel pair (m1, m2) and a p-channel pair (m3, m4), provide a rail-to-rail input common-mode range. the outputs of the input differential pairs are combined in a compound folded- cascode stage that drives the input to a second differential pair gain stage. the outputs of the second gain stage provide the gate voltage drive to the rail-to-rail output stage. the rail-to-rail output stage consists of m15 and m16, which are configured in a complementary common source configuration. as with any rail-to-rail output amplifier, the gain of the output stage, and thus the open-loop gain of the amplifier, is dependent on the load resistance. in addition, the maximum output voltage swing is directly proportional to the load current. the difference between the maximum output voltage to the supply rails, known as the dropout voltage, is determined by the on-channel resistance of the AD8591/ad8592/ad8594 output transistors. the output dropout voltage is given in figure 5 and figure 6 . 50a 100a 100a 20a v b2 m5 m8 m12 m15 m16 m11 out m3 m4 m1 in? in+ v b3 m6 m7 m10 20a m13 50a v + v? m9 m14 m2 * * * * m337 sd inv * * m340 *all current sources go to 0a in shutdown mode. inv m31 m30 01106-034 figure 33. simplified schematic input voltage protection although not shown in the simplified schematic, esd protection diodes are connected from each input to each power supply rail. these diodes are normally reverse-biased, but turn on if either input voltage exceeds either supply rail by more than 0.6 v. if this condition occurs, limit the input current to less than 5 ma. this is done by placing a resistor in series with the input(s). the minimum resistor value should be ma5 , maxin in v r (1) output phase reversal the AD8591/ad8592/ad8594 are immune to output voltage phase reversal with an input voltage within the supply voltages of the device. however, if either of the inputs of the device exceeds 0.6 v outside of the supply rails, the output could exhibit phase reversal. this is due to the esd protection diodes becoming forward-biased, thus causing the polarity of the input terminals of the device to switch. the technique recommended in the input voltage protection section should be applied in applications where the possibility of input voltages exceeding the supply voltages exists. output short-circuit protection to achieve high output current drive and rail-to-rail performance, the outputs of the ad859x family do not have internal short- circuit protection circuitry. although these amplifiers are designed to sink or source as much as 250 ma of output current, shorting the output directly to the positive supply could damage or destroy the device. to protect the output stage, limit the maximum output current to 250 ma. by placing a resistor in series with the output of the amplifier, as shown in figure 34 , the output current can be limited. the minimum value for r x is ma250 sy x v r (2) for a 5 v single-supply application, r x should be at least 20 . because r x is inside the feedback loop, v out is not affected. the trade-off in using r x is a slight reduction in output voltage swing under heavy output current loads. r x also increases the effective output impedance of the amplifier to r o + r x , where r o is the output impedance of the device. r x 20 ? v out ad8592 +5 v v in 01106-035 figure 34. output short-circuit protection power dissipation although the ad859x amplifiers are able to provide load currents of up to 250 ma, proper attention should be given to not exceeding the maximum junction temperature for the device. the junction temperature equation is t j = p diss ja + t a (3) where: t j is the ad859x junction temperature. p diss is the ad859x power dissipation. ja is the ad859x junction-to-ambient thermal resistance of the package. t a is the ambient temperature of the circuit.
AD8591/ad8592/ad8594 rev. b | page 12 of 16 in any application, the absolute maximum junction temperature must be limited to 150c. if the junction temperature is exceeded, the device could suffer premature failure. if the output voltage and output current are in phase, for example, with a purely resistive load, the power dissipated by the ad859x can be found as p diss = i load ( v sy ? v out ) (4) where: i load is the ad859x output load current. v sy is the ad859x supply voltage. v out is the output voltage. by calculating the power dissipation of the device and using the thermal resistance value for a given package type, the maximum allowable ambient temperature for an application can be found using equation 3. capacitive loading the ad859x exhibits excellent capacitive load driving capabilities and can drive to 10 nf directly. although the device is stable with large capacitive loads, there is a decrease in amplifier bandwidth as the capacitive load increases. figure 35 shows a graph of the ad8592 unity-ga in bandwidth under various capacitive loads. 4.0 3.5 0 0.01 0.1 11 0 2.0 1.5 1.0 0.5 3.0 2.5 v s = 2.5v r l = 1k ? t a = 25c 100 capacitive load (nf) bandwidth (mhz) 01106-036 figure 35. unity-gain bandwidth vs. capacitive load when driving heavy capacitive loads directly from the ad859x output, a snubber network can be used to improve the transient response. this network consists of a series rc connected from the output of the amplifier to ground, placing it in parallel with the capacitive load. the configuration is shown in figure 36 . although this network does not increase the bandwidth of the amplifier, it significantly reduces the amount of overshoot, as shown in figure 37 . r s 5 ? v out ad8592 +5v v in 100mv p-p c s 1f c l 47nf 01106-037 figure 36. configuration for snubber netw ork to compensate for capacitive loads 4 7nf load only snubber in circuit 01106-038 50mv 50mv 10s figure 37. snubber network reduces overshoot and ringing caused by driving heavy capacitive loads the optimum values for the snubber network should be determined empirically based on the size of the capacitive load. table 5 shows a few sample snubber network values for a given load capacitance. table 5. snubber networks for large capacitive loads load capacitance, c l (nf) snubber network r s () c s (f) 0.47 300 0.1 4.7 30 1 47 5 1 pc98-compliant headphone/speaker amplifier because of its high output current performance and shutdown feature, the ad8592 makes an excellent amplifier for driving an audio output jack in a computer application. figure 38 shows how the ad8592 can be interfaced with an ac97 codec to drive headphones or speakers. u1-a 4 c1 100f +5v 1 10 2 3 5 +5 v ad1881a* (ac?97) r4 20? +5v r1 100k ? 7 8 6 9 r5 20? c2 100f *additional pins omitted for clarity. u1-b u1 = ad8592 nc r2 2k? r3 2k? av dd1 av dd2 line_out_ r line_out_l av ss1 25 38 35 36 26 01106-039 figure 38. pc98-compliant he adphone/line out amplifier
AD8591/ad8592/ad8594 rev. b | page 13 of 16 when headphones are plugged into the jack, the normalizing contacts disconnect from the audio contacts. this allows the voltage to the ad8592 shutdown pins to be pulled to 5 v, activating the amplifiers. with no plug in the output jack, the shutdown voltage is pulled to 100 mv through the r1 and r3 + r5 voltage divider. this powers the ad8592 down when it is not needed, saving current from the power supply or battery. if gain is required from the output amplifier, add four additional resistors, as shown in figure 39 . the gain of the ad8592 can be set as 6 7 r r a v = (5) a v = = 6db with values shown r7 r6 u1-a 4 c1 100f +5v 1 10 2 3 5 +5 v av dd1 av dd2 line_out_l ad1881a* (ac?97) line_out_ r av ss1 r4 20? +5v r1 100k ? 7 8 6 9 r5 20? r6 10k? r7 10k? r7 10k? r6 10k? c2 100f *additional pins omitted for clarity. u1-b u1 = ad8592 nc r2 2k? r3 2k ? 25 38 35 36 vref 27 26 01106-040 figure 39. pc98-complia nt headphone/line out amplifier with gain input coupling capacitors are not required for either circuit because the reference voltage is supplied from the ad1881a . r4 and r5 help protect the ad8592 output in case the output jack or headphone wires accidentally are shorted to ground. the output coupling capacitors, c1 and c2, block dc current from the headphones and create a high-pass filter with a corner frequency of () l db rrc f + = ? 412 1 3 (6) where r l is the resistance of the headphones. a combined microphone and speaker amplifier for cellphone and portable headsets the dual amplifiers in the ad8592 make an efficient design for interfacing with a headset containing a microphone and speaker. figure 40 demonstrates a simple method for constructing an interface to a codec. u1-a 4 +5v 1 10 2 3 5 c2 10f u1 = ad8592 7 8 6 9 u1-b from codec mono out (or left out) to codec v ref from codec microphone a nd speaker jack r1 2.2k ? +5v +5v c1 0.1f nc (right out) r2 10k ? r3 100k ? r8 100k ? r5 10k ? r6 10k ? (optional) r4 10k ? r7 1k ? 01106-041 figure 40. speaker/microphone headset amplifier circuit u1-a is used as a microphone preamplifier, where the gain of the preamplifier is set as r3/r2. r1 is used to bias an electret microphone, and c1 blocks any dc voltages from the amplifier. u1-b is the speaker amplifier, and its gain is set at r5/r4. to sum a stereo output, add r6, equal in value to r4. using the same principle described in the pc98-compliant headphone/speaker amplifier section, the normalizing contact on the microphone/speaker jack can be used to put the ad8592 into shutdown when the headset is not plugged in. the ad8592 shutdown inputs can also be controlled with ttl- or cmos- compatible logic, allowing microphone or speaker muting, if desired. an inexpensive sample-and-hold circuit the independent shutdown control of each amplifier in the ad8592 allows a degree of flexibility in circuit design. one particular application for which this feature is useful is in designing a sample-and-hold circuit for data acquisition. figure 41 shows a schematic of a simple, yet extremely effective, sample- and-hold circuit using a single ad8592 and one capacitor. v in u1-a c1 1nf u1-b sample and hold output +5v 1 2 3 5 9 8 7 6 sample clock u1 = ad8592 +5v 4 10 0 1106-042 figure 41. an efficient sample-and-hold circuit
AD8591/ad8592/ad8594 rev. b | page 14 of 16 the u1-a amplifier is configured as a unity-gain buffer driving a 1 nf capacitor. the input signal is connected to the noninverting input, and the sample clock controls the shutdown for that amplifier. when the sample clock is high, the u1-a amplifier is active and the output follows v in . when the sample clock goes low, u1-a shuts down with the output of the amplifier going to a high impedance state, holding the voltage on the c1 capacitor. single-supply differential line driver figure 43 shows a single-supply differential line driver circuit that can drive a 600 load with less than 0.7% distortion from 20 hz to 15 khz with an input signal of 4 v p-p and a single 5 v supply. the design uses an ad8594 to mimic the performance of a fully balanced transformer-based solution. however, this design occupies much less board space, while maintaining low distortion, and can operate down to dc. like the transformer-based design, either output can be shorted to ground for unbalanced line driver applications without changing the circuit gain of 1. the u1-b amplifier is used as a unity-gain buffer to prevent loading on c1. because of the low input bias current of the u1-b cmos input stage and the high impedance state of the u1-a output in shutdown, there is little voltage droop from c1 during the hold period. this circuit can be used with sample frequencies as high as 500 khz and as low as 1 hz. by increasing the c1 value, lower voltage droop is achieved for very low sample rates. r l 600 ? c1 22f a2 9 8 7 3 1 2 a1 +5v r1 10k ? r2 10k ? r11 10k ? r7 10k ? 8 7 a1 +5v +5v r8 100k ? r9 100k ? c2 1f r12 10k ? r14 50 ? a2 1 2 3 r 3 10k ? r6 10k ? r13 10k ? c3 47f v o1 v o2 c4 47f a1, a2 = 1/2 ad8592 gain = r3 r2 set: r7, r10, r11 = r2 set: r6, r12, r13 = r3 v in r10 10k ? r5 50? 10 4 10 4 9 0 1106-044 direct access arrangement for pcmcia modems (telephone line interface) figure 42 illustrates a 5 v transmit/receive telephone line interface for 600 systems. it allows full duplex transmission of signals on a transformer-coupled 600 line in a differential manner. amplifier a1 provides gain that can be adjusted to meet the modem output drive requirements. both a1 and a2 are configured to apply the largest possible signal on a single supply to the transformer. because of the high output current drive and low dropout voltages of the ad8594, the largest signal available on a single 5 v supply is approximately 4.5 v p-p into a 600 transmission system. amplifier a3 is configured as a difference amplifier for two reasons. it prevents the transmit signal from interfering with the receive signal, and it extracts the receive signal from the transmission line for amplification by a4. the gain of a4 can be adjusted in the same manner as the gain of a1 to meet the input signal requirements of the modem. standard resistor values permit the use of single inline package (sip) format resistor arrays. couple this with the 16-lead tssop or soic footprint of the ad8594, and this circuit offers a compact, cost-effective solution. figure 43. low noise, single-supply differential line driver r8 and r9 set up the common-mode output voltage equal to half of the supply voltage. c1 is used to couple the input signal and can be omitted if the dc voltage of the input is equal to half of the supply voltage. the circuit can also be configured to provide additional gain, if desired. the gain of the circuit is 2 3 r r v v a in out v (7) r7 10k ? r8 10k ? +5v 6.2v 6.2v transmit txa receive rxa c1 0.1f r1 10k? r2 9.09k ? 2k? p1 tx gain adjust a1 a2 a3 a4 a1, a2 = 1/4 ad8594 a3, a4 = 1/4 ad8594 r3 360? 1:1 t1 to telephone line 1 2 3 7 6 5 11 12 10 15 14 16 r5 10k ? r6 10k ? r9 10k? r14 14.3k ? r10 10k? r11 10k? r12 10k? r13 10k ? c2 0.1f p2 rx gain adjust 2k ? z o 600 ? midcom 671-8005 shutdown 9 9 9 9 10f 0 1106-043 where: v out = v o1 ? v o2 r2 = r7 = r10 = r11 r3 = r6 = r12 = r1 figure 42. single-supply direct access arrangement for pcmcia modems
AD8591/ad8592/ad8594 rev. b | page 15 of 16 outline dimensions 1 3 4 5 2 6 2.90 bsc 1.60 bsc 2.80 bsc 1.90 bsc 0.95 bsc 0.22 0.08 10 4 0 0.50 0.30 0.15 max 1.30 1.15 0.90 seating plane 1.45 max 0.60 0.45 0.30 pin 1 indicator compliant to jedec standards mo-178-ab figure 44. 6-lead small outline transistor package [sot-23] (rj-6) dimensions shown in millimeters compliant to jedec standards mo-187-ba 0.23 0.08 0.80 0.60 0.40 8 0 0.15 0.05 0.33 0.17 0.95 0.85 0.75 seating plane 1.10 max 10 6 5 1 0.50 bsc pin 1 coplanarity 0.10 3.10 3.00 2.90 3.10 3.00 2.90 5.15 4.90 4.65 figure 45. 10-lead mini small outline package [msop] (rm-10) dimensions shown in millimeters controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design. compliant to jedec standards ms-012-ac 10.00 (0.3937) 9.80 (0.3858) 16 9 8 1 6.20 (0.2441) 5.80 (0.2283) 4.00 (0.1575) 3.80 (0.1496) 1.27 (0.0500) bsc seating plane 0.25 (0.0098) 0.10 (0.0039) 0.51 (0.0201) 0.31 (0.0122) 1.75 (0.0689) 1.35 (0.0531) 0.50 (0.0197) 0.25 (0.0098) 1.27 (0.0500) 0.40 (0.0157) 0.25 (0.0098) 0.17 (0.0067) coplanarity 0.10 8 0 060606-a 45 figure 46. 16-lead standard small outline package [soic_n] narrow body (r-16) dimensions shown in millimeters and (inches)
AD8591/ad8592/ad8594 rev. b | page 16 of 16 16 9 8 1 pin 1 seating plane 8 0 4.50 4.40 4.30 6.40 bsc 5.10 5.00 4.90 0.65 bsc 0.15 0.05 1.20 max 0.20 0.09 0.75 0.60 0.45 0.30 0.19 coplanarity 0.10 compliant to jedec standards mo-153-ab figure 47. 16-lead thin shrink small outline package [tssop] (ru-16) dimensions shown in millimeters ordering guide model temperature range package desc ription package option branding AD8591art-reel ?40c to +85c 6-lead sot-23 rj-6 a9a AD8591art-reel7 ?40c to +85c 6-lead sot-23 rj-6 a9a AD8591artz-reel 1 ?40c to +85c 6-lead sot-23 rj-6 a9a# AD8591artz-reel7 1 ?40c to +85c 6-lead sot-23 rj-6 a9a# ad8592arm-reel ?40c to +85c 10-lead msop rm-10 aqa ad8592armz-reel 1 ?40c to +85c 10-lead msop rm-10 aqa# ad8594ar ?40c to +85c 16-lead soic_n r-16 ad8594ar-reel ?40c to +85c 16-lead soic_n r-16 ad8594ar-reel7 ?40c to +85 c 16-lead soic_n r-16 ad8594arz 1 ?40c to +85c 16-lead soic_n r-16 ad8594arz-reel 1 ?40c to +85c 16-lead soic_n r-16 ad8594arz-reel7 1 ?40c to +85c 16-lead soic_n r-16 ad8594aru-reel ?40c to +85c 16-lead tssop ru-16 ad8594aruz-reel 1 ?40c to +85c 16-lead tssop ru-16 1 z = rohs compliant part, # denotes rohs compliant part may be top or bottom marked. ?2009 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d01106-0-1/09(b)

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