note: this is a summary document. the complete document is available under nda. for more information, please contact your local atmel sales office. features ? compatible with atmel two-wire interface serial memory and i2c compatible devices (note:) one, two or three bytes for slave address sequential read/write operations master, multi-master an d slave mode operation bit rate: up to 400 kbits general call supported in slave mode note: see table 1-1 below for details on com patibility with i2c standard. 1. description the atmel two-wire interface (twi) interconnects components on a unique two-wire bus, made up of one clock line and one data line with speeds of up to 400 kbits per second, based on a byte-oriented transfer format. it can be used with any atmel two- wire interface bus serial eeprom and i2c co mpatible device su ch as real time clock (rtc), dot matrix/graphic lcd controllers and temperature sensor, to name but a few. the twi is programmable as a master or a slave with sequential or single- byte access. multiple master capability is supported. arbitration of the bus is per- formed internally and puts the twi in slave mode automatically if the bus arbitration is lost. a configurable baud rate generator permits the output data rate to be adapted to a wide range of core clock frequencies. below, table 1-1 lists the compatibility level of the atmel two-wire interface in master mode and a full i 2 c compatible device. note: 1. start + b000000001 + ack + sr table 1-1. atmel twi compatibilit y with i2c standard i2c standard atmel twi standard mode speed (100 khz) supported fast mode speed (400 khz) supported 7 or 10 bits slave addressing supported start byte (1) not supported repeated start (sr) condition supported ack and nack management supported slope control and input filtering (fast mode) not supported clock stretching supported 32-bit embedded asic core peripheral two-wire interface (TWI2) summary 6212bs?atarm?21-may-07
2 6212bs?atarm?21-may-07 TWI2 summary 2. block diagram figure 2-1. twi block diagram 3. application block diagram figure 3-1. twi application block diagram apb bridge pmc mck two-wire interface pio aic twi interrupt twck twd host with twi interface twd twck atmel twi serial eeprom i2c rtc i2c lcd controller slave 1 slave 2 slave 3 vdd i2c temp. sensor slave 4 rp: pull up value as given by the i2c standard rp rp
3 6212bs?atarm?21-may-07 TWI2 summary revision history table 3-1. revision history doc. rev comments change request ref. 6212as first issue 6212bs ?features? on page 1 , and descriptioin updated with details on atmel twi compatibility with i2c standard. figure 2-1 block diagram updated. table 1-1 and figure 3-1 application block added 4373
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