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low power, 1 nv/hz, g 10 stable , rail - to - rail outp ut amplifier data sheet ada4895 - 2 rev. 0 document feedback information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other ri ghts of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the propert y of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062 - 9106, u.s.a. tel: 781.329.4700 ? 2012 analog devices, inc. all rights reserved. technical support www.analog.com features low wideband noise 1 nv/hz 2.6 pa/hz low 1/f noise : 2 nv/hz at 10 hz low distortion (sfdr) : ? 96 dbc at 100 khz, v out = 2 v p - p low power: 3 ma per amplifier low input offset voltage: 350 v maximum high speed 236 mhz, ?3 db bandwidth (g = +1 0 ) 943 v /s slew rate 2 2 ns settling time to 0.1% rail - to - rail output wide supply r ange: 3 v to 10 v disable feature applications low noise preamplifier ultrasound amplifiers pll l oop filters high performance adc drivers dac buffers general description the ada4895 - 2 is a dual, high speed voltage feedback amplifier that is gain 10 stable with low input noise, rail - to - rail output, and quiescent current of 3 ma per amplifier . with a 1/f noise of 2 nv/hz at 10 hz and a spurious - free dynamic range of ?72 dbc at 2 mhz, the ada4895 - 2 is an ideal solution in a variety of applications, including ultrasound, low noise preamplifiers, and drivers of high performance adcs. the analog devices, inc., proprietary next generation sige bipolar process and innovative architec ture enable this high pe rformance amplifier . the ada4895 - 2 has a large signal bandwidth of 146 mhz at a gain of + 10 with a slew rate of 943 v/s, and settle s to 0.1% in 2 2 ns. the wide supply voltage range (3 v to 10 v) of the ada4895 - 2 makes this amplifier an ideal candidate for systems that require high dynamic range, high gain, precision, and high speed. the ada4895 - 2 is available in a 10 - lead msop package and operates over the extended industrial temperature range of ?40c to +125c. functional block diagram o u t 1 1 ? i n 1 2 + i n 1 3 ? v s 4 d i s a b l e 1 5 + v s 1 0 o u t 2 9 ? i n 2 8 + i n 2 7 d i s ab l e 2 6 ad a 4 89 5 - 2 10186-001 figure 1. 10 - lead msop input vo lt age noise (nv/ hz ) 0 1 2 3 4 5 0 16 8 24 32 40 1 10 100 1k 10k 100k 1m input current noise (pa/ hz ) frequenc y (hz) 10186-002 voltage current figure 2. input voltage and current noise vs. frequency table 1 . other low noise amplifiers 1 part n o. v n @ 1 khz (nv/hz) v n @ 100 khz (nv/hz) bw (mhz) supply voltage (v) AD8021 4.2 2.1 490 5 to 24 ad8045 6 3 1000 3.3 to 12 ad8 099 7 0.95 510 5 to 12 ada4841 - 1 / ada4841 - 2 2.2 2. 1 8 0 2.7 to 1 2 ada4896 - 2 1 1 230 3 to 10 ada4897 - 1 / ada4897 - 2 1 1 230 3 to 10 ada4898 - 1 / ada4898 - 2 0.9 0.9 65 10 to 32 ada4899 - 1 1.4 1 600 5 to 12 1 see www.analog.com for the latest selection of low noise amplifiers. companion products adcs: ad7944 (14 - bit), ad7985 (16 - bit), ad7986 (18 - bit) addit i onal companion products on the ada4895 - 2 product page
ada4895- 2 data sheet rev. 0 | page 2 of 24 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 general description ......................................................................... 1 functional block diagram .............................................................. 1 companion products ....................................................................... 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 5 v (or +10 v) supply ............................................................... 3 2.5 v (or +5 v) sup ply .............................................................. 5 1.5 v (or +3 v) supply .............................................................. 7 absolute maximum ratings ............................................................ 9 therm al resistance ...................................................................... 9 maximum power dissipation ..................................................... 9 esd caution .................................................................................. 9 pin co nfiguration and function descriptions ........................... 10 typical performance characteristics ........................................... 11 theory of operation ...................................................................... 17 amplifier description ................................................................ 17 input protection ......................................................................... 17 disable operation ...................................................................... 17 dc errors .................................................................................... 18 bias current cancellation ......................................................... 18 noise considerations ................................................................. 19 applications information .............................................................. 20 using the ada4895 - 2 at a gain < +10 .................................... 20 high gain bandwidt h application .......................................... 21 wideband photomultiplier preamplifier ................................ 22 layout considerations ............................................................... 23 outline dimensions ....................................................................... 24 ordering guide .......................................................................... 24 revision history 9/12 revision 0: initial version
data sheet ada4895- 2 rev. 0 | page 3 of 24 specifications 5 v (or +10 v) supply t a = 25 c, g = +10, r f = 249 ?, r l = 1 k? to midsupply , unless otherwise noted. table 2 . parameter test conditions /comments min typ max unit dynamic performance ? 3 db bandwidth v out = 0.2 v p -p 236 mhz v out = 2 v p -p 146 mhz v out = 0.2 v p -p , g = +20, r f = 1 k? 1 15 mhz bandwidth for 0.1 db flatness v out = 2 v p - p, r l = 100 ? 8. 9 mhz slew rate v out = 6 v step 943 v/s settling time to 0.1% v out = 2 v step 2 2 ns noise/harmonic performance harmonic distortion ( sfdr ) f c = 100 khz , v out = 2 v p -p ?96 dbc f c = 1 mhz, v out = 2 v p -p ?78 dbc f c = 2 mhz, v out = 2 v p -p ?72 dbc f c = 5 mhz, v out = 2 v p - p ?64 dbc input voltage noise f = 10 hz , g = + 25.9 2 nv/hz f = 100 khz , g = + 25.9 1 nv/hz input current noise f = 10 hz 14 pa/hz f = 100 khz 2.6 pa/hz 0.1 hz to 10 hz noise g = +101, r f = 1 k ? , r g = 10 ? 99 nv p -p dc performance input offset voltage ? 350 + 53 + 350 v input offset voltage drift 0.15 v/c input bias current ?16 ?11 ?6 a inpu t bias current drift 1.2 na/c input bias offset current ?0.6 ?0.02 +0.6 a open - loop gain v out = ?4 v to +4 v 100 110 db input characteristics input resistance common mode/differential 10 m /10 k ? input capacitance common mode/differentia l 3/11 pf input common - mode voltage range ?4.9 to +4.1 v common - mode rejection v cm = ?2 v to +2 v ?92 ?1 0 9 db output characteristics output overdrive recovery time v in = ?0.5 5 v to + 0. 5 5 v 80 ns positive output voltage swing r l = 1 k? 4.8 5 4.96 v r l = 100 ? 4.5 4.77 v negative output voltage swing r l = 1 k? ?4.85 ?4.97 v r l = 100 ? ?4.5 ?4.85 v linear output current sfdr = ? 45 dbc 72 ma rms short - circuit current sinking/sourcing 116/ 1 0 8 ma capacitive load drive 30% overshoo t 6 pf power supply operating range 3 to 10 v quiescent current per amplifier 2.8 3 3.2 ma disablex = ?5 v 0. 1 ma positive power supply rejection +v s = 4 v to 6 v, ?v s = ?5 v ?96 ?136 db negative power supply rejectio n +v s = 5 v, ?v s = ?4 v to ?6 v ?96 ?135 db
ada4895- 2 data sheet rev. 0 | page 4 of 24 parameter test conditions /comments min typ max unit disablex pin disablex voltage part e nabled > +v s ? 0.5 v part d isabled < +v s ? 2 v input current per amplifier part enabled disablex = + 5 v ?1.1 a part disabled disablex = ? 5 v ?40 a switching speed part enabled 0.25 s part disabled 6 s
data sheet ada4895- 2 rev. 0 | page 5 of 24 2. 5 v (or +5 v) supply t a = 25c, g = +1 0 , r f = 249 ? , r l = 1 k? to midsupply, unless otherwise noted. table 3 . parameter test conditions/comments min typ max unit dynamic performance ?3 db bandwidth v out = 0.2 v p -p 2 16 mhz v out = 2 v p -p 131 mhz v out = 0.2 v p -p , g = +20, r f = 1 k? 113 mhz bandwidth for 0.1 db flatness v out = 2 v p - p, r l = 100 ? 7.9 mhz slew rate v out = 3 v step 706 v/s settling time to 0.1% v out = 2 v step 2 1 ns noise/harmonic performance harmonic distortion ( sfdr ) f c = 100 khz, v out = 2 v p -p ?94 dbc f c = 1 mhz, v out = 2 v p -p ?75 dbc f c = 2 mhz, v out = 2 v p -p ?69 dbc f c = 5 mhz, v out = 2 v p -p ?61 dbc input voltage noise f = 10 hz, g = +25.9 1.8 nv/hz f = 100 khz, g = +25.9 1 nv/hz input current noise f = 10 hz 1 4 pa/hz f = 100 khz 2.7 pa/hz 0.1 hz to 10 hz noise g = +101, r f = 1 k ? , r g = 10 ? 99 nv p -p dc performance input offset voltage ? 350 + 53 + 350 v input offset voltage drift 0.15 v/c input bias current ?16 ?11 ?6 a input bias current drift 1.2 na/c input bias offset current ?0 .6 ?0.02 +0.6 a open - loop gain v out = ?2 v to + 2 v 97 108 db input characteristics input resistance common mode/differential 10 m/10 k ? input capacitance common mode/differential 3/11 pf input common - mode voltage range ? 2.4 to +1.6 v c ommon - mode rejection v cm = ?1.5 v to + 1.5 v ?91 ?1 1 0 db output characteristics output overdrive recovery time v in = ?0.2 7 5 v to + 0.2 7 5 v 9 0 ns positive output voltage swing r l = 1 k? 2.35 2.48 v r l = 100 ? 2.3 2.38 v negative output voltage swing r l = 1 k? ?2.35 ?2.48 v r l = 100 ? ?2.3 ?2.38 v linear output current sfdr = ? 45 dbc 60 ma rms short - circ uit current sinking/sourcing 113/95 ma capacitive load drive 30% overshoot 6 pf power supply operating range 3 to 10 v q uiescent current per amplifier 2.6 2.8 3 ma disablex = ?2.5 v 0. 05 ma positive power su pply rejection +v s = 2 v to 3 v, ?v s = ?2.5 v ?96 ?137 db negative power supply rejection +v s = 2.5 v, ?v s = ?3 v to ?2 v ?96 ?141 db
ada4895- 2 data sheet rev. 0 | page 6 of 24 parameter test conditions/comments min typ max unit disablex pin disablex voltage part e nabled >+v s ? 0.5 v part d isabled <+v s ? 2 v input curre nt per amplifier part enabled disablex = +2 .5 v ?1.1 a part disabled disablex = ?2 .5 v ?20 a switching speed part enabled 0.25 s part disabled 6 s
data sheet ada4895- 2 rev. 0 | page 7 of 24 1. 5 v (or +3 v) supply t a = 25c, g = +1 0 , r f = 249 ? , r l = 1 k? to midsupply, unless otherwise noted. table 4 . parameter test conditions/c omments min typ max unit dynamic performance ?3 db bandwidth v out = 0.2 v p -p 205 mhz v out = 1 v p -p 131 mhz v out = 0.2 v p -p , g = +20, r f = 1 k? 111 mhz bandwidth for 0.1 db flatness v out = 2 v p - p, r l = 100 ? 7.5 mhz slew rate v out = 1 v step 384 v/s settling time to 0.1% v out = 2 v step 20 ns noise/harmonic performance harmonic distortion ( sfdr ) f c = 100 khz, v out = 2 v p -p ?92 dbc f c = 1 mhz, v out = 2 v p -p ?73 dbc f c = 2 mhz, v out = 2 v p -p ?67 dbc f c = 5 mhz, v out = 2 v p -p ?59 dbc input voltage noise f = 10 hz, g = +25.9 1.9 nv/hz f = 100 khz, g = +25.9 1 nv/hz input current noise f = 10 hz 1 4 pa/hz f = 100 khz 2.7 pa/hz 0.1 hz to 10 hz noise g = +101, r f = 1 k ? , r g = 10 ? 99 nv p -p dc performance input offset voltage ? 350 + 55 + 350 v input offset voltage drift 0.15 v/c input bias current ?16 ?11 ?6 a input bias current drift 1.2 na/c input bias offset current ?0.6 ?0.02 +0.6 a open - loop gain v out = ?1 v to + 1 v 95 106 db input characteristics input resistance common mode/differential 10 m/10 k ? input capacitance common mode/differential 3/11 pf input common - mode voltage range ? 1 .4 to + 0 .6 v common - mode rejection v cm = ?0.4 v to +0.4 v ?90 ?1 1 0 db output characteristics output overdrive recovery time v in = ?0.1 6 5 v to +0.1 6 5 v 8 0 ns positive output voltage swing r l = 1 k? 1.35 1.48 v r l = 100 ? 1.3 1.43 v negative output voltage swing r l = 1 k? ?1.35 ?1.49 v r l = 100 ? ?1. 3 ?1.45 v linear output current sfdr = ? 45 dbc 43 ma rms short - circuit current sinking/sourcing 1 02/80 ma capacitive load drive 30% overshoot 6 pf power supply operating range 3 to 10 v quiescent current per amplifier 2. 5 2. 7 2. 9 ma disablex = ?1.5 v 0.03 ma positive power supply rejection +v s = 1.2 v to 2.2 v, ?v s = ?1.5 v ?96 ?133 db negative power supply rejection +v s = 1.5 v, ?v s = ? 2.2 v to ?1.2 v ?96 ?146 db
ada4895- 2 data sheet rev. 0 | page 8 of 24 parameter test conditions/c omments min typ max unit disablex pin disablex voltage part e nabled >+v s ? 0.5 v part d isabled < + v s ? 2 v input current per amplifier part enabled disablex = +1 .5 v ?1.2 a part disabled disablex = ?1 .5 v ?10 a switching speed part enabled 0.25 s part disabled 6 s
data sheet ada4895- 2 rev. 0 | page 9 of 24 absolute maximum rat ings table 5 . parameter rating supply voltage 11 v power dissipation see figure 3 common - mode input voltage ?v s ? 0.7 v to +v s + 0.7 v differential input voltage 0.7 v storage temperature range ?65c to +125c operating temperature range ?40c to +125c lead temperature (soldering 10 sec) 300c junction temperature 150c stresses above those listed under absolute maximum ra tings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute ma ximum rating conditions for extended periods may affect device reliability. thermal resistance ja is specified for the worst - case conditions, that is , ja is specified for a device soldered in a circuit board for surface - mount packages. table 6 lists the ja for the ada489 5 - 2 . table 6 . thermal resistance package type ja unit 10- lead dual msop 210 c/w maximum power dissip ation the maximum safe power dissipation for the ada4895 - 2 is limited by the associat ed rise in junction temperature (t j ) on the die. at approximately 150 c, which is the glass transition temperature, the properties of the plastic change. even tempo - rarily exceeding this temperature limit can change the stresses that the package exerts on the die, permanently shifting the parametric performance of the ada4895 - 2 . exceeding a junction temperature of 175 c for an extended period of time can result in changes in silicon devices, potentially causing degradation or loss of functionality. the power dissipated in the package (p d ) is the sum of the quiescent power dissipation and the power dissipated in the die due to the ada489 5 - 2 drive at the output. p d = quiescent power + ( total drive power ? load power ) the quiescent power dissipation is the voltage between the supply pins ( v s ) multiplied by the quiescent current (i s ). ( ) l out l out s s s d r v r v v i v p 2 2 ? ? ? ? ? ? ? ? ? + = rms output voltages should be considered. if r l is referenced to ?v s , as in single - supply operatio n, the total drive power is v s i out . in single - supply operation with r l referenced to ?v s , the worst case is v out = v s /2. if the rms signal levels are indeterminate, consider the worst case, when v out = v s /4 with r l referenced to midsupply. ( ) ( ) l s s s d r v i v p 2 4 / + = airflow increases heat dissipation, effectively reducing ja . also, more metal directly in contact with the package leads reduces ja . figure 3 shows the maximum safe power dissipation in the package v s. the ambient te mperature on a jedec standard , 4 - layer board. ja values are approximations. 10186-003 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 ?40 ?30 ?20 ?10 0 10 20 30 40 50 60 70 80 90 100 1 10 120 maximum power dissi pa tion (w) ambient temper a ture ( c) t j = 150 c ada 4895 -2 10 -l ead mso p figure 3. maximum power dissipation vs. temperature for a 4 - layer board esd caution
ada4895- 2 data sheet rev. 0 | page 10 of 24 pin configuration an d function descripti ons o u t 1 1 ? i n 1 2 + i n 1 3 ? v s 4 d i s a b l e 1 5 + v s 1 0 o u t 2 9 ? i n 2 8 + i n 2 7 d i s ab l e 2 6 ad a 4 89 5 - 2 10186-004 figure 4. pin configuration table 7 . pin function descriptions pin no. mnemonic description 1 out1 output 1. 2 ?in1 inverting input 1. 3 +in1 noninverting input 1. 4 ?v s negative supply. 5 disab le1 disable 1. 6 disable2 disable 2. 7 +in2 noninverting input 2. 8 ?in2 inverting input 2. 9 out2 output 2. 10 +v s positive supply.
data sheet ada4895- 2 rev. 0 | page 11 of 24 typical performance characteristics t a = 25c, v s = 2.5 v, g = +1 0 , r f = 249 ? , r l = 1 k? to midsupply, unless otherwise noted. ?5 ?4 ?3 ?2 ?1 0 1 2 3 0.1 1 10 100 1000 normalized closed-loo p gain (db) frequenc y (mhz) v out = 200mv p-p v s = 5.0v v s = 1.5v v s = 2.5v 10186-006 figure 5. small signal frequency response vs. supply voltage ?10 ?8 ?6 ?4 ?2 0 2 4 6 8 0.1 1 10 100 1000 normalized closed-loo p gain (db) frequenc y (mhz) g = ?10 g = +10 r f = 1k v out = 200mv p-p 10186-005 g = ?20 figure 6. small signal frequency response vs. gain ?5 ?4 ?3 ?2 ?1 0 1 2 3 4 0.1 1 10 100 1000 normalized closed-loo p gain (db) frequenc y ( mhz) v out = 200mv p-p +25c +125c 10186-007 ?40c figure 7. small sign al frequency response vs. temperature ?5 ?4 ?3 ?2 ?1 0 1 2 0.1 1 10 100 1000 normalized closed-loo p gain (db) frequenc y (mhz) v out = 2v p-p v s = 1.5v v s = 5.0v v s = 2.5v 10186-010 figure 8. large signal frequency response vs. supply voltage ?5 ?4 ?3 ?2 ?1 0 1 2 3 0.1 1 10 100 1000 normalized closed-loo p gain (db) frequenc y (mhz) r f = 1k ? v out = 2v p-p g = +10 g = ?10 g = ? 20 10186-009 figure 9. large signal frequency response vs. gain ?5 ?4 ?3 ?2 ?1 0 1 2 3 0.1 1 10 100 1000 normalized closed-loo p gain (db) frequenc y (mhz) v out = 100mv p-p v out = 400mv p-p 10186-008 v out = 2v p-p v out = 1v p-p figure 10 . frequenc y response for various output voltages
ada4895- 2 data sheet rev. 0 | page 12 of 24 ?10 ?8 ?6 ?4 ?2 0 2 4 6 0.1 1 10 100 1000 normalized closed-loo p gain (db) frequenc y (mhz) c l = 6pf v out = 200mv p-p 10186-0 1 1 c l = 3pf c l = 0pf figure 11 . small signal frequency response vs. capacitive load ?120 ?1 10 ?100 ?90 ?80 ?70 ?60 ?50 ?40 0.1 1 10 dis t ortion (dbc) frequenc y (mhz) 10186-012 hd3, r l = 1k ? hd2, r l = 100 ? hd2, r l = 1k ? hd3, r l = 100 ? v out = 2v p-p figure 12 . harmonic distortion vs. frequency for various loads ?120 ?100 ?80 ?60 ?40 ?20 0.1 1 10 dis t ortion (dbc) frequency (mhz) v out = 2v p-p g = +20 10186-013 r l = 100? hd2 hd3 r l = 1k? r l = 100? r l = 1k? figure 13 . harmonic distortion vs. frequency, g = + 20 1k 10k 100k 1m 10m 100m 1g frequenc y (hz) phase (degrees) gain (db) 10186-017 0 10 20 30 40 50 60 70 80 90 100 1 10 120 gain phase ?240 ?220 ?200 ?180 ?160 ?140 ?120 ?100 ?80 ?60 ?40 ?20 0 figure 14 . open - loop gain and phase vs. frequency ?130 ?120 ?1 10 ?100 ?90 ?80 ?70 ?60 ?50 ?40 0.1 1 10 dis t ortion (dbc) frequenc y (mhz) v s = 5v v s = 2.5v v s = 1.5v hd3 hd2 10186-016 v s = 5v v s = 2.5v v s = 1.5v v out = 2v p-p figure 15 . harmonic distortion vs. frequency for various supplies ?140 ?120 ?100 ?80 ?60 ?40 ?20 0.1 1 10 dis t ortion (dbc) frequenc y (mhz) v s = 5.0v r g = 27.4 10186-015 2v p-p 8v p-p hd3 hd2 4v p-p 2v p-p 4v p-p 8v p-p figure 16 . harmonic distortion vs. frequency for various output voltages
data sheet ada4895- 2 rev. 0 | page 13 of 24 0 1 2 3 4 5 6 1 10 100 1k 10k 100k 1m 10m 100m input vo lt age noise (nv/ hz ) frequenc y (hz) 10186-018 v s = 5v g = +25.9 r f = 249 r g = 10 figure 17 . input voltage noise vs. frequency ?0.20 ?0.15 ?0.10 ?0.05 0 0.05 0.10 0.15 0.20 output vo lt age (v) time (5ns/div) v s = 1.5v v s = 2.5v v s = 5.0v 10186-021 v out = 200mv p-p figure 18 . small signal transient response for various supplies 0 1 2 3 4 5 6 7 8 9 10 number of samples v drift ( v/c) ?0.4 ?0.3 ?0.2 ?0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 average = 154nv/ c standard deviation = 184nv / c ?4 0 c to +12 5 c 10186-020 figure 19 . input offset voltage drift distribution 1 10 100 1 10 100 1k 10k 100k 1m input current noise (pa/ hz ) frequenc y (hz) 10186-019 r f = 10k r g = 1.1k figure 20 . input current noise vs. frequency ?0.20 ?0.15 ?0.10 ?0.05 0 0.05 0.10 0.15 0.20 output vo lt age (v) time (5ns/div) 10186-023 v out = 200mv p-p c l = 5.6pf c l = 3.3pf c l = 0pf figure 21 . small signal transient response for various capacitive loads time (5ns/div) ?1.5 ?1.0 ?0.5 0 0.5 1.0 1.5 output voltage (v) g = +10 g = +20 10186-024 v out = 2v p-p figure 22 . large signal transient response for various gains
ada4895- 2 data sheet rev. 0 | page 14 of 24 ?3 ?2 ?1 0 1 2 3 input and output vo lt age (v) time (100ns/div) 90ns recovery time v out 10 v in 10186-026 figure 23 . output overdrive recovery time ?160 ?150 ?140 ?130 ?120 ?1 10 ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 0.001 0.01 0.1 1 10 100 psrr (db) frequenc y (mhz) +v s = 2.5v 1v p-p ?v s = ?2.5v 1v p-p 10186-031 figure 24 . psrr vs. frequency 550 600 650 700 750 800 ?40 ?20 0 20 40 60 80 100 120 slew r a te (v/ s) temper a ture (?c) v out = 3v p-p rise fall 10186-028 figure 25 . slew rate vs. te mperature settling time (%) time (10ns/div) error v out = 2v step 0.2 0.1 0 ?0.1 ?0.2 10186-029 figure 26 . settling time to 0.1% ?120 ?100 ?80 ?60 ?40 ?20 0 0.001 0.01 0.1 1 10 100 cmrr (db) frequenc y (mhz) 10186-030 figure 27 . cmrr vs. frequency 0 20 40 60 80 100 120 140 160 0 100 200 300 400 500 600 700 800 recove r y time (ns) overload dur a tion (ns) negative slope positive slope 10186-027 figure 28 . output overload reco very time vs. overload duration
data sheet ada4895- 2 rev. 0 | page 15 of 24 temper a ture (c) ?40 ?20 0 20 40 60 80 100 120 supply current ( ma) 2.5 2.6 2.7 2.8 2.9 3.0 3.1 3.2 v s = 5.0v v s = 2.5v v s = 1.5v 10186-034 figure 29 . supply current vs. temperature for various supplies 0 0.01 0.02 0.03 0.04 0.05 ?40 ?25 ?10 5 20 35 50 65 80 95 1 10 125 temper a ture (c) v s = 1.5v v s = 2.5v v s = 5.0v v os (mv) 10186-033 figure 30 . input offset voltage vs. temperature for various supplies 0.01 0.1 1 10 100 1k 10k 100k 1m 0.01 0.1 1 10 100 1000 output impedance ( ?) frequency (mhz) disabled enabled 10186-032 figure 31 . output impedance vs. frequency temper a ture (c) ?12.0 ?1 1.8 ?1 1.6 ?1 1.4 ?1 1.2 ?1 1.0 ?10.8 ?40 ?20 0 20 40 60 80 100 120 input bias current ( a) v s = 5.0v v s = 2.5v v s = 1.5v 10186-035 figure 32 . input bias current vs. temperature for various supplies ?120 ?100 ?80 ?60 ?40 ?20 0 0.01 0.1 1 10 100 cross t alk (db) frequenc y (mhz) 10186-036 figure 33 . crosstalk , out1 to out2 ?180 ?160 ?140 ?120 ?100 ?80 ?60 ?40 ?20 0 0.01 0.1 1 10 100 isol a tion (db) frequenc y (mhz) 10186-039 figure 34 . forward isolation vs. frequency
ada4895- 2 data sheet rev. 0 | page 16 of 24 ?0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 volt age (v) time ( 1s /div) +125c +25c ?40c 10186-038 disable output figure 35 . output turn - off time vs. temperature ?0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 volt age (v) time (40ns/div) disable output +125c +25c ?40c 10186-037 figure 36 . output turn - on time vs. temperature
data sheet ada4895- 2 rev. 0 | page 17 of 24 theory of operation amplifier descriptio n the ada4895 - 2 amplifier has a n input noise of 1 nv/hz and c onsumes 2. 8 ma from suppl y voltag es of 3 v to 10 v. u s ing the analog devices xfcb3 process, the ada4895 - 2 has a gain band - width product in excess of 1 .5 ghz and is gain 10 stable , with an input structure tha t results in an extremely low input 1/f noise for a relatively high speed amplifi er. the rail - to - rail output stage is designed to drive the heavy feed - back load required to achieve an overall low output referred noise. the low input noise and high bandwidt h of the ada4895 - 2 are achieved with minimal power penalty. for this reason, the maxi - mum offset voltage of 350 v and voltage drift of 0. 15 v/c make the ada4895 - 2 an excellent choice, e ven when the low noise performance of the amplifier is not needed. for any gain greater than 10, t he closed - loop frequency response of a basic noninverting configuration can be approximated by closed - loop ?3 db frequency = ( g bp) ( ) g f g r r r + for inverting gain configurations, the source impedance must be considered when sizing r g to maintain the minimum stable gain. for gai ns lower than 10, see the using the ada4895 - 2 at a gain < +10 section , or use the ada4897 - 2 , which is a unity - gain stable amplifier with 2 3 0 m h z bandwidth. input protection the ada4895 - 2 is fully protected from esd events and can with - stand human body model esd events of 2.5 kv and charge d - device model events of 1 kv with no measured performance degradation. the precision input is protected with an esd network between the power supplies and diode clamps across the in put device pair, as shown in figure 37. +in esd esd ?v s +v s bias to the rest of the amplifier ?in esd esd 10186-040 figure 37 . input stage and protection diodes at differential voltages above approximately 0.7 v, the diode clamps begin to conduct. too much current can cause damage due to excessive heating. if large differential voltages must be sustained across the input terminals, it is recommended that the current through the input clamps be limited to less than 10 ma. series input resistors that are sized appropriately for the expected differential overvoltage provide the needed protection. the esd clamps begin to conduct at input voltages that are more than 0.7 v above the positive supply or more than 0.7 v below the negative supply. i f an overvoltage con dition is expected, i t is recommended that the fault current be limited to less than 10 ma. disable operation figure 38 shows the ada4895 - 2 power - down circuitry. if t he disablex pin is left unconnected, the base of the input pnp transistor is pulled high through the internal pull - up resistor to the positive supply and the part is turned on. pulling the disablex pin more than 2 v bel ow the positive supply turns the part off, reducing the supply current to approximately 50 a for a 5 v voltage supply. +v s ?v s disablex esd esd i bias to amplifier bias 10186-041 figure 38 . d isablex circuit the disablex pin is protected by esd clamps, as shown in figure 38 . voltages beyond the power supplies cause these diodes to conduct. for protection of the disablex pin s , the voltage to th e se pin s should not exceed 0.7 v beyond the supply v oltage , or the input current should be restricted to less than 10 ma with a series resistor.
ada4895- 2 data sheet rev. 0 | page 18 of 24 dc errors figure 39 shows a typical connection diagram and the major dc error sources. r g ? v i n + r s ? v i p + i b + i b ? + v o u t ? r f + v o s ? 10186-042 figure 39 . typical connection diagram and dc error sources the ideal transfer function (all error sources set to 0 and infinite dc gain) can be expressed as follows: in g f ip g f out v r r v r r v ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? + = 1 (1) this equation reduces to the familiar forms for noninverting and inverting op amp gain expressions , as follows: for noninverting gain ( v in = 0 v) , ip g f out v r r v ? ? ? ? ? ? ? ? + = 1 (2) for i nverting gain ( v ip = 0 v) , in g f out v r r v ? ? ? ? ? ? ? ? ? = (3) the total output voltage error is the sum of the errors due to the amplifier offset voltage and input cu rrents. the output error due to the offset voltage can be estimated as follows: error out v = (4) ? ? ? ? ? ? ? ? + ? ? ? ? ? ? + ? + + g f out pnom p cm offset r r a v psrr v v cmrr v v nom 1 where: nom offset v is the offset voltage at the specified suppl y voltage, which is measured with the input and out put at midsupply. v cm is the common - mode voltage. cmrr is the common - mode rejection ratio. v p is the power supply voltage. v pnom is the specified power supply voltage. psrr is the power supply rejection ratio. a is the dc open - loop gain. the output error due to the input currents can be estimated as follows: + ? ? ? ? ? ? ? ? ? + ? ? ? ? ? ? ? ? ? + = b g f s b g f g f out i r r r i r r r r v error 1 1 ) || ( (5) bias current c ancellation to cancel the output voltage error due to unmatched bias currents at the inputs, resistors r bp and r bn can be used (see figure 40). r g r s r bp r bn r f 10186-043 figure 40 . using r bp and r bn to c ancel b ias c urrent e rror to compensate for the unmatched bias currents at the two inputs, set resistors r bp and r bn as shown in table 8 . table 8 . setting r b p and r b n to cancel bias current error value of r f ||r g value of r bp (?) value of r bn (?) greater than r s r f ||r g ? r s 0 less than r s 0 r s ? r f ||r g
data sheet ada4895- 2 rev. 0 | page 19 of 24 noise considerations figure 41 illustrates the primary noise contributors for the typical gain configurations. the total rms output noise is the root mean s quare of all the contributions. r g r s iep ien + vout_en ? r f ven 4kt r s vn _ r s = 4kt r g vn _ r g = 4kt r f vn _ r f = 10186-044 figure 41 . noise sources in typical gain con figura tion s the output noise spectral density can be calculated as follows: vout_en = (6) [ ] 2 2 2 2 2 2 2 4 4 1 4 f g g f s s g f f r ien ktr r r ven r iep ktr r r ktr + ? ? ? ? ? ? ? ? + + + ? ? ? ? ? ? ? ? + + where : k is boltzmanns c onstant. t is the absolute temperature ( degrees kelvin ) . r f and r g are the feedback network resistances , as shown in figure 41. r s is the source resistance, as shown in figure 41. iep and ien represent the amplifier input current noise spectral density (pa/hz). ven is the amplifier input voltage noise spectral density (nv/hz). source resistance noise, amplifier voltage noise ( ven ), and the voltage noise from the amplifier current noise ( iep r s ) are all subject to the noise gain term (1 + r f /r g ). note that with a 1 nv/hz input voltage noise and a 2. 7 pa/hz input current noise, the n oise contributions of the amplifier are relatively small for source resistances from approximately 50 ? to 700 ?. figure 42 shows the total rti noise due to the amplifier vs. the source resistance. in addition, the value of th e feedback resistors used affe cts the noise. it is recommended that the value of the feedback resistors be maintained between 250 ? and 1 k? to keep the total noise low. 50 500 noise (nv/ +] source resis t $1&( 5 0.5 50 500 5k 50k amplifier noise amplifier and resistor noise source resistance noise 10186-045 figure 42 . rti noise vs. source resistance
ada4895- 2 data sheet rev. 0 | page 20 of 24 application s i nformation using the ada4895 - 2 at a g ain < +10 the ada4895 - 2 is minimum gain 10 stable when used in normal gain configurations. however, the ada4895 - 2 can be configured to work at lower gains down to a gain of +5. figure 43 shows how to add a simple rc circuit (r 1 = 49.9 ? and c 1 = 60 pf) to allow the ada4895 - 2 to operate at a gain of +5. v out c l 150 pf r o 50? c 1 60pf r 1 50 ? v in r t 50 ? r g 50 ? r f 200 ? 10186-046 figure 43 . configuring the ada489 5- 2 for a gain of + 5 s table this circuit has a gain of 9 at high frequency and a gain of 5 at frequencies lower than the resonance frequency of 5 3 mhz (1/2r 1 c 1 ) . with a noise gain of approximately 9 at high frequency, the total output noise increase s unless an antialiasing filter is us ed to block the high frequency content. figure 44 shows the small and large signal frequency response of the circuit shown in figure 43 into a 50 ? analyz er (g = +5 v/v o r 14 db). as shown in figure 44 , the circ uit is very stable, and the pea king is a little over 2 db. this configuration is scalable to accommodate any gain from 5 to 10, as shown in table 9 . ?1 2 5 8 1 1 14 17 0.1 1 10 100 1000 closed-loo p gain (db) frequenc y (mhz) 10186-047 v out = 30mv p-p v out = 2v p-p v out = 250mv p-p v s = 5v g = +5 figure 44 . frequency response for g = +5 table 9 . component values used with the ada4895 - 2 for gain < + 10 gain r t (?) r 1 (?) c 1 (pf) r g (?) r f (?) r o (?) c l (pf) +5 49.9 49.9 60 49.9 200 49.9 150 + 6 49.9 66.5 45 40.2 200 49.9 150 + 7 49.9 110 27 37.4 226 49.9 150 + 8 49.9 205 15 32.4 226 49.9 120 + 9 49.9 na na 30.9 249 49.9 100
data sheet ada4895- 2 rev. 0 | page 21 of 24 high gain bandwi d th a pplication the circuit in figure 45 shows cascaded dual amplifier stages using the ada4895 - 2 . each stage has a gain of + 10 ( + 20 db) , making the output 100 times (+40 db) the inp ut. the total gain bandwidth product is a pproximately 9 ghz w ith the part operating on 6 ma of quiescent current (3 ma per amplifier). v out v in r t 50 ? r l 1k ? r f 226 ? c f 2pf c 1 5pf r g 25.5 ? r f 226 ? c f 2pf r g 25.5 ? r 1 249 ? 10186-048 figure 45 . cascaded amplifier stages for high gain applications (g = +100) figure 46 shows the large signal frequency response for two cases. the first case is with installed feedback capacitors (c f = 2 pf) , and the second case is without the se capacitors. removing the 2 pf feed back capacitors from this cir cuit increases the bandwidth, but adds about 0.5 db of peaking. 0 4 8 12 16 20 24 28 32 36 40 44 0.1 1 10 100 1000 gain (db) frequenc y (mhz) c f = 2pf no c f v out = 2v p-p g = +100 10186-049 figure 46 . large signal frequency response, g = +100, v s = 5 v to better balance the second stage and remove the current offset contribution, an r 1 c 1 circuit can be sized to correct for any mis - match between the source impedance and the feedback network impedance on the input amplifier. ( in the example shown in figure 45 , r 1 = 249 ? and c 1 = 5 pf .) the offset of each amplifie r is within the same statistical range. as configured, the offset of the output amplifier is not statistically significant to th e overall offset of the system. figure 46 was captured using a 5 v supply; however, t his circuit will also operate with supplies from 1.5 v to 5 v as long as the input and output headroom values are not violated.
ada4895-2 data sheet rev. 0 | page 22 of 24 wideband photomultiplier preamplifier a decompensated amplifier can provide significantly greater speed in transimpedance applications than a unity-gain stable amplifier. the speed increases by the square root of the ratio of the two amplifiers bandwidth; that is, a 1 ghz gbp amplifier is 10 times faster than a 10 mhz amplifier in the same trans- impedance application if all other parameters are kept constant. additionally, the input voltage noise normally dominates the total output rms noise because it is multiplied by the capacitive noise gain network. ? ? f dfm s c cccc ??? in the case of the ada4895-2 , the input noise is low, but the capacitive noise gain network must be kept greater than 10 for stability reasons. one disadvantage of using the ada4895-2 in transimpedance applications is that the input current and input current noise can create large offsets and output voltage noise when coupled with an excessively high feedback resistance. despite these two issues, the ada4895-2 noise and gain bandwidth can provide a significant increase in performance within certain transimpedance ranges. figure 47 shows an i/v converter with an electrical model of a photomultiplier. ? + v out v b c f +c s c d c m c m r f r sh c s i photo c f r f 10186-050 figure 47. wideband photomultiplier preamplifier the basic transfer function is ff f photo out rsc ri v ? ? ? 1 where i photo is the output current of the photomultiplier, and the parallel combination of r f and c f sets the signal bandwidth. the stable bandwidth attainable with this preamplifier is a function of r f , the gain bandwidth product of the amplifier, and the total capacitance at the summing junction of the amplifier, including c s and the amplifier input capacitance. r f and the total capacitance produce a pole in the loop trans- mission of the amplifier that can result in peaking and instability. adding c f creates a zero in the loop transmission that compensates for the pole effect and reduces the signal bandwidth. it can be shown that the signal bandwidth resulting in a 45 phase margin (f (45) ) is defined as follows: ?? s f 45 cr gbp f ?? ? 2 where: gbp is the gain bandwidth product. r f is the feedback resistance. c s is the total capacitance at the amplifier summing junction (amplifier + photomultiplier + board parasitics). the value of c f that produces f (45) is gbpr c c f s f ?? ? 2 the frequency response in this case shows approximately 2 db of peaking and 15% overshoot. doubling c f and reducing the bandwidth by half results in a flat frequency response with approximately 5% transient overshoot. the output noise over frequency for the preamplifier is shown in figure 48. frequency (hz) v o l t age noise(nv/ hz) rf noise f 1 noise due to amplifier ven f 2 1 2 r f f 1 = f 2 = 1 2 r f c f f 3 = gbp ven (c s + c m + c f + c d ) /c f f 3 10186-051 (c s + c m + c f + c d ) (c s + c m + c f + c d ) /c f figure 48. photomultiplier voltage noise contributions table 10. rms noise contributions of photomultiplier preamplifier contributor expression r f 571frkt4 2 f . ??? amplifier ven ? ? 57.1f c cccc ven 3 f dfm s ?? ?? ? ? amplifier ien 571frien 2 f . ???
data sheet ada4895- 2 rev. 0 | page 23 of 24 layout consideration s to ensure optimal performance, careful and deliberate attention must be paid to the board layout, signal routing, power supply bypassing, and grounding. ground plane it is important to avoid ground in the areas under and around the input and output of the ada4895 - 2 . stray capacitance created between the ground plane and the input and output pads of a device is detrimental to high speed amplifier performance. stray capacitance at the inverting input, along with th e amplifier input capacitance, lowers the phase margin and can cause instability. stray capacitance at the output creates a pole in the feedback loop, which can reduce phase margin and can cause the circuit to become unstable. power supply bypassing power supply bypassing is a critical aspect in the performance of the ada4895 - 2 . a parallel connection of capacitors from each power supply pin to ground works best. smaller value capacitor electrolytics offer bette r high frequency response, whereas larger value capacitor electrolytics offer be tter low frequency performance. paralleling different values and sizes of capacitors helps to ensure that the power supply pins are provided with low ac impedance across a wide band of frequencies. this is important for minimiz - ing the coupling of noise into the amplifier especially when the amplifier ps r r begins to roll off because the bypass capacitors can help lessen the degradation in ps r r performance. place t he smallest val ue capacitor on the same sid e of the board as the amplifier and as close as possible to the amplifier power supply pins. connect t he ground end of the capacitor directly to the ground plane. it is recommended that a 0.1 f ceramic capacitor with a 0508 cas e size be used. the 0508 case size offers low series inductance and excellent high frequency performance. place a 10 f electro - lytic capacitor in parallel with the 0.1 f capacitor. depending on the circuit parameters, some enhancement to performance can be realized by adding additional capacitors. each circuit is different and should be analyzed individually for optimal performance.
ada4895- 2 data sheet rev. 0 | page 24 of 24 outline dimensions compliant to jedec sta ndards mo-187-ba 091709-a 6 0 0.70 0.55 0.40 5 1 0 1 6 0.50 bsc 0.30 0.15 1. 10 max 3.10 3.00 2.90 coplanarity 0.10 0.23 0. 13 3.10 3.00 2.90 5.15 4.90 4.65 pin 1 identifier 15 max 0.95 0.85 0.75 0.15 0.05 figure 49 . 10 - lead mini small outline package [msop] (rm - 10) dimensions shown in millimeters ordering guide model 1 temperature range package description package option o rdering quantity branding ada4895 - 2armz ?40c to +125c 10- lead mini small outline package [msop] rm - 10 50 h35 ada4895 - 2armz - r7 ?40c to +125c 10- lead mini small outline package [msop] rm - 10 1,000 h35 ada4895 - 2armz - rl ?40c to +125c 10- lead mini small outline package [msop] rm - 10 3,000 h35 ada4895 - 2arm - ebz e valuation b oard 1 z = rohs compliant part. ? 2012 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d10186 - 0 - 9/12(0)

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