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tc33369/70/1/2/3/4 tc33369/70/1/2/3/4-1 8/5/99 telcom semiconductor reserves the right to make changes in the circuitry and specifications of its devices high voltage power switching regulator features n programmable state controller n on-chip 700v sensefet? power switch circuit n rectified ac line source operation from 85v to 265v n on-chip 700v active off-line start-up circuit n latching pwm for double pulse suppression n cycle-by-cycle current limiting n input undervoltage lockout with hysteresis n non-latching internal thermal shutdown n enhanced functionality over top200 and top221 series typical applications n consumer electronics n office automation n personal computers n wireless communications n industrial systems general description the tc33369 through tc33374 are monolithic high voltage power switching regulators that combine the re- quired converter functions with a unique programmable state controller, allowing a simple and economical power system solution for office automation, consumer, and indus- trial products. these devices are designed to operate in flyback converter applications, directly from a rectified ac line source. they are capable of providing an output power in excess of 150w with a fixed ac input of 100v, 115v, or 230v, and in excess of 90w with a variable ac input that ranges from 85v to 265v. this device series features a programmable state con- troller, an on-chip 700v sensefet? power switch circuit, 700v active off-line startup circuit including a high voltage jfet and low voltage mosfet, auto restart logic, fixed frequency duty cycle controlled oscillator, current limiting comparator with leading edge blanking, latching pulse width modulator for double pulse suppression, and a high gain amplifier with a bandgap reference. protective features include cycle-by-cycle current limiting, input undervoltage lockout with hysteresis, and a non-latching thermal shut- down. these devices are available in economical straight- lead and vertical mount 5-pin to-220 style packages. sensefet is a trademark of motorola inc. typical application pin configuration gnd power switch pin v cc feeback input state control input 12345 tc33369 series 5-pin to-220 programmable state controller pulse width modulator controller power switch circuit snubber feedback feedback aux power supply input v cc gnd power switch pin + + + + dc output 2 1 5 state control input on/off 4 3 ac input + startup circuit see page four for ordering information.
2 high voltage power switching regulator tc33369/70/1/2/3/4 tc33369/70/1/2/3/4-1 8/5/99 electrical characteristics: (pin 1 connected to pin 2, typical values t j = 25 c, min/max values are specified at t j = C40 c to +125 c, unless otherwise noted.) symbol parameter test conditions min typ max unit oscillator f osc oscillator frequency i fb = 4.0 ma 70 100 115 khz amplifier and pwm comparator (pin 2) v reg(fb) feedback input shunt regulation i fb = 4.0 ma 8.3 8.6 8.9 v d v reg(fb) active shunt regulator i fb = 4.0 ma, note 4 0.005 %/ c temperature coefficient r i feedback input resistance i fb = 3.5 ma to 4.5 ma, note 2 14 19 23 w d r i feedback input resistance i fb = 3.5 ma to 4.5 ma, note 4 0.3 %/ c temperature coefficient i th(pwm) feedback input current at tc33369, 70 1.2 1.6 2.1 ma duty cycle reduction threshold tc33371 1.3 1.8 2.3 tc33372 1.4 2.0 2.4 tc33373, 73a 1.5 2.1 3.0 tc33374 1.6 2.2 3.2 a v amp/pwm gain i fb = 3.5 ma to 4.5 ma, note 2 C10 C14 C18 %/ma d a v amp/pwm gain coefficient note 4 C0.05 %/ c d max pwm maximum duty cycle i fb = i cc1 71 74 77 % d min pwm minimum duty cycle i fb = 10 ma 0.5 0.9 2.0 % shutdown latch i sd current into pin 2 to set 30 70 150 ma shutdown latch v rst shutdown latch power-up reset 2.5 3.7 5.0 v threshold voltage state control (pin 4) v oc(st) state control input open i fb = 4.0 ma 3.2 3.55 3.8 v circuit voltage v th(st) set comparator threshold v cc = v reg(fb) 4.1 4.4 4.7 v voltage v clmp(st) set comparator input clamp voltage v cc = v reg(fb) , i in = 0.5 ma 5.0 5.5 6.5 v i in(st) set comparator input clamp current v cc = v reg(fb) , v in = 8.6v 1.0 ma v th(tg) toggle comparator threshold voltage v cc = v reg(fb) , v in decreasing 1.6 1.8 2.0 v t h(tg) toggle comparator hysteresis v cc = v reg(fb) , v in increasing 200 mv i in(tog) toggle comparator input current v cc = v reg(fb) , v in = 0.2v C40 m a i rst(st) state control input reset current v cc < v rst , v st = 1.1v 1.0 3.7 7.0 ma absolute maximum ratings* power switch circuit and start-up circuit voltage range (v 5 ) .............................. C0.3v to 700v current peak during transformer saturation (i 5(pk) ) ................................... 2.0a i lim max power supply voltage range (v cc ) ............ C0.3v to 10v feedback input voltage range (v ir(fb) ) ......................... C0.3v to 10v current (i fb ) .................................................... 100 ma state control input current (i st ) .............................50 ma to220-5 q jc .............................................................. 2.0 c/w q ja ............................................................... 65 c/w operating junction temperature (t j ) .... C40 c to +150 c storage temperature (t stg ) .................. C65 c to +150 c *static-sensitive device. unused devices must be stored in conductive material. protect devices from static discharge and static fields. stresses above those listed under absolute maximum ratings may cause perma- nent damage to the device. these are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. thermal characteristics
3 tc33369/70/1/2/3/4 high voltage power switching regulator tc33369/70/1/2/3/4-1 8/5/99 electrical characteristics (cont): (pin 1 connected to pin 2, typical values t j = 25 c, min/max values are specified at t j = C40 c to +125 c, unless otherwise noted.) symbol parameter test conditions min typ max unit power switch (pin 5) r 5, 3 (on) on-state resistance i 5 = 50 ma tc33369, t j = 25 c 12 13.5 w tc33370 t j = 125 c 21 30 i 5 = 100 ma tc33371 t j = 25 c 6.8 7.5 t j = 125 c 13 14.5 i 5 = 150 ma tc33372 t j = 25 c 4.8 5.5 t j = 125 c 8.0 9.0 i 5 = 175 ma tc33373a t j = 25 c 4.0 5.0 t j = 125 c 7.2 9.0 i 5 = 200 ma tc33373 t j = 25 c 3.8 4.5 t j = 125 c 6.8 8.5 i 5 = 250 ma tc33374 t j = 25 c 3.0 3.5 t j = 125 c 5.4 6.5 v (br)d5 pin-5 breakdown voltage i 5(off) = 100 m a; t a = 25 c 700 v i 5(off) pin-5 off-state current v 5 = 700v t j = 25 c 28 50 m a t j = 125 c 100 200 t on turn-on time (90% to 10%) 10 nsec t off turn-off time (10% to 90%) 15 nsec current limit and thermal protection i lim current limit threshold t j = 25 c tc33369 0.44 0.5 0.56 a tc33370 0.8 0.9 1.0 tc33371 1.3 1.5 1.7 tc33372 1.8 2.0 2.2 tc33373a 2.2 2.5 2.8 tc33373 2.4 2.7 3.0 tc33374 2.9 3.3 3.7 t plh current limit threshold-to-power 280 nsec switch circuit output (leading edge blanking plus current limit delay) t sd thermal shutdown temperature junction temp.increasing (note 1, 3) 140 157 c t h thermal shutdown hysteresis junction temp. decreasing (note 1, 3) 15 c startup control (pin 1) v cc(on) uvlo start-up voltage threshold v cc increasing 8.2 8.5 8.8 v v cc(min) uvlo minimum operating 7.2 7.5 7.8 v voltage after turn-on v h uvlo hysteresis voltage 0.8 1.0 1.2 v i start start-up circuit pin 1 pin 5 = 50v v cc = 0v 1.2 2.0 2.5 ma output current v cc = 8.0v 0.5 1.4 2.5 d rst auto restart duty cycle pin 1 = 47 m f, pin 5 = 50v 5.0 % f rst auto restart frequency pin 1 = 47 m f, pin 5 = 50v 1.2 hz total device (pin 1) i cc1 power switch circuit current after power supply tc33369, 70 0.5 1.2 1.7 ma uvlo turn-on enabled tc33371 0.65 1.4 1.8 tc33372 0.8 1.5 1.9 tc33373, 73a 0.95 1.7 2.1 tc33374 1.1 1.8 2.2 i cc2 power switch circuit current disabled 0.6 1.0 1.2 notes: 1. maximum package power dissipation limits must be observed. 5. adjust di/dt to reach ilim in 5.0 m s. 2. min/typ/max specified at 25 c. 3. min/typ/max specified at tj = C40 c to +125 c. 4. guaranteed by design only
4 high voltage power switching regulator tc33369/70/1/2/3/4 tc33369/70/1/2/3/4-1 8/5/99 pin description pin number function description 1v cc positive supply voltage input. during startup, power is supplied to this input from pin 5. when v cc reaches the uvlo upper threshold, the start-up circuit turns off, and power is supplied from an auxiliary transformer winding. 2 feedback input shunt regulator amplifier input. this input provides duty cycle control for the power switch circuit. it has an 8.6v threshold and normally connects to the converter output, or to a voltage that represents the converter output. 3 ground control circuit and power switch circuit ground. it is part of the integrated circuit lead frame and is electrically common to the metal heatsink tab. 4 state control input a multifunction input designed to interface with a small number of external components to implement various methods of converter on/off control. 5 power switch pin this pin directly drives the converter transformer primary and internally connects to the power switch circuit and start-up circuit. ordering information power switch operating part no. package on resistance peak current junction temperature ( w ) (a) (t j ) tc33369vat to-220-5 straight lead 12 0.5 C40 c to +150 c tc33370vat to-220-5 straight lead 12 0.9 C40 c to +150 c tc33371vat to-220-5 straight lead 6.8 1.5 C40 c to +150 c tc33372vat to-220-5 straight lead 4.8 2.0 C40 c to +150 c tc33373vat to-220-5 straight lead 3.8 2.7 C40 c to +150 c tc33374vat to-220-5 straight lead 3.0 3.3 C40 c to +150 c tc33369vav to-220-5 vertical mount 12 0.5 C40 c to +150 c tc33370vav to-220-5 vertical mount 12 0.9 C40 c to +150 c tc33371vav to-220-5 vertical mount 6.8 1.5 C40 c to +150 c tc33372vav to-220-5 vertical mount 4.8 2.0 C40 c to +150 c tc33373vav to-220-5 vertical mount 3.8 2.7 C40 c to +150 c TC33374VAV to-220-5 vertical mount 3.0 3.3 C40 c to +150 c
5 tc33369/70/1/2/3/4 high voltage power switching regulator tc33369/70/1/2/3/4-1 8/5/99 detailed description the tc33369 thru tc33374 represent a new higher level of integration by providing on a single monolithic chip all of the active power, control, logic, and protection circuitry required to implement a high voltage flyback, forward, boost, or buck converter. this device series is designed for direct operation from a rectified 240 vac line source and requires minimal external components for a complete cost sensitive converter solution. potential markets include office automa- tion, industrial, residential, personal computer, and con- sumer. a description of each of the functional blocks is given below, and the representative block diagram is shown in figure 17. oscillator the oscillator block consists of two comparators that alternately gate on and off a trimmed current source and current sink which are used to respectively charge and discharge an on-chip timing capacitor between two voltage levels. this configuration generates a precise linear sawtooth ramp signal that is used to pulse width modulate the mosfet of the power switch circuit. during the charge of the timing capacitor, the oscillator duty cycle output holds one input of the driver low. this action keeps the mosfet of the power switch circuit off, thus limiting the maximum duty cycle. the oscillator frequency is internally programmed for 100 khz operation with a controlled charge to discharge current ratio that yields a maximum pwm duty cycle of 74%. pwm comparator and latch the pulse width modulator (pwm) consists of a com- parator with the oscillator ramp output applied to the invert- ing input, while the amplifier output is applied into the noninverting input. the oscillator clock output applies a set pulse to the pwm latch when the timing capacitor reaches its peak voltage, initiating power switch circuit conduction. as the timing capacitor discharges, the ramp voltage de- creases to a level that is less than the amplifier output, causing the pwm comparator to reset the latch and termi- nate power switch circuit conduction for the duration of the ramp-down period. this method of having the oscillator set and the pwm comparator reset the latch prevents the possibility of multiple output pulses during a given oscillator clock cycle. this circuit configuration is commonly referred to as double pulse suppression logic. a timing diagram is shown in figure 18 that illustrates the behavior of the pulse width modulator. shunt regulator/amplifier feedback input, pin 2, connects to the internal shunt regulator/amplifier. this input is used as a means to close the feedback loop for converter output regulation. the internal circuitry consists of an amplifier with a precise threshold that drives a mosfet in a manner that forms an active shunt regulator. the initial current that flows into pin 1 is used to bias the internal circuitry. any additional current in excess flows into pin 2, and is shunted through resistor r fb to ground. the voltage developed across r fb is used to adjust the pwm comparator threshold, which in turn controls the pwm duty cycle. the duty cycle is inversely proportional to the feedback input current level and is reduced at a rate of about C14% per ma, refer to figure 5. a 7.0 khz low pass filter is placed between r fb and the pwm input. this filter attenuates any switching noise that may be present and reduces the possibility of output pulse width jitter. the amplifier gain is set by the dynamic impedance of the feedback input and is nominally centered at 18 w . the dynamic impedance of this pin combined with the external resistive and capacitive components determines the control loop characteristics of the converter. the feedback input has a temperature compensated threshold of 8.6v and is used as a voltage references or in non-isolated output applications. the input dynamic resistance is shown in figure 6. external shutdown and latch a latching shutdown feature has been incorporated into this device series to eliminate the possibility of converter runaway output voltage during a sudden load removal. the external shutdown block sets the shutdown latch when the feedback input current exceeds 60 ma. when set, the latch holds the power switch circuit off, and the start-up circuit hystereticly regulates the v cc pin 1 voltage between 8.5v to 7.5v. in order to resume the switching operation, the shutdown latch must be reset by the power-up reset block. this can be accomplished directly by momentarily pulling the v cc pin 1 below the 3.7v power-up reset threshold, or indirectly by removing, waiting, and then restoring power to the converter input. the power-up reset block automatically resets the shutdown latch each time power is applied to the device. current limit comparator and power switch circuit this device series uses cycle-by-cycle current limiting as a means of protecting the power switch circuit from overstress. each on-cycle is treated as a separate situa- tion. current limiting is implemented by monitoring the output switch current buildup during conduction, and upon sensing an overcurrent condition, immediately turning off the switch for the duration of the oscillator ramp-down period.
6 high voltage power switching regulator tc33369/70/1/2/3/4 tc33369/70/1/2/3/4-1 8/5/99 the power switch circuit is constructed as a sensefet?circuit with a high voltage jfet in series with a low voltage mosfet. the drain of the high voltage jfet is connected to pin 5. the gate of the jfet is grounded. the source of the jfet is connected to the drain of the low voltage mosfet. the mosfet has two sources of differ- ent size with a known ratio of about 1:100. one source of the mosfet is connected to pin 3 and provides the main current conduction path between pin 5 and pin 3. the second source of the mosfet is used for current sensing by conducting a small percentage of the current between pin 5 and pin 3 through a ground referenced sense resistor, r pk . the voltage across sense resistor r pk represents the current from pin 5 to pin 3 divided by the known ratio of the mosfet sources. the sensefet? circuit allows a virtually lossless method of monitoring the current from pin 5 to pin 3. the current limit comparator detects if the voltage across r pk exceeds the reference level that is present at the noninverting input. if exceeded, the compara- tor quickly resets the pwm latch, thus protecting the power switch circuit. figure 11 shows that this detection method yields a relatively constant current limit threshold over temperature. the high voltage power switch circuit is integrated with the control logic circuitry and is designed to directly drive the converter transformer. the power switch circuit is capable of switching 700v with an associated current from pin 5 to pin 3 that ranges from 0.9a to 3.3a. proper voltage snubbing on pin 5 during converter startup and overload is mandatory for reliable device operation. a leading edge blanking circuit was placed in the current sensing signal path to prevent a premature reset of the pwm latch. a potential premature reset signal is gener- ated each time the power switch circuit is driven into conduction and appears as a narrow voltage spike across the current sense resistor r pk . the spike is due to the low voltage mosfet gate to source capacitance, transformer interwinding capacitance, and output rectifier recovery time. the leading edge blanking circuit has a dynamic behavior that masks the current signal until the power switch circuit turn-on transition is completed. the current limit propaga- tion delay time is typically 280 nsec. this time is measured from when an overcurrent appears at the power switch circuit to the beginning of turn-off. care must be taken during transformer saturation so that the maximum device current limit rating is not exceeded. start-up circuit contained within the tc33369 thru tc33374 is a start- up circuit that is governed by the state control block. the start-up circuit includes a high voltage jfet and a low voltage mosfet. the drain of the high voltage jfet is conneced to pin 5. the gate of the jfet is grounded. the source of the high voltage jfet is connected to the drain of the low voltage mosfet. the jfet pinches off and clamps the voltage on the drain of the mosfet to a low voltage between 18-24 volts. a resistance of 550k w is connected between the drain and gate of the low voltage mosfet. the low voltage on the drain and gate of the mosfet simplifies construction of the start-up circuit. this circuitry yields an increase in converter efficiency by the elimination of an external startup resistor and its associated power dissipa- tion that is common in most of the off-line converters that utilize a uc3842 type of controller. rectified ac line voltage is applied to the start-up circuit from pin 5. this causes the start-up circuit to provide charge current to the v cc bypass capacitor that connects from pin 1 to ground. when v cc reaches the uvlo upper threshold of 8.5v, the start-up circuit is turned off to complete the start-up phase. the ic then commences normal operation. as the converter output approaches regu- lation, the auxiliary transformer winding begins to provide operating bias. all of the required device power is now efficiently converted down directly from the rectified ac line. the start-up circuit will provide an initial charging current of 2.0 ma when powered from 400v. this current will decrease as the v cc pin voltage rises or if the device is powered from a lower input voltage, refer to figures 9 and 10. the start- up circuit is rated at a maximum of 700v with the v cc pin shorted to ground. undervoltage lockout an undervoltage lockout comparator is included to guarantee that the integrated circuit has sufficient voltage to be fully functional before the output stage is enabled. the uvlo comparator monitors the feedback input voltage at pin 2 and when it exceeds the startup threshold of 8.5 v, the start-up circuit turns off, internal bias block is switched on, and the power switch circuit is enabled. to prevent erratic switching as the threshold is crossed, 1.0v of hysteresis is provided. this level of hysteresis ensures that there is sufficient energy stored in the v cc bypass capacitor to power the bias circuitry until auxiliary power supply takes over. if the converter output is nominally loaded, regulation will be established and the opto-isolator will provide suffi- cient current into the feedback input to keep the v cc bypass capacitor charged. figure 19 shows the timing waveforms during start-up and normal operation. if the converter output is overloaded or shorted, the device will enter into the auto restart mode. this happens when the opto-isolator is not able to provide sufficient current in to the feedback input to keep the v cc bypass capacitor chaged. when the capacitor voltage falls below the minimum operating threshold of 7.5v, the uvlo com- parator switches the internal bias block off, and disables the
7 tc33369/70/1/2/3/4 high voltage power switching regulator tc33369/70/1/2/3/4-1 8/5/99 power switch circuit. the start-up circuit is turned on and the v cc bypass capacitor begins charging. when the uvlo startup threshold is reached, the start-up circuit again turns off, the internal bias block is switched on, and the divide by 8 counter is clocked. since the power switch circuit is now disabled by the divide by 8 counter, the opto-isolator will not provide current to the v cc bypass capacitor, the capacitor will discharge. the uvlo comparator and start-up circuit will regulate the capacitor voltage in a hysteretic mode, varying between 7.5v to 8.5v, with an effective ramp-up duty cycle of approximately 35%. the divide by 8 counter will enable the power switch circuit to burst at the 100 khz oscillator frequency on every eighth ramp-down cycle. the device will remain in the auto restart mode until the output overload or short is removed and the threshold of regulation can again be reached. the purpose of the divide by 8 counter is to reduce the power switch circuit and output rectifier dissipation when the converter is subjected to an output overload or short. the counter effectively limits the average switching duty cycle to approximately 5%. figure 20 shows the timing waveforms when in auto restart mode. thermal shutdown and package the internal thermal shutdown block protects the de- vice in the event that the maximum junction temperature is exceeded. when activated, typically at 157 c, one input of the driver is held low to disable the power switch circuit. when disabled, the uvlo comparator and start-up circuit regulate the v cc pin voltage in the hysteretic mode. thermal shutdown activation is non-latching and the power switch circuit is allowed to resume operation when the junction temperature falls below 140 c. the thermal shutdown fea- ture is provided to prevent catastrophic device failures from accidental overheating. it is not intended to be used as a substitute for proper heatsinking. the die in the 8-pin dual-in-line package is mounted on a special heat tab copper alloy lead frame. the tab consists of pins 3, 6, 7, 8 is specifically designed to improve the thermal conduction from the die to the printed circuit board. this permits the use of standard layout and mounting practices while having the stability to halve the junction to air thermal resistance. the die in the 5 pin to-220 style package is mounted directly on a copper alloy heat tab. this metal tab is exposed on the back side of the package for heatsink attachment and is electrically common to the device ground, pin 3. a wide variety of to-220 style heatsinks are commercially available for enhancing the thermal performance and converter out- put power capability. state control the state control block is designed to interface with a small number of external components to implement various methods of converter on/off control. by utilizing the distinc- tive features of the state control input, this device series can be programmed to enter into either the standby* or operating mode in response to an appropriate input stimulus. this stimulus can come from a user interface pushbutton switch, an optically coupled microcontroller output signal, a combi- nation of both, or other circuit configurations. the state control logic can be disabled and made to appear transpar- ent when converter on/off control is not required. table 1 and figure 21 respectively show the state control operating table, and the control block along with seven input examples. the state control block consists of a resistor bias network, toggle and set comparators for threshold detec- tion, an input clamp to provide drive for an opto light emitting diode, control logic elements for storing the operating state, and a reset mosfet for discharging an external capacitor. the state control input is internally biased at 3.55v when the v cc input is regulated at 8.6v. this internal bias can be overridden and driven either low or high by an external signal in order to trip one of the comparators. the toggle and set comparator thresholds are respectively at 1.8v and 4.4v. the comparator outputs are processed and stored by the state control logic block which in turn controls the start-up circuit, internal bias block, and the divide by 8 reset. circuit a shows an input configuration for manual toggle operation. a toggle request is made each time the pushbutton switch is pressed and released. when the toggle compara- tor detects a request, its output clocks the state control logic, resulting in a converter mode change. successive toggle requests causes the converter to alternate between the standby and operating modes. when in standby mode, the uvlo comparator and start-up circuit regulate the v cc pin voltage in the hysteretic mode, and there is not any voltage present at the converter output. circuit b configures the input to interface with a microcontroller for graceful shutdown operation. graceful shutdown is an advanced form of power management where the microcontroller has the overriding responsibility for determining if and when the converter enters into the standby* mode. this is usually programmed to occur after the microcontroller completes a set of housekeeping rou- tines. a toggle request is made each time the pushbutton switch is pressed and released. when the set comparator detects a request, its output sets the state control logic, causing the converter to enter the operating mode. if the converter was initially operating, no mode change takes place. note that each toggle request is conveyed to the microcontroller via opto a. a current path for biasing the light
8 high voltage power switching regulator tc33369/70/1/2/3/4 tc33369/70/1/2/3/4-1 8/5/99 emitting diode is provided by the series resistor and the internal 5.5v input clamp. the microcontroller receives and processes the toggle request and upon completion of a maintenance routine, it sends a toggle confirm signal back to the state control input via opto b. this signal is detected by the toggle comparator and the converter enters into the standby* mode. with this circuit configuration, the user only has control of the standby to operating mode transition. the user can request the operating to standby* mode transition, but the microcontroller has total control on executing the request. circuit c configures the input for brownout protection. the cathode of the zener diode connects to the rectified and filtered ac line voltage that appears at the positive terminal of bulk capacitor c1. with appropriate zener diode and resistor values, the state control input voltage can be set to fall below 1.8 v during a brownout condition. this results in a toggle request that causes the converter to incisively change from operating to standby* mode without any con- verter output voltage bounce. when the ac line voltage returns back to nominal, the voltage at the state control input rises, causing the set comparator to change the converter mode from standby* to operating. note that when the converter is in standby*, the set comparator threshold will be lower than specified, and is approximately 3.84 v. this is because v cc is regulated in the hysteretic mode between 7.5v to 8.5v. circuit d shows a method of accomplishing digital on/off control of the converter. pull-up resistor r serves to bias the set comparator for turn-on, while the npn transistor biases the toggle comparator for turn-off. an economical optocoupler can be used if galvanic isolation of the signal source is required. capacitor c st shown in each of the examples provides an important programming function. a small value capacitor ( 0.05 m f) serves to filter noise that may be coupled into the state control pin, thereby preventing false triggering of the comparators. a relatively large value capacitor ( 3 2.0 m f) will delay the initial rise of the state control voltage during startup. this action results in the converter powering up in standby* rather than the operating mode. circuit e configures the state control input to provide a powerCup time delay of the converter. upon the initial application of ac power, the large value of capacitor c st causes the toggle comparator to place the converter in standby*. when pull-up resistor r charges c st to the set comparator threshold, the converter changes to the operat- ing mode. a graph of power-up time delay versus resistance for three values of c st is shown. the circuits shown in the example in circuit f on page 17 exemplifies two possible methods of disabling the state control block on/off capability, thus rendering it transparent. this feature is useful in applications where converter on/off control is not desired. when nominal ac line voltage is applied to the converter input, the resistor circuit will cause the set comparator to place the converter in the operating mode. the resistor value is not critical, but it should be at least 5.0k w to ensure proper device start-up. the converter will also assume the operating mode if the state control input is left open or unconnected. due to the relatively high input impedance, this input may be susceptible to noise pickup. a small bypass capacitor in the range of 1.0 nf to 50 nf is recommended for c st . the converter will assume the operation mode with either of these circuits. *note: standby means no dc output voltage on the output of the power converter. applications the to-220 devices have a single ground, pin 3, that serves as both a sense point for the shunt regulator/ amplifier and the high current return path for the power switch circuit. do not attempt to construct a converter circuit on a wire-wrap or plug-in prototype board. in order to ensure proper device operation and stability, it is important to minimize the lead length and the associated inductance of the ground pin. this pin must connect as directly as possible to the printed circuit ground plane and should not be bent or offset by the board layout. the power switch pin 5 can be offset using a tv suffix product if additional layout creepage distance is required. due to the potentially high rate of change in switch current, compo- nents r3 and c5 must be connected to ic1 through separate and short copper traces (see figure 22). this will signifi- cantly reduce the level of switching noise that can be imposed upon the feedback control signal. figures 22 and 23 show a universal input 52 watt/90 watt converter with the associated test data. the converters were constructed and tested using the printed circuit board layout shown in figure 24. the board consists of a fiber glass epoxy material (fr4) with a single side of two ounce per square foot copper foil. it is designed as a general purpose single output laboratory test vehicle and therefore does not contain an input electromagnetic interference (emi) filter. the board layout is capable of encompassing the wide range of output power available from the vertical mount to-220-5 package devices by providing a means to accept several component sizes and styles. note that there are multiple positions for output filter capacitors c8 and c11, allowing up to four capacitors in parallel. the various posi- tions for transformer t1 will accomodate four core/bobbin sizes, consisting of e19/8/5 (e187), e22, e25/10/6 (e250), and e28. unused pins must be removed from the bobbin. a choice of four to-220 style heatsinks can be used for integrated circuit ic1 and output rectfier d7. they are available from several manufacturers including aavid engi- neering.
9 tc33369/70/1/2/3/4 high voltage power switching regulator tc33369/70/1/2/3/4-1 8/5/99 the table shown below lists the aavid part numbers along with the associated thermal characteristics. the ex- truded heatsink must be drilled and tapped to allow attach- ment of the device and the printed circuit board. heatsink aavid thermal a number style resistance c/w) 592502b03400 stamped 24 at 2.0 w 593002b03400 stamped 14 at 4.0 w 593202b03500 stamped 10.4 at 5.0 w 590302b03600 stamped 9.2 at 5.0 w 604953b02500 stamped 6.0 at 15 w the maximum output power that can be obtained from a given converter design is limited by the maximum operating junction temperature and current limit threshold of the device selected. the table below provides a general guide for device selection assuming the following conditions: ? discontinuous mode flyback operation ? wide range input operation from 92 vac to 276 vac ? bulk capacitor c1 ripple voltage 25 vpp at 92 vac input ? converter efficiency of 75% ? ambient temperature of 25 c ? adequate heatsinking for a juntion temperature 150 c device converter output power (w) tc33369vat/vav 12 tc33370vat/vav 25 tc33371vat/vav 45 tc33372vat/vav 60 tc33373vat/vav 75 tc33374vat/vav 90
10 high voltage power switching regulator tc33369/70/1/2/3/4 tc33369/70/1/2/3/4-1 8/5/99 table 1. state control operating table (circuits a through d of figure 21) input (pin 4) ac line converter capacitor stimili converter description voltage mode mode toggle operation nominal standby dont care pulsed low operating the converter changes from standby to 1.8v operating mode by the toggle comparator. nominal operating dont care pulsed low standby the converter changes from operating to 1.8v standby mode by the toggle comparator. microcontroller graceful shutdown (circuit b) nominal standby dont care pulsed high operating converter mode toggle requested. the set 3 4.4v comparator changes the converter mode from standby to operating. nominal operating dont care pulsed high operating converter mode toggle requested. no mode 3 4.4v change takes place since the converter was initially operating. the change request is communicated to the mcu via opto a. nominal operating dont care pulsed low standby converter mode toggle is confirmed by the 1.8v mcu via opto b. the converter mode changes from operating to standby. brownout protection (circuit c) nominal to operating dont care biased low standby the ac line voltage level changes from brownout 1.8v nominal to brownout, and zener diode break down ceases. the lower divider resistor biases the toggle comparator input low, changing the converter mode from operating to standby. brownout to standby c st 0.05 m f biased high operating the ac line voltage level changes from nominal 3 3.85v brownout to nominal, and zener diode commences breakdown. this biases the set comparator input high, changing the converter mode from standby to operating. digital on/off control (circuit d) nominal standby dont care biased high operating the transistor is off, and the collector resistor 3 4.4v biases the set comparator input high, placing the converter in the operating mode. nominal operating dont care biased low standby the trasistor is on, and the collector biases the toggle comparator input low, placing the converter in the standby mode. delayed power-up (circuit e) zero to nominal off c st 3 2.0 m f pulsed low off discharged capacitor c st causes the toggle by c st comparator to change the control logic state. 1.8v delay the converter is placed in the standby mode with the power switch disabled. when c st set high operating charges above 4.4v, the set comparator 3 4.4v changes the converter mode from standby to operating. note: when the converter is in standby mode, there is not any voltage present at the output.
11 tc33369/70/1/2/3/4 high voltage power switching regulator tc33369/70/1/2/3/4-1 8/5/99 table 1. state control operating table (cont.) (circuits a through d of figure 21) input (pin 4) ac line converter capacitor stimuli converter description voltage mode mode delayed power-up (circuit e) zero to nominal off c st 3 2.0 m f pulsed low off discharged capacitor c st causes the toggle by c st comparator to change the control logic state. 1.8v delay the converter is placed in the standby mode with the power switch circuit disabled. when c st set high operating charges above 4.4v, set comparator 3 4.4v changes the converter mode from standby to operating. power-up (circuits a and b) zero to nominal off c st 0.05 m f none operating application of ac line power causes converter operation. the state control input is presently configured to be transparent, and the control logic has no effect during power-up. zero to nominal off c st 3 2.0 m f pulsed low standby discharged capacitor c st causes the toggle by c st comparator to change the control logic state. 1.8v the converter is placed in the standby mode with the power switch circuit disabled. note: when the converter is in standby mode, there is not any voltage present at the output.
12 high voltage power switching regulator tc33369/70/1/2/3/4 tc33369/70/1/2/3/4-1 8/5/99 t c , case temperature ( c) v in , input voltage (v) figure 4. state control input open circuit and clamp voltages vs. temperature i fb , feedback input current (ma) d, output duty cycle (%) figure 5. power switch circuit output duty cycle vs. feedback input current v fb , feedback input voltage (v) i fb , feedback input current (ma) figure 6. feedback input current vs. input voltage t c , case temperature ( c) figure 3. state control input threshold voltage vs. temperature v th , input threshold voltage (v) ?0 ?5 0 25 50 75 t c , case temperature ( c) 0 2.0 4.0 6.0 8.0 10 v in , state control input voltage (v) 120 110 100 90 80 fosc, normalized oscillator frequency (khz) figure 1. oscillator frequency change vs. temperature i in , state control input current (ma) figure 2. state control input current vs. input voltage 3.0 2.0 1.0 0 ?.0 100 125 150 input open circuit voltage input pnp transistor clamp input zener clamp i fb = 4.0 ma t a = 25 c ?0 ?5 0 25 50 75 4.6 4.4 4.2 2.3 2.1 1.9 1.7 100 125 150 11 9.0 5.7 5.3 3.6 3.5 ?0 ?5 0 25 50 75 100 125 150 set comparator threshold, v in increasing toggle comparator hysteresis, v in increasing toggle comparator threshold, v in decreasing input zener clamp voltage at 10 ma input pnp clamp voltage at 0.5 ma input open circuit voltage i fb = 4.0 ma 0 2.0 4.0 6.0 8.0 10 80 60 40 20 0 auto restart hysteretic operation threshold of duty cycle reduction tc33370 pin 1 connected to pin 2 t a = 25 c tc33374 power supply current after uvlo turn-on 100 80 60 40 20 0 0 2.0 4.0 6.0 8.0 10 12 pin 1 connected to pin 2 ta = 25 c input resistance ? vfb ? ifb i fb = 4.0ma typical characteristics
13 tc33369/70/1/2/3/4 high voltage power switching regulator tc33369/70/1/2/3/4-1 8/5/99 v cc , power supply voltage (v) i start , start-up circuit current (ma) figure 10. start-up circuit current vs. power supply voltage i lim , mormalized current limit threshold figure 11. power switch circuit current limit threshold vs. temperature ? i/ ? t, current rate of change (a/ sec) i pk , normalized peak current figure 12. power switch circuit peak current vs. current rate of change v 5 , pin 5 voltage (v) figure 9. start-up circuit current vs. pin 5 voltage i start , start-up current (ma) i fb , feedback current (ma) i fb , feedback current (ma) ?0 ?5 0 25 50 75 t c , case temperature ( c) 8.9 8.8 8.7 8.6 8.5 v reg(fb) , shunt regulations voltage (v) figure 7. feedback input shunt regulation voltage and current vs. temperature v cc , startup and minimum operating voltage (v) figure 8. undervoltage lockout thresholds vs. temperature 100 125 150 10 100 1000 ?0 ?5 0 25 50 75 8.8 8.4 8.0 7.6 7.2 100 125 150 t c , case temperature ( c) t c , case temperature ( c) 2.4 2.0 1.6 1.2 0.8 0.4 0 0 2.0 4.0 6.0 8.0 10 ?0 ?5 0 25 50 75 1.2 1.1 1.0 0.9 0.8 100 125 150 2.0 1.8 1.6 1.4 1.2 1.0 0 2.0 4.0 6.0 8.0 10 pin 1 connected to pin 2 feedback input current for 35% power switch circuit output duty cycle shunt regulator voltage i fb = 4.0 ma start-up threshold voltage, v cc increasing minimum operating voltage, v cc decreasing current input pin 5 curent out of pin 1 v 5 = 400 v t case = 25 c v fb adjusted for an initial t on of 2.0 sec tc33370 tc33371 tc33372 tc33373/ tc33374 v 5(off) = 400v t case = 25 c 2.4 2.0 1.6 1.2 0.8 0.4 0 current into pin 5 current out of pin 1 v cc = 5.0v t case = 25 c typical characteristics
14 high voltage power switching regulator tc33369/70/1/2/3/4 tc33369/70/1/2/3/4-1 8/5/99 capacitance (pf) figure 16. power switch circuit capacitance vs. pin 5 voltage v 5 , pin 5 voltage (v) figure 15. power switch circuit off-state current vs. voltage i 5(off) , off-state pin 5 current ( a) 3.0 2.0 1.0 0 i 5 , pin 5 current figure 13. power switch circuit vs. pin 5 voltage r 5, 3 , normalized pin 5 to pin 3 on-response figure 14. normalized power switch circuit on-resistance pin 5 to pin 3 vs. temperature 0 200 400 600 800 1000 ?0 ?5 0 25 50 75 100 125 150 t c , case temperature ( c) 1.0 10 100 1000 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0 2.0 4.0 6.0 8.0 10 v 5 , pin 5 voltage (v) v 5 , pin 5 voltage (v) 10 4 10 3 10 2 10 1 tc33370 tc33371 tc33372 tc33373 tc33374 t on = 1.0 sec t case = 25 c t on = 1.0 sec i 5 = 250 ma v cc power up sequence: 1. 0 to 8.6v, start-up circuit turn off 2. 8.6v to 7.0v, power switch circuit turn off 3. 7.0v to 8.6v, measure pin 5 current power switch breakdown voltage start-up circuit bias current t case = 25 c t case = ?0 c t case = 150 c 500 400 300 200 100 0 v cc power up sequence: 1. 0 to 8.6v, start-up circuit turn off 2. 8.6v to 7.0v, power switch circuit turn off 3. 7.0v to 8.6v, measure capacitance tc33370 tc33371 tc33372 tc33373 tc33374 t case = 25 c c oss measured at 1.0 mhz with 50 mvpp typical characteristics
15 tc33369/70/1/2/3/4 high voltage power switching regulator tc33369/70/1/2/3/4-1 8/5/99 figure 17. tc33369 C tc33374 block diagram + + snubber state control internal bias + thermal shutdown power-up reset external shutdown minimum on-time delay leading edge blanking + ac line input auxiliary power supply converter dc output on/off toggle state control input start-up circuit power switch pin 5 feedback feedback input undervoltage lockout shunt regulator/ amplifier 10v 10v 8.5v/ 7.5v 8.6v 10v shutdown latch pwm latch pwm comparator 7.0 khz filter current limit comparator power switch circuit auto restart timing/ loop compensation/ power supply bypass r fb gnd s q r q r s q r ck 3 4 driver oscillator duty cycle clock ramp 2 1 v cc r pk + divide by 8 i fb
16 high voltage power switching regulator tc33369/70/1/2/3/4 tc33369/70/1/2/3/4-1 8/5/99 8.5 v 7.5 v 0 v 0 v flyback voltage rectified line voltage switching shunt regulation threshold power switch circuit voltage pin 5, pin 3 feedback voltage (pin 2) switching disabled normal operation startup figure 19. startup and normal operation timing diagram figure 18. pulse width modulation timing diagram normal pwm operating range output overload current limit threshold current limit propagation delay feedback input (r fb voltage) oscillator ramp oscillator duty cycle oscillator clock pwm comparator output pwm latch q output power switch circuit gate drive leading edge blanking input (power switch circuit current)
17 tc33369/70/1/2/3/4 high voltage power switching regulator tc33369/70/1/2/3/4-1 8/5/99 8.5 v 7.5 v 0 v 0 v flyback voltage rectified line voltage switching feedback input voltage (pin 2) power switch circuit voltage (pin 5) switching disabled auto restart operation with overloaded or shorted output startup start-up circuit duty cycle during auto restart, external shutdown, thermal shutdown, and state control off mode 35% 65% switching switching disabled switching switching disabled start-up circuit hysteretic regulation on i start off i cc1 on i start off i cc2 on i start off i cc2 on i start off i cc1 eight cycles 1278 1 7 28 1 5% power switch circuit duty cycle during auto restart 95% figure 20. auto restart operation timing diagram
18 high voltage power switching regulator tc33369/70/1/2/3/4 tc33369/70/1/2/3/4-1 8/5/99 state control logic from v cc voltage detector outputs start-up circuit to internal bias and divide by 8 reset 10 v state control input set comparator toggle comparator 1.8 v/ 2.0 v 8.6 v 3.55 v 4.4 v 1.8 v reset 116 k input clamp 5.5 v v cc 1 4 power switch pin 5 10 v 165 k primary common c st toggle request 10 to 10 k r primary common 5.0 k to 100 k r c st v cc 1.0 nf to 50 nf primary common 100 k to 300 k r c st v cc 10 f to 100 f primary common 5.0 k to 100 k r c st v aux 1 = converter off 0 = converter on primary common c st v bulk v z r2 r1 primary common r c st v aux toggle request microcontroller printer port secondary common control outputs + isolation boundary toggle confirm power?p time delay versus resistance r, resistance (k ) 100 200 150 8.0 4.0 0 12 100 f 10 f c st = 50 f t , time delay (s) dly digital on/off control of the converter is accomplished with a small signal npn transistor. an optocoupler can be used if galvanic isolation is required. digital on/off control (circuit d) power?p time delay (circuit e) a programmed power?p time delay can be implemented with the addition of a simple rc circuit. state control disabled (circuit f) the state control block on/off capability can be disabled and made to appear transparent by either connecting a pull?p resistor from the input to v cc or a small value capacitor from the input to primary common. this input should not be left unconnected since it has a relatively high impedance and may be susceptible to noise pick?p. brownout protection (circuit c) choose vac (on to off) and vac (off to on) thresholds. determine converter output power p o , efficiency , and input bulk capacitance c blk . mcu graceful shutdown (circuit b) manual toggle operation (circuit a) resistor r is required for proper toggle functionality when operating the device at an elevated temperature with long leads to the pushbutton switch. r 2 r 1 v blk(min) v z 3.84 or v blk(max) v z 1.8 v z 1.88 v blk(min) 0.88 v blk(max) v blk(max) vac (off to on) 2 1.4 v blk(min) vac (ontooff) 2 p o vac (ontooff) 2f ac c blk 1.4 internal state control block functional diagram tc33369 thru tc33374 figure 21. state control block with input control examples
19 tc33369/70/1/2/3/4 high voltage power switching regulator tc33369/70/1/2/3/4-1 8/5/99 figure 22. universal input 52w off-line converter this data was taken with the components listed below mounted on the printed circuit board shown in figure 24. c8, c11 = sanyo osCcon #16sa470m, 470 m f/16v. c12 = sanyo osCcon #16sa150m, 150 m f/16v. ic1, d7 = tc33374, mbr20100 mounted on aavid #590302b03600 heatsink. l1 = coilcraft s5088Ca, 5.0 m h, 0.011 w . t1 = coilcraft primary: 49 turns of #24 awg, pin 6 = start, pin 5 = finish. two layers 0.002 mylar tape. secondary: 9 turns of #21 awg, 2 strands bifilar wound, pins 1 and 2 = start, pins 9 and 10 = finish. two layers 0.002 mylar t ape. auxiliary: 7 turns of #24 awg wound in center of bobbin, pin 7 = start, pin 4 = finish. gap: 0.017 total for a primary inductance (l p ) of 345 m h, with a primary to secondary leakage inductance of 14 m h. core: ferrite international e24/25 (e25/10/6) tsfC7070 material. bobbin: philips e24C25pcb1C10, pins 3 and 8 removed. + + 15 v/3.5 a dc output pb1 on/off toggle 92 to 276 vac input d4 d2 d3 d1 1n5406 f1 3.0 a + + + r3 3.6 c5 50 c4 0.01 r7 100 1/2 ic2 moc8103 tc 33374 ic1 z1 1.5ke200a d5 mur160 c13 1.0 c12 150 c8 470 c11 470 ++ c2 50 pf r2 3.9 k c14 mur 120 1.0 nf c6 10 d6 ic3 tl431b r6 75 k r4 270 d7 mbr20100ct r5 15 k c1 f f f f f f f f 100 f t1 c7 0.1 1/2 ic2 moc 8103 l1 5.0 h table 2. converter test data test conditions results line regulation v in = 92 vac to 276 vac, i o = 3.5a d = 2.0 mv load regulation v in = 115 vac, i o = 0.35 a to 3.5a d = 9.0 mv v in = 230 vac, i o = 0.35 a to 3.5a d = 13 mv output ripple v in = 92 vac to 276 vac, i o = 3.5a total = 170 mv pCp efficiency v in = 115 vac, i o = 3.5a 84.4% v in = 230 vac, i o = 3.5a 86.2% ac input power v in = 115 vac, converter toggle off 0.06w v in = 230 vac, converter toggle off 0.19w
20 high voltage power switching regulator tc33369/70/1/2/3/4 tc33369/70/1/2/3/4-1 8/5/99 figure 23. universal input 90w off-line converter this data was taken with the components listed below mounted on the printed circuit board shown in figure 24. c8, c11 = sanyo osCcon #16sa1000m, 1000 m f/16v. c12 = sanyo osCcon #16sa150m, 100 m f/16v. ic1 = tc33374 mounted on aavid #604953b02500 extruded heatsink. the heatsink must be drilled and tapped to allow device and pcb at tachment. z1 = 1.5ke200a with cathode lead soldered in the center of a 5/8 x 3/4 x 0.025 thick uCshaped copper heatsink. d7 = mbr20100 mounted on aavid #590302b03600 heatsink. l1 = coilcraft pcvC0C332C10, 3.3 m h, 0.005 w . t1 = coilcraft primary: 34 turns of # 24 awg, pin 9 = start, pin 6 = finish. two layers 0.002 mylar tape. secondary: 5 turns of # 20 awg, 2 strands bifilar wound, pins 4 and 5 = start, pins 1 and 2 = finish. two layers 0.002 mylar t ape. auxiliary: 4 turns of #24 awg wound in center of bobbin, pin 10 = start, pin 7 = finish. gap: 0.022 total for a primary inductance (l p ) of 290 m h, with a primary to secondary leakage inductance of 7.2 m h. core: tdk pc40 ei28z, pc40 material. bobbin: tdk beC28C1110cpl, pins 3 and 8 removed. + + 15 v/6.0 a dc output pb1 on/off toggle 92 to 276 ac input d4 d2 d3 d1 1n5406 f1 f f f f f f f f f 5.0 a + + r3 3.6 c5 50 c4 0.01 r7 100 1/2 ic2 moc8103 tc 33374 ic1 z1 1.5ke200a d5 mur160 c13 1.0 c12 150 c8 1000 c11 1000 ++ c2 50 pf r2 3.9 k c14 1.0 nf ic3 tl431b r6 75 k r4 270 d7 mbr20100ct r5 15 k c1 330 t1 c7 0.1 1/2 ic2 moc 8103 l1 3.3 h d6 + mur 120 c6 10 table 3. converter test data test conditions results line regulation v in = 92 vac to 276 vac, i o = 6.0a d = 24 mv load regulation v in = 115 vac, i o = 0.6 a to 6.0a d = 26 mv v in = 230 vac, i o = 0.6 a to 6.0a d = 10 mv output ripple v in = 92 vac to 276 vac, i o = 6.0a total = 105 mv pCp efficiency v in = 115 vac, i o = 6.0a 83.2% v in = 230 vac, i o = 6.0a 85.4% ac input power v in = 115 vac, converter toggle off 0.07w v in = 230 vac, converter toggle off 0.17w
21 tc33369/70/1/2/3/4 high voltage power switching regulator tc33369/70/1/2/3/4-1 8/5/99 figure 24. printed circuit board and component layout (circuit of figures 23 and 25) evaluation board bottom layer evaluation board top layer
22 high voltage power switching regulator tc33369/70/1/2/3/4 tc33369/70/1/2/3/4-1 8/5/99 figures 22 and 23 use zener diode z1 to limit the drain voltage and a damper circuit consisting of resistor r2 and capacitor c2. the zener can be replaced with the snubber circuit shown above consisting of resistor r1 and capacitor c3. the component values selected must insure that the drain turn-off voltage never exceeds 700v under all line voltage and load current conditions when using a trans- former with the highest anticipated leakage inductance. there must also be sufficient snubbing and damping to prevent the turn-off voltage on pin 5 from ringing below ground. this will cause forward biasing of the substrate and can result in additional device power dissipation and con- verter instability. suggested snubber and damper compo- nent values for figures 22 and 23 are listed in the table above. the snubber and damper circuits will greatly reduce the radiated switching noise but there will be a slight penalty in converter efficiency. in order to ensure proper device operation, the inte- grated circuit ground, pin 3, must connect as directly as possible to the printed circuit board ground foil. the ground pin should not be bent or offset by the board layout. the power switch circuit, pin 5, can be offset if additional creepage distance is required using a tv suffix product. components r3 and c5 connect through seperate and short copper traces to ic1. this will reduce the level of undesirable switching noise that appears on the feedback input and v cc pins. + + + mur160 ic1 c3 r1 d5 + rc damper rcd snubber r2 c2 converter figure component values snubber output power t1 primary leakage inductance 22 20 k 2.0 w 14 m h 50 w 23 7.2 m h 90 w damper 10 k 3.0 w 0.1 m f 400 v 6.2 k 1.0 w 47 pf 500 v 0.1 m f 400 v 6.2 k 1.0 w 47 pf 500 v r1 c3 r2 c2 pin 5 turn?ff voltage 6.0 8.0 2.0 4.0 10 0 t, turn?ff time ( s) 400 300 200 100 0 v 5 pin 5 voltage (v) v 5 pin 5 voltage (v) pin 5 turn?ff voltage 6.0 8.0 2.0 4.0 10 0 t, turn?ff time ( s) 400 300 200 100 0 sufficient snubbing insufficient snubbing substrate forward biased figure 25. snubber and damper circuits
23 tc33369/70/1/2/3/4 high voltage power switching regulator tc33369/70/1/2/3/4-1 8/5/99 figure 26. transformer auxiliary winding elimination zener shunt regulator method + + + ic1 10k 4w in965b figure 27. transformer auxiliary winding elimination bipolar transistor series regulator method + + + ic1 82k 0.5w 5.1k 0.5w in965b mje 13003
24 high voltage power switching regulator tc33369/70/1/2/3/4 tc33369/70/1/2/3/4-1 8/5/99 figures 26 through 28 show three possible methods of eliminating the transformer auxiliary winding and the asso- ciated fast recovery diode and capacitor. these methods are most practical for fixed or narrow range ac line voltage applications. care must be taken when used in wide range ac line voltage applications, as the power dissipation in the voltage dropping elements may become excessive. figure 28. transformer auxiliary winding elimination mosfet transistor series regulator method the shunt regulator method is the most economical but the series pass methods dissipate less power when used in wide range line voltage applications. the mosfet method is the most efficient since the gate requires essentially zero current. the component values shown in the above figures are for a nominal ac line voltage of 115 volts 20%. + + + ic1 510k 0.1w in968b mtp 1n50e
25 tc33369/70/1/2/3/4 high voltage power switching regulator tc33369/70/1/2/3/4-1 8/5/99 figure 29. converter soft-start converter soft-start can be implemented by separating the connection between pins 1 and 2 with a resistor. initially with the converter in the off state, the internal start-up circuit charges capacitor c5 to a voltage that exceeds the vbe of q1 plus the breakdown of z1. this causes transistors q1 and q2 to latch on. since the voltage at pin 2 is now greater than the internal shunt regulator threshold, minimum duty cycle pulses appear at the power switch circuit pin 5. as the voltage across c5 approaches the regulation thresh- old, the pwm duty cycle will gradually increase until regula- tion is established at the converter output. upon converter power down, the transistor latch will turn off at approximately 8.0v which is slightly greater than the devices highest minimum operating voltage specification. this guarantees that soft-start will be active upon the next power-up cycle. ic1 r3 3.6 15k f f 22k 33k 10k 47k 1.5k 0.01 converter on/off control q2 2n3904 q1 2n3906 in4148 high switch current return from ground pin to negative terminal of capacitor c1. high switch current from transformer t1 to power switch pin z1 1n757a 9.1v z2 1n757a 5.6v c5 47 v cc bias source pwm feedback
26 high voltage power switching regulator tc33369/70/1/2/3/4 tc33369/70/1/2/3/4-1 8/5/99 figure 30. high voltage step-up converter a simple transformerless high voltage step-up con- verter can be constructed with any of the devices in this series. the maximum output voltage of this topology is limited by the power switch circuit breakdown of 700v minus the forward voltage drop of the boost rectifier. the converter requires a minimum input of 15v to guarantee start-up. the regulated output voltage is equal to the sum of the zener voltage drops, plus the shunt regulator threshold, plus the voltage drop across the 3.3k w resistor. the boost rectifier must be a schottky or fast recovery type with sufficient current and voltage capability to meet the converters output requirements. + + + + + tc 33374 dc input 100 f f f f 10 50 100 0.01 l boost rectifier dc output z1 z2 3.3k on/off toggle
27 tc33369/70/1/2/3/4 high voltage power switching regulator tc33369/70/1/2/3/4-1 8/5/99 figure 31. low power off-line converter the converter shown above was designed for cost sensitive low power applications that require a line isolated power source. typical applications include consumer and industrial equipment. note that the transformer auxiliary winding has been eliminated and the tc33370 operates continuously in the auto restart mode. this method of converter operation is capable of providing an output power of up to 200mw. + + + 10 f * f f f 100 mzp 4733a 5.1v/20ma dc output t1 680 680 * 92 to 276 vac input + 50 0.01 1.0nf p4ke600 1n4006 *trw flameproof fusable resistor 1n4006 tc 33370 pb1 r3 c5 c4 r7 ic1 high switch current return from ground pin to negative terminal of capacitor c1. high switch current from transformer t1 to power switch pin. feedback and v cc bias return to auxiliary winding ground terminal of transformer t1. feedback and v cc bias source. figure 32. recommended printed circuit board layout
28 high voltage power switching regulator tc33369/70/1/2/3/4 tc33369/70/1/2/3/4-1 8/5/99 package dimensions (cont.) ? 12345 u k d g a b 5 pl j h l e c m q m 0.356 (0.014) t seating plane ? dim min max min max millimeters inches a 0.572 0.613 14.529 15.570 b 0.390 0.415 9.906 10.541 c 0.170 0.180 4.318 4.572 d 0.025 0.038 0.635 0.965 e 0.048 0.055 1.219 1.397 g 0.067 bsc 1.702 bsc h 0.087 0.112 2.210 2.845 j 0.015 0.025 0.381 0.635 k 0.990 1.045 25.146 26.543 l 0.320 0.365 8.128 9.271 q 0.140 0.153 3.556 3.886 u 0.105 0.117 2.667 2.972 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension d does not include interconnect bar (dambar) protrusion. dimension d including protrusion shall not exceed 10.92 (0.043) maximum. 5-pin to-220 straight lead q k f u a b g m 0.010 p m t 5x j m 0.024 t optional chamfer s l w e c h seating plane 5x d v p t n dim min max inches a 0.572 0.613 b 0.390 0.415 c 0.170 0.180 d 0.025 0.038 e 0.048 0.055 f 0.890 0.930 g 0.067 bsc h 0.105 bsc j 0.015 0.025 k 0.900 1.000 l 0.320 0.365 n 0.259 bsc q 0.140 0.153 s 0.620 u 0.468 0.505 v 0.718 w 0.090 0.100 notes: 1. dimensions are in inches. 2. interpret dimensions and tolerances per asme y14.5m, 1994. 3. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.005 total in excess of the d dimension at maximum material condition. 12345 5-pin to-220 vertical mount -- sales offices telcom semiconductor, inc. 1300 terra bella avenue p.o. box 7267 mountain view, ca 94039-7267 tel: 650-968-9241 fax: 650-967-1590 e-mail: liter@telcom-semi.com telcom semiconductor, gmbh lochhamer strasse 13 d-82152 martinsried germany tel: (011) 49 89 895 6500 fax: (011) 49 89 895 6502 2 telcom semiconductor h.k. ltd. 10 sam chuk street, ground floor san po kong, kowloon hong kong tel: (011) 852-2350-7380 fax: (011) 852-2354-9957

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