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? 2001 microchip technology inc. ds21051h-page 1 m 24lc04b/08b features ? single supply with operation down to 2.5v low power cmos technology - 1 ma active current typical -10 a standby current typical at 5.5v -5 a standby current typical at 3.0v organized as two or four blocks of 256 bytes (2 x 256 x 8) and (4 x 256 x 8) 2-wire serial interface bus, i 2 c? compatible schmitt trigger, filtered inputs for noise suppression output slope control to eliminate ground bounce 100 khz (e-temp) and 400 khz (c/i-temp.) compatibility self-timed write cycle (including auto-erase) page-write buffer for up to 16 bytes 2 ms typical write cycle time for page-write hardware write protect for entire memory can be operated as a serial rom factory programming (qtp) available esd protection > 4,000v 1,000,000 erase/write cycles ensured data retention > 200 years 8-pin dip, 8-lead soic, 8-pin tssop packages available temperature ranges: description the microchip technology inc. 24lc04b/08b is a 4 kbit or 8 kbit electrically erasable prom (eeprom). the device is organized as two or four blocks of 256 x 8-bit memory with a 2-wire serial interface. low voltage design permits operation down to 2.5 volts with typical standby and active currents of only 5 a and 1 ma respectively. the 24lc04b/08b also has a page-write capability for up to 16 bytes of data. the 24lc04b/08b is available in the standard 8-pin dip, 8-lead surface mount soic, msop and tssop packages. package types block diagram - commercial (c): 0c to +70c - industrial (i): -40c to +85c - automotive (e): -40c to +125c 24lc04b/08b 1 2 3 4 8 7 6 5 a0 a1 a2 vss v cc wp scl sda pdip, soic tssop 24lc04b/08b a0 a1 a2 v ss v cc wp scl sda 1 2 3 4 8 7 6 5 v cc wp scl sda 8 7 6 5 24lc04b/08b a0 a1 a2 v ss 1 2 3 4 msop note: a0, a1 and a2 are not used hv generator eeprom array (2 x 256 x 8) or page latches ydec xdec sense amp r/w control memory control logic i/o control logic wp sda scl v cc v ss (4 x 256 x 8) 4k/8k 2.5 i 2 c? serial eeproms
24lc04b/08b ds21051h-page 2 ? 2001 microchip technology inc. 1.0 electrical characteristics 1.1 maximum ratings* v cc ........................................................................7.0v all inputs and outputs w.r.t. v ss ....-0.3v to v cc + 1.0v storage temperature .......................... -65 c to +150 c ambient temp. with power applied .....-65 c to +125 c soldering temperature of leads (10 seconds) .. +300 c esd protection on all pins ..................................... 4 kv table 1-1: pin function table table 1-2: dc characteristics figure 1-1: bus timing start/stop *notice: stresses above those listed under ? maximum ratings ? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the opera- tional listings of this specification is not implied. exposure to maximum rating conditions for extended periods may affect device reliability. name function v ss ground sda serial address/data i/o scl serial clock wp write protect input v cc +2.5v to 5.5v power supply a0, a1, a2 no internal connection v cc = +2.5v to +5.5v commercial (c): t amb = 0c to +70c industrial (i): t amb = -40c to +85c automotive (e): t amb = -40c to +125c parameter symbol min. max. units conditions wp, scl and sda pins: high level input voltage low level input voltage hysteresis of schmitt trigger inputs low level output voltage v ih v il v hys v ol .7 v cc ? .05 v cc ? ? .3 v cc ? .40 v v v v ? ? (note) i ol = 3.0ma, v cc = 2.5v input leakage current i li -10 10 av in = 0.1v to v cc output leakage current i lo -10 10 av out = 0.1v to v cc pin capacitance (all inputs/outputs) c in , c out ? 10 pf v cc = 5.0v (note) t amb = 25 c, f clk = 1 mhz operating current i cc write i cc read ? ? 3 1 ma ma v cc = 5.5v, scl = 400 khz ? standby current i ccs ? ? 30 100 a a v cc = 3.0v, sda = scl = v cc v cc = 5.5v, sda = scl = v cc wp = v ss note: this parameter is periodically sampled and not 100% tested. t su : sta t hd : sta v hys t su : sto start stop scl sda
? 2001 microchip technology inc. ds21051h-page 3 24lc04b/08b table 1-3: ac characteristics v cc = +2.5v to 5.5v commercial (c): t amb = 0 c to +70 c industrial (i): t amb = -40 c to +85 c automotive (e): t amb = -40 c to +125 c parameter symbol min max units conditions clock frequency f clk ? ? 400 100 khz 4.5v v cc 5.5v 2.5v v cc 5.5v (e-temp. range) clock high time t high 600 4000 ? ? ns 4.5v v cc 5.5v 2.5v v cc 5.5v (e-temp. range) clock low time t low 1300 4700 ? ? ns 4.5v v cc 5.5v 2.5v v cc 5.5v (e-temp. range) sda and scl rise time (note 1) t r ? ? 300 1000 ns 4.5v v cc 5.5v (note 1) 2.5v v cc 5.5v (e-temp. range) (note 1) sda and scl fall time t f ? 300 ns (note 1) start condition hold time t hd : sta 600 4000 ? ? ns 4.5v v cc 5.5v 2.5v v cc 5.5v (e-temp. range) start condition setup time t su : sta 600 4700 ? ? ns 4.5v v cc 5.5v 2.5v v cc 5.5v (e-temp. range) data input hold time t hd : dat 0 ? ns (note 2) data input setup time t su : dat 100 250 ? ? ns 4.5v v cc 5.5v 2.5v v cc 5.5v (e-temp. range) stop condition setup time t su : sto 600 4000 ? ? ns 4.5v v cc 5.5v 2.5v v cc 5.5v (e-temp. range) output valid from clock (note 2) t aa ? ? 900 3500 ns 4.5v v cc 5.5v 2.5v v cc 5.5v (e-temp. range) bus free time: time the bus must be free before a new transmission can start t buf 1300 4700 ? ? ns 4.5v v cc 5.5v 2.5v v cc 5.5v (e-temp. range) output fall time from v ih minimum to v il maximum t of 20+0.1c b ? 250 250 ns 4.5v v cc 5.5v (note 1) 2.5v v cc 5.5v (e-temp. range) (note 1) input filter spike suppression (sda and scl pins) t sp ? 50 ns (notes 1 and 3) write cycle time (byte or page) t wc ? 5ms ? endurance 1m ? cycles 25 c, v cc = 5.0v, block mode (note 4) note 1: not 100% tested. c b = total capacitance of one bus line in pf. 2: as a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum 300 ns) of the falling edge of scl to avoid unintended generation of start or stop conditions. 3: the combined tsp and vhys specifications are due to new schmitt trigger inputs which provide improved noise spike suppression. this eliminates the need for a t i specification for standard operation. 4: this parameter is not tested but ensured by characterization. for endurance estimates in a specific application, please consult the total endurance model which can be obtained on microchip ? s website: www.microchip.com.
24lc04b/08b ds21051h-page 4 ? 2001 microchip technology inc. figure 1-2: bus timing data 2.0 functional description the 24lc04b/08b supports a bi-directional 2-wire bus and data transmission protocol. a device that sends data onto the bus is defined as transmitter and if receiv- ing data, as receiver. the bus has to be controlled by a master device which generates the serial clock (scl), controls the bus access and generates the start and stop conditions, while the 24lc04b/08b works as slave. both master and slave can operate as transmit- ter or receiver, but the master device determines which mode is activated. 3.0 bus characteristics the following bus protocol has been defined: data transfer may be initiated only when the bus is not busy during data transfer, the data line must remain stable whenever the clock line is high. changes in the data line while the clock line is high will be interpreted as a start or stop condition accordingly, the following bus conditions have been defined (figure 3-1). 3.1 bus not busy (a) both data and clock lines remain high. 3.2 start data transfer (b) a high to low transition of the sda line while the clock (scl) is high determines a start condition. all commands must be preceded by a start condition. 3.3 stop data transfer (c) a low to high transition of the sda line while the clock (scl) is high determines a stop condition. all operations must be ended with a stop condition. 3.4 data valid (d) the state of the data line represents valid data when, after a start condition, the data line is stable for the duration of the high period of the clock signal. the data on the line must be changed during the low period of the clock signal. there is one clock pulse per bit of data. each data transfer is initiated with a start condition and terminated with a stop condition. the number of the data bytes transferred between the start and stop conditions is determined by the master device and is theoretically unlimited, although only the last 16 will be stored when doing a write operation. when an overwrite does occur it will replace data in a first in first out fashion. 3.5 acknowledge each receiving device, when addressed, is obliged to generate an acknowledge after the reception of each byte. the master device must generate an extra clock pulse which is associated with this acknowledge bit. the device that acknowledges, has to pull down the sda line during the acknowledge clock pulse in such a way that the sda line is stable low during the high period of the acknowledge related clock pulse. of course, setup and hold times must be taken into account. a master must signal an end of data to the slave by not generating an acknowledge bit on the last byte that has been clocked out of the slave. in this case, the slave must leave the data line high to enable the master to generate the stop condition. t su : sta t f t low t high t r t hd : dat t su : dat t su : sto t hd : sta t buf t aa t aa t sp t hd : sta scl sda in sda out note: the 24lc04b/08b does not generate any acknowledge bits if an internal pro- gramming cycle is in progress.
? 2001 microchip technology inc. ds21051h-page 5 24lc04b/08b figure 3-1: data transfer sequence on the serial bus scl sda (a) (b) (d) (d) (a) (c) start condition address or acknowledge valid data allowed to change stop condition
24lc04b/08b ds21051h-page 6 ? 2001 microchip technology inc. 3.6 device addressing a control byte is the first byte received following the start condition from the master device. the control byte consists of a 4-bit control code, for the 24lc04b/08b this is set as 1010 binary for read and write operations. the next three bits of the control byte are the block select bits (b2, b1, b0). b2 is a ? don't care ? for both the 24lc04b and 24lc08b; b1 is a ? don't care ? for the 24lc04b. they are used by the master device to select which of the two or four 256 word blocks of memory are to be accessed. these bits are in effect the most signif- icant bits of the word address. the last bit of the control byte defines the operation to be performed. when set to ? 1 ? , a read operation is selected and when set to ? 0 ? , a write operation is selected. following the start condition, the 24lc04b/ 08b monitors the sda bus checking the device type identifier being transmitted. upon a 1010 code, the slave device outputs an acknowledge signal on the sda line. depending on the state of the r/w bit, the 24lc04b/08b will select a read or write operation. figure 3-2: control byte allocation operation control code block select r/w read 1010 block address 1 write 1010 block address 0 x = ? don ? t care ? . b1 is ? don ? t care ? for 24lc04b. 1010 xb1b0 r/w a start read/write slave address
? 2001 microchip technology inc. ds21051h-page 7 24lc04b/08b 4.0 write operation 4.1 byte write following the start condition from the master, the device code (4 bits), the block address (3 bits) and the r/w bit, which is a logic low is placed onto the bus by the master transmitter. this indicates to the addressed slave receiver that a byte with a word address will fol- low after it has generated an acknowledge bit during the ninth clock cycle. therefore, the next byte transmit- ted by the master is the word address and will be writ- ten into the address pointer of the 24lc04b/08b. after receiving another acknowledge signal from the 24lc04b/08b, the master device will transmit the data word to be written into the addressed memory location. the 24lc04b/08b acknowledges again and the mas- ter generates a stop condition. this initiates the internal write cycle. during this time, the 24lc04b/08b will not generate acknowledge signals (figure 4-1). 4.2 page write the write control byte, word address and the first data byte are transmitted to the 24lc04b/08b in the same way as in a byte write. but instead of generating a stop condition, the master transmits up to 16 data bytes to the 24lc04b/08b which are temporarily stored in the on-chip page buffer and will be written into the memory after the master has transmitted a stop condition. after the receipt of each word, the four lower order address pointer bits are internally incremented by one. the higher order seven bits of the word address remains constant. if the master should transmit more than 16 words prior to generating the stop condition, the address counter will roll over and the previously received data will be overwritten. as with the byte write operation, once the stop condition is received an inter- nal write cycle will begin (figure 4-2). figure 4-1: byte write figure 4-2: page write note: page write operations are limited to writing bytes within a single physical page, regardless of the number of bytes actually being written. physical page boundaries start at addresses that are integer multiples of the page buffer size (or ? page size ? ) and end at addresses that are integer multiples of [page size - 1]. if a page write com- mand attempts to write across a physi- cal page boundary, the result is that the data wraps around to the beginning of the current page (overwriting data pre- viously stored there), instead of being written to the next page as might be expected. it is therefore necessary for the application software to prevent page write operations that would attempt to cross a page boundary. s p bus activity master sda line bus activity s t a r t s t o p control byte word address data a c k a c k a c k s p bus activity master sda line bus activity s t a r t control byte word address (n) data (n) data (n + 15) s t o p a c k a c k a c k a c k a c k data (n + 1)
24lc04b/08b ds21051h-page 8 ? 2001 microchip technology inc. 5.0 acknowledge polling since the device will not acknowledge during a write cycle, this can be used to determine when the cycle is complete (this feature can be used to maximize bus throughput). once the stop condition for a write com- mand has been issued from the master, the device ini- tiates the internally timed write cycle. ack polling can be initiated immediately. this involves the master send- ing a start condition followed by the control byte for a write command (r/w = 0 ). if the device is still busy with the write cycle, then no ack will be returned. if the cycle is complete, then the device will return the ack and the master can then proceed with the next read or write command. see figure 5-1 for flow diagram. figure 5-1: acknowledge polling flow 6.0 write protection the 24lc04b/08b can be used as a serial rom when the wp pin is connected to v cc . programming will be inhibited and the entire memory will be write-protected. 7.0 read operation read operations are initiated in the same way as write operations with the exception that the r/w bit of the slave address is set to a ? 1 ? . there are three basic types of read operations: current address read, random read and sequential read. 7.1 current address read the 24lc04b/08b contains an address counter that maintains the address of the last word accessed, inter- nally incremented by one. therefore, if the previous access (either a read or write operation) was to address n, the next current address read operation would access data from address n + 1 . upon receipt of the slave address with r/w bit set to ? 1 ? , the 24lc04b/ 08b issues an acknowledge and transmits the 8-bit data word. the master will not acknowledge the trans- fer but does generate a stop condition and the 24lc04b/08b discontinues transmission (figure 7-1). 7.2 random read random read operations allow the master to access any memory location in a random manner. to perform this type of read operation, first the word address must be set. this is done by sending the word address to the 24lc04b/08b as part of a write operation. after the word address is sent, the master generates a start con- dition following the acknowledge. this terminates the write operation, but not before the internal address pointer is set. then the master issues the control byte again but with the r/w bit set to a ? 1 ? . the 24lc04b/ 08b will then issue an acknowledge and transmits the 8-bit data word. the master will not acknowledge the transfer but does generate a stop condition and the 24lc04b/08b discontinues transmission (figure 7-2). 7.3 sequential read sequential reads are initiated in the same way as a ran- dom read except that after the 24lc04b/08b transmits the first data byte, the master issues an acknowledge as opposed to a stop condition in a random read. this directs the 24lc04b/08b to transmit the next sequen- tially addressed 8-bit word (figure 7-3). to provide sequential reads the 24lc04b/08b contains an internal address pointer which is incremented by one at the completion of each operation. this address pointer allows the entire memory contents to be serially read during one operation. 7.4 noise protection the 24lc04b/08b employs a v cc threshold detector circuit which disables the internal erase/write logic if the v cc is below 1.5 volts at nominal conditions. the scl and sda inputs have schmitt trigger and filter circuits which suppress noise spikes to assure proper device operation even on a noisy bus. send write command send stop condition to initiate write cycle send start send control byte with r/w = 0 did device acknowledge (ack = 0)? next operation no yes
? 2001 microchip technology inc. ds21051h-page 9 24lc04b/08b figure 7-1: current address read figure 7-2: random read figure 7-3: sequential read 8.0 pin descriptions 8.1 sda serial address/data input/ output this is a bi-directional pin used to transfer addresses and data into and data out of the device. it is an open drain terminal. therefore, the sda bus requires a pull- up resistor to v cc (typical 10k ? for 100 khz, 2 k ? for 400 khz). for normal data transfer, sda is allowed to change only during scl low. changes during scl high are reserved for indicating the start and stop condi- tions. 8.2 scl serial clock this input is used to synchronize the data transfer from and to the device. 8.3 wp this pin must be connected to either v ss or v cc . if tied to v ss , normal memory operation is enabled (read/write the entire memory). if tied to v cc , write operations are inhibited. the entire memory will be write-protected. read operations are not affected. this feature allows the user to use the 24lc04b/08b as a serial rom when wp is enabled (tied to v cc ). 8.4 a0, a1, a2 these pins are not used by the 24lc04b/08b. they may be left floating or tied to either v ss or v cc . sp bus activity master sda line bus activity s t a r t s t o p control byte data (n) a c k n o a c k s p s bus activity master sda line bus activity s t a r t s t o p control byte a c k word address (n) control byte s t a r t data (n) a c k a c k n o a c k p bus activity master sda line bus activity s t o p control byte a c k n o a c k data (n) data (n + 1) data (n + 2) data (n + x) a c k a c k a c k
24lc04b/08b ds21051h-page 10 ? 2001 microchip technology inc. 9.0 packaging information 9.1 package marking information xxxxxxxx xxxxxnnn yyww 8-lead pdip (300 mil) example 24lc04b xxxxxnnn 8-lead soic (150 mil) example legend: xx...x customer specific information* y year code (last digit of calendar year) yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week ? 01 ? ) nnn alphanumeric traceability code note : in the event the full microchip part number cannot be marked on one line, it will be carried over to the next line thus limiting the number of available characters for customer specific information. * standard picmicro device marking consists of microchip part number, year code, week code and traceability code. for picmicro device marking beyond this, certain price adders apply. please check with your microchip sales office. for qtp devices, any special marking adders are included in qtp price. xxxxxxxx xxxxyyww nnn 24lc04b xxxx0025 8-lead tssop example xxxx xyww nnn nnn 0025 4l04 iyww nnn 8-lead msop example xxxxx ywwnnn 4l4bi ywwnnn
? 2001 microchip technology inc. ds21051h-page 11 24lc04b/08b 8-lead plastic dual in-line (p) ? 300 mil (pdip) b1 b a1 a l a2 p e eb c e1 n d 1 2 units inches* millimeters dimension limits min nom max min nom max number of pins n 88 pitch p .100 2.54 top to seating plane a .140 .155 .170 3.56 3.94 4.32 molded package thickness a2 .115 .130 .145 2.92 3.30 3.68 base to seating plane a1 .015 0.38 shoulder to shoulder width e .300 .313 .325 7.62 7.94 8.26 molded package width e1 .240 .250 .260 6.10 6.35 6.60 overall length d .360 .373 .385 9.14 9.46 9.78 tip to seating plane l .125 .130 .135 3.18 3.30 3.43 lead thickness c .008 .012 .015 0.20 0.29 0.38 upper lead width b1 .045 .058 .070 1.14 1.46 1.78 lower lead width b .014 .018 .022 0.36 0.46 0.56 overall row spacing eb .310 .370 .430 7.87 9.40 10.92 mold draft angle top 51015 51015 mold draft angle bottom 51015 51015 * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed jedec equivalent: ms-001 drawing no. c04-018 .010 ? (0.254mm) per side. significant characteristic
24lc04b/08b ds21051h-page 12 ? 2001 microchip technology inc. 8-lead plastic small outline (sn) ? narrow, 150 mil (soic) foot angle f 048048 15 12 0 15 12 0 mold draft angle bottom 15 12 0 15 12 0 mold draft angle top 0.51 0.42 0.33 .020 .017 .013 b lead width 0.25 0.23 0.20 .010 .009 .008 c lead thickness 0.76 0.62 0.48 .030 .025 .019 l foot length 0.51 0.38 0.25 .020 .015 .010 h chamfer distance 5.00 4.90 4.80 .197 .193 .189 d overall length 3.99 3.91 3.71 .157 .154 .146 e1 molded package width 6.20 6.02 5.79 .244 .237 .228 e overall width 0.25 0.18 0.10 .010 .007 .004 a1 standoff 1.55 1.42 1.32 .061 .056 .052 a2 molded package thickness 1.75 1.55 1.35 .069 .061 .053 a overall height 1.27 .050 p pitch 8 8 n number of pins max nom min max nom min dimension limits millimeters inches* units 2 1 d n p b e e1 h l c 45 f a2 a a1 * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed .010 ? (0.254mm) per side. jedec equivalent: ms-012 drawing no. c04-057 significant characteristic
? 2001 microchip technology inc. ds21051h-page 13 24lc04b/08b 8-lead plastic thin shrink small outline (st) ? 4.4 mm (tssop) 10 5 0 10 5 0 mold draft angle bottom 10 5 0 10 5 0 mold draft angle top 0.30 0.25 0.19 .012 .010 .007 b lead width 0.20 0.15 0.09 .008 .006 .004 c lead thickness 0.70 0.60 0.50 .028 .024 .020 l foot length 3.10 3.00 2.90 .122 .118 .114 d molded package length 4.50 4.40 4.30 .177 .173 .169 e1 molded package width 6.50 6.38 6.25 .256 .251 .246 e overall width 0.15 0.10 0.05 .006 .004 .002 a1 standoff 0.95 0.90 0.85 .037 .035 .033 a2 molded package thickness 1.10 .043 a overall height 0.65 .026 p pitch 8 8 n number of pins max nom min max nom min dimension limits millimeters* inches units a2 a a1 l c f 1 2 d n p b e e1 foot angle f 048048 * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed .005 ? (0.127mm) per side. jedec equivalent: mo-153 drawing no. c04-086 significant characteristic
24lc04b/08b ds21051h-page 14 ? 2001 microchip technology inc. 8-lead plastic micro small outline package (ms) (msop) p a a1 a2 d l c dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not .037 .035 f footprint (reference) exceed .010" (0.254mm) per side. notes: drawing no. c04-111 *controlling parameter mold draft angle top mold draft angle bottom foot angle lead width lead thickness c b 7 7 .004 .010 0 .006 .012 (f) dimension limits overall height molded package thickness molded package width overall length foot length standoff overall width number of pins pitch a l e1 d a1 e a2 .016 .114 .114 .022 .118 .118 .002 .030 .193 .034 min p n units .026 nom 8 inches 1.00 0.95 0.90 .039 0.15 0.30 .008 .016 6 0.10 0.25 0 7 7 0.20 0.40 6 millimeters* 0.65 0.86 3.00 3.00 0.55 4.90 .044 .122 .028 .122 .038 .006 0.40 2.90 2.90 0.05 0.76 min max nom 1.18 0.70 3.10 3.10 0.15 0.97 max 8 e1 e b n 1 2 significant characteristic .184 .200 4.67 .5.08
? 2001 microchip technology inc. ds21051h-page 15 24lc04b/08b on-line support microchip provides on-line support on the microchip world wide web (www) site. the web site is used by microchip as a means to make files and information easily available to customers. to view the site, the user must have access to the internet and a web browser, such as netscape ? or microsoft ? explorer. files are also available for ftp download from our ftp site. connecting to the microchip internet web site the microchip web site is available by using your favorite internet browser to attach to: www.microchip.com the file transfer site is available by using an ftp ser- vice to connect to: ftp://ftp.microchip.com the web site and file transfer site provide a variety of services. users may download files for the latest development tools, data sheets, application notes, user ? s guides, articles and sample programs. a vari- ety of microchip specific business information is also available, including listings of microchip sales offices, distributors and factory representatives. other data available for consideration is: latest microchip press releases technical support section with frequently asked questions design tips device errata job postings microchip consultant program member listing links to other useful web sites related to microchip products conferences for products, development systems, technical information and more listing of seminars and events systems information and upgrade hot line the systems information and upgrade line provides system users a listing of the latest versions of all of microchip's development systems software products. plus, this line provides information on how customers can receive any currently available upgrade kits.the hot line numbers are: 1-800-755-2345 for u.s. and most of canada, and 1-480-792-7302 for the rest of the world.
24lc04b/08b ds21051h-page 16 ? 2001 microchip technology inc. reader response it is our intention to provide you with the best documentation possible to ensure successful use of your microchip prod- uct. if you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation can better serve you, please fax your comments to the technical publications manager at (480) 792-7578. please list the following information, and use this outline to provide us with your comments about this data sheet. to : technical publications manager re: reader response total pages sent from: name company address city / state / zip / country telephone: (_______) _________ - _________ application (optional): would you like a reply? y n device: literature number: questions: fax: (______) _________ - _________ ds21051h 24lc04b/08b 1. what are the best features of this document? 2. how does this document meet your hardware and software development needs? 3. do you find the organization of this data sheet easy to follow? if not, why? 4. what additions to the data sheet do you think would enhance the structure and subject? 5. what deletions from the data sheet could be made without affecting the overall usefulness? 6. is there any incorrect or misleading information (what and where)? 7. how would you improve this document? 8. how would you improve our software, systems, and silicon products?
? 2001 microchip technology inc. ds21051h-page 17 24lc04b/08b product identification system to order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. sales and support part no. x /xx xxx pattern package temperature range device device: 24lc04b: v dd range 1.8v to 5.5v 24lc04bt: (tape and reel) 24lc08b: v dd range 2.5v to 5.5v 24lc08bt: (tape and reel) temperature range: -= 0 c to+70 c i=-40 c to+85 c e= -40 c to+125 c package: p = plastic dip (300 mil body), 8-lead sn = plastic soic (150 mil body), 8-lead st = plastic tssop (4.4mm body), 8-lead ms = msop, 8-lead examples: a) 24lc04b ? i/p industrial temp, pdip package, normal v dd limits. b) 24lc08b/sn commercial temp., soic package, normal v dd limits. data sheets products supported by a preliminary data sheet may have an errata sheet describing minor operational differences and recommended workarounds. to determine if an errata sheet exists for a particular device, please contact one of the following: 1. your local microchip sales office 2. the microchip corporate literature center u.s. fax: (480) 792-7277 3. the microchip worldwide site (www.microchip.com) please specify which device, revision of silicon and data sheet (include literature #) you are using. new customer notification system register on our web site (www.microchip.com/cn) to receive the most current information on our products.
24lc04b/08b ds21051h-page 18 ? 2001 microchip technology inc. notes:
? 2001 microchip technology inc. ds21051h-page 19 24lc04b/08b ? all rights reserved. copyright ? 2001, microchip technology incorporated, usa. information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. no representation or warranty is given and no liability is assumed by microchip technology incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. use of microchip ? s products as critical components in life support systems is not authorized except with express written approval by microchip. no licenses are conveyed, implicitly or otherwise, under any intellectual property rights. the microchip logo and name are registered trademarks of microchip technology inc. in the u.s.a. and other countries. all rights reserved. all other trademarks mentioned herein are the property of their respective companies. no licenses are conveyed, implicitly or otherwise, under any intellectual property rights. ? trademarks the microchip name, logo, pic, picmicro, picmaster, picstart, pro mate, k ee l oq , seeval, mplab and the embedded control solutions company are registered trademarks of microchip technology incorporated in the u.s.a. and other countries. total endurance, icsp, in-circuit serial programming, filterlab, mxdev, microid, flexrom, fuzzylab, mpasm, mplink, mplib, picdem, icepic, migratable memory, fansense, economonitor, select mode and microport are trademarks of microchip technology incorporated in the u.s.a. serialized quick term programming (sqtp) is a service mark of microchip technology incorporated in the u.s.a. all other trademarks mentioned herein are property of their respective companies. ? 2001, microchip technology incorporated, printed in the u.s.a., all rights reserved. microchip received qs-9000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona in july 1999. the company?s quality system processes and procedures are qs-9000 compliant for its picmicro ? 8-bit mcus, k ee l oq ? code hopping devices, serial eeproms and microperipheral products. in addition, microchip ? s quality system for the design and manufacture of development systems is iso 9001 certified.
information contained in this publication regarding device applications and the like is intended through suggestion only and ma y be superseded by updates. it is your responsibility to ensure that your application meets with your specifications. no representation or warrant y is given and no liability is assumed by microchip technology incorporated with respect to the accuracy or use of such information, or infringement of patent s or other intellectual property rights arising from such use or otherwise. use of microchip ? s products as critical components in life support systems is not authorized except with express written approval by microchip. no licenses are conveyed, implicitly or otherwise, except as maybe explicitly expressed herein, under any intellec- tual property rights. the microchip logo and name are registered trademarks of microchip technology inc. in the u.s.a. and othe r countries. all rights reserved. all other trademarks mentioned herein are the property of their respective companies. ds21051h-page 20 ? 2001 microchip technology inc. all rights reserved. ? 2001 microchip technology incorporated. printed in the usa. 4/01 printed on recycled paper. m americas corporate office 2355 west chandler blvd. chandler, az 85224-6199 tel: 480-792-7200 fax: 480-792-7277 technical support: 480-792-7627 web address: http://www.microchip.com rocky mountain 2355 west chandler blvd. chandler, az 85224-6199 tel: 480-792-7966 fax: 480-792-7456 atlanta 500 sugar mill road, suite 200b atlanta, ga 30350 tel: 770-640-0034 fax: 770-640-0307 austin analog product sales 8303 mopac expressway north suite a-201 austin, tx 78759 tel: 512-345-2030 fax: 512-345-6085 boston 2 lan drive, suite 120 westford, ma 01886 tel: 978-692-3848 fax: 978-692-3821 boston analog product sales unit a-8-1 millbrook tarry condominium 97 lowell road concord, ma 01742 tel: 978-371-6400 fax: 978-371-0050 chicago 333 pierce road, suite 180 itasca, il 60143 tel: 630-285-0071 fax: 630-285-0075 dallas 4570 westgrove drive, suite 160 addison, tx 75001 tel: 972-818-7423 fax: 972-818-2924 dayton two prestige place, suite 130 miamisburg, oh 45342 tel: 937-291-1654 fax: 937-291-9175 detroit tri-atria office building 32255 northwestern highway, suite 190 farmington hills, mi 48334 tel: 248-538-2250 fax: 248-538-2260 los angeles 18201 von karman, suite 1090 irvine, ca 92612 tel: 949-263-1888 fax: 949-263-1338 mountain view analog product sales 1300 terra bella avenue mountain view, ca 94043-1836 tel: 650-968-9241 fax: 650-967-1590 new york 150 motor parkway, suite 202 hauppauge, ny 11788 tel: 631-273-5305 fax: 631-273-5335 san jose microchip technology inc. 2107 north first street, suite 590 san jose, ca 95131 tel: 408-436-7950 fax: 408-436-7955 toronto 6285 northam drive, suite 108 mississauga, ontario l4v 1x5, canada tel: 905-673-0699 fax: 905-673-6509 asia/pacific australia microchip technology australia pty ltd suite 22, 41 rawson street epping 2121, nsw australia tel: 61-2-9868-6733 fax: 61-2-9868-6755 china - beijing microchip technology beijing office unit 915 new china hong kong manhattan bldg. no. 6 chaoyangmen beidajie beijing, 100027, no. china tel: 86-10-85282100 fax: 86-10-85282104 china - shanghai microchip technology shanghai office room 701, bldg. b far east international plaza no. 317 xian xia road shanghai, 200051 tel: 86-21-6275-5700 fax: 86-21-6275-5060 hong kong microchip asia pacific rm 2101, tower 2, metroplaza 223 hing fong road kwai fong, n.t., hong kong tel: 852-2401-1200 fax: 852-2401-3431 india microchip technology inc. india liaison office divyasree chambers 1 floor, wing a (a3/a4) no. 11, o ? shaugnessey road bangalore, 560 025, india tel: 91-80-2290061 fax: 91-80-2290062 japan microchip technology intl. inc. benex s-1 6f 3-18-20, shinyokohama kohoku-ku, yokohama-shi kanagawa, 222-0033, japan tel: 81-45-471- 6166 fax: 81-45-471-6122 asia/pacific (continued) korea microchip technology korea 168-1, youngbo bldg. 3 floor samsung-dong, kangnam-ku seoul, korea tel: 82-2-554-7200 fax: 82-2-558-5934 singapore microchip technology singapore pte ltd. 200 middle road #07-02 prime centre singapore, 188980 tel: 65-334-8870 fax: 65-334-8850 taiwan microchip technology taiwan 11f-3, no. 207 tung hua north road taipei, 105, taiwan tel: 886-2-2717-7175 fax: 886-2-2545-0139 europe denmark microchip technology denmark aps regus business centre lautrup hoj 1-3 ballerup dk-2750 denmark tel: 45 4420 9895 fax: 45 4420 9910 france arizona microchip technology sarl parc d ? activite du moulin de massy 43 rue du saule trapu batiment a - ler etage 91300 massy, france tel: 33-1-69-53-63-20 fax: 33-1-69-30-90-79 germany arizona microchip technology gmbh gustav-heinemann ring 125 d-81739 munich, germany tel: 49-89-627-144 0 fax: 49-89-627-144-44 germany analog product sales lochhamer strasse 13 d-82152 martinsried, germany tel: 49-89-895650-0 fax: 49-89-895650-22 italy arizona microchip technology srl centro direzionale colleoni palazzo taurus 1 v. le colleoni 1 20041 agrate brianza milan, italy tel: 39-039-65791-1 fax: 39-039-6899883 united kingdom arizona microchip technology ltd. 505 eskdale road winnersh triangle wokingham berkshire, england rg41 5tu tel: 44 118 921 5869 fax: 44-118 921-5820 01/30/01 w orldwide s ales and s ervice

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