sfx-424g synchronous clock generators pll 2111 comprehensive drive aurora, illinois 60505 phone: 630- 851- 4722 fax: 630- 851- 5040 www.conwin.com bulletin sg124 page 1 of 8 revision 00 date 09 dec 08 issued by eng applications ? sonet / sdh / atm dwdm / fdm fec (forward error correction) features 3.3v high precision pll jitter generation oc-192 compliant surface mount accepts up to 4 inputs from an external mux inputs compatible with cmos/lvds/lvpecl frequency translation up to 800 mhz alarm detection for loss of lock/ loss of reference condition rohs compliant
data sheet #: sg124 p age 2 of 8 rev: 00 date: 12/09/08 ? copyright 2008 the connor-winfield corp. all rights reserved specifications subject to change without notice specifications table 2 symbol parameter minimum nominal maximum units notes f in input frequencies 8 k - 100 m hz f out output frequencies (lvpecl) 19.44 m - 800 m hz output frequencies (lvcmos) 8 m - 130 m hz vcc supply voltage (3.3 v dc ) 3.13 3.3 3.46 v olts i cc supply current - 60 - ma lvcmos input v ih 2 - vcc volts v il -0.3 - 0.8 volts lvpecl input v ih 1.49 - 2.72 v olts v il 0.86 - 2.125 v olts lvcmos output (option a) typ. lvcmos lvpecl output (option f) v oh (temp. range c = 0c to 70c) 2.275 - v v ol (temp. range c = 0c to 70c) - - 1.68 v v oh (temp. range f = -40c to 85c) 2.275 - v v ol (temp. range f = -40c to 85c) - - 1.68 v t r /t f rise/fall time @20% to 80% - 0.6 1.5 ns sym output symmetry 45 55 % j gen jitter generation rms --1 ps (12 khz - 20 mhz) j tran jitter transfer - - 0.1 db 1.0 apr input frequency tracking 40 - ppm t op operating temperature f = -40 - 85 c c =0-70c the sfx-424g is a high precision frequency translator that translates up to four inputs from 8 khz to 100mhz , to output frequencies between 8 mhz and 800 mhz. the sfx-424g supports all major fec rates such as 15/14, 255/237 etc. sfx-424g is well suited for use in line cards, service termination cards and similar functions to provide reliable reference, phase locked, synchronization for tdm, pdh, sonet and sdh network equipment. the sfx-424g provides a jitter filtered, wander following output signal synchronized to a superior stratum or peer input reference signal. the sfx-424g includes a lock detect alarm output. the pll control voltage is brought out through a 470 k ? resistor and can be used to determine when the pull range limits are reached. the lvpecl outputs may be put into the tri-state high impedance condition for external testing purposes by asserting a high signal to the enable/disable pin. parts are assembled using high temperature solder to withstand surface mount reflow process. this product is compliant with all required rohs specifications. absolute maximum rating table 1 symbol parameter minimum nominal maximum units notes vcc power supply voltage (optiond) -0.3 - 4.0 volts v i input voltage -0.2 - vcc +0.3v volts ts storage temperature (optionf) -55 - 125 c storage temperature (optiona) -40 - 85 c general description notes: 1.0: gr-253-core, sec. 5.6.2.1.2
data sheet #: sg124 p age 3 of 8 rev: 00 date: 12/09/08 ? copyright 2008 the connor-winfield corp. all rights reserved specifications subject to change without notice pin description table 3 pin # symbol i/o level function 1 sel0 i lvttl input frequency select .* 10k ? ? ? ? ? pull down resistor 2 sel1 i lvttl input frequency select .* 10k ? pull down resistor 3 gnd gnd supply ground 4 missing 5 vmon o analog vcxo control voltageunder locked conditions vmon should be > 0.3v and <3.0v. the input frequency may be out of range if the voltage is outside of this voltage range. 6 od i lvcmos output disable disable = logic 1 enable = logic 0 or no connect 7 gnd gnd supply ground 8 fout o l vpecl or lvcmos frequency output 9 cfout o l vpecl or gnd complementary frequency output note: for the lvcmos option, this connection is tied to gnd 10 ld o lvcmos lock detect locked = logic 1 loss of signal = logic 0 11 gnd gnd supply ground 12 gnd gnd supply ground 13 fin i lvpecl or lvcmos input frequencynote: input is ac coupled for handling either lvcmos or lvpecl input signals 14 vcc vcc supply power supply voltage (3.3v 5%) functional block diagram figure 1 frequency divider loop filter osc frequency divider f out (pin 8) cf out (pin 9) f in (pin 13) sel0 (pin 1) sel1 (pin 2) v mon (pin 5) od ( pin 6 ) ld (pin 10) microprocessor 470 k ? 10 k ? 0.01 f 10 k ?
data sheet #: sg124 p age 4 of 8 rev: 00 date: 12/09/08 ? copyright 2008 the connor-winfield corp. all rights reserved specifications subject to change without notice output load and power supply filtering recommendations figure 2 50 ? 50 ? v cc -2 v dc ** * * it is highly recommended that either a linear regulator or bypass capacitors be used. typical values would be 10 uf, 0.1 uf, 100 pf. ref 1 ref 2 ref 3 ref 4 only required for option f frequency divider loop filter osc frequency divider f out (pin 8) cf out (pin 9) f in (pin 13) sel0 (pin 1) sel1 (pin 2) v mon (pin 5) od (pin 6) ld (pin 10) microprocessor 470 k ? 10 k ? 0.01 f 10 k ? package dimensions figure 3 2.54 2 . 5 4 .100 . 1 0 0 r 0.51 0 . 5 1 .020 . 0 2 0 20.32 2 0 . 3 2 .800 . 8 0 0 13.72 1 3 . 7 2 .540 . 5 4 0 pin 1 p i n 1 19.81 1 9 . 8 1 .780 . 7 8 0 12.19 1 2 . 1 9 .480 . 4 8 0 5.84 5 . 8 4 .230 . 2 3 0 4.29 4 . 2 9 .169 . 1 6 9 mm [ inches ] recommended footprint dimensions figure 4 12.446 [0.490] 3.048 [0.120] 1.905 [0.075] 15.240 [0.600] 2.540 [0.100] 7.620 [0.300] 6.223 [0.245] mm (in) c l c l
data sheet #: sg124 p age 5 of 8 rev: 00 date: 12/09/08 ? copyright 2008 the connor-winfield corp. all rights reserved specifications subject to change without notice solder profile figure 5 0 50 100 150 200 250 300 0 50 100 150 200 250 300 350 time (sec) temp (c) 221c reflow zone 30/90 sec (min/max) peak temp. 245-255c for 15 sec typ. soaking zone 60-90 sec typ. (2 min max) ramp slope not to exceed 3c/sec
data sheet #: sg124 p age 6 of 8 rev: 00 date: 12/09/08 ? copyright 2008 the connor-winfield corp. all rights reserved specifications subject to change without notice ordering information standard frequencies 8 khz c 38.8800 mhz x 16 khz d 44.7360 mhz y 64 khz e 51.84 mhz 0 1.024 mhz f 61.44 mhz 1 1.544 mhz h 77.76 mhz 2 2.048 mhz j 82.944 mhz 3 4.096 mhz k 112.00 mhz 4 8.192 mhz l 139.2640 mhz 5 13.0000 mhz m 155.5200 mhz 6 16.3840 mhz n 166.6286 mhz 7 19.4400 mhz p 622.0800 mhz 8 20.4800 mhz r 666.5143 mhz 9 26.0000 mhz t input freq. not listed s 27.0000 mhz w output freq. not listed s sfx-424g- x x x - x x x x supply voltage d = 3.3 v dc 5% output logic a = lvcmos f = comp. lvpecl temperature range c = 0?c to 70?c f = -4 0?c to 85?c input logic a = lvcmos f = lv p e c l number of input frequencies 1: 1 input frequency 2: 2 input frequencies 3: 3 input frequencies 4: 4 input frequencies input frequency (options c - 3) see standard frequencies chart above. * if the desired frequency is not listed, please consult a sales representative for availabilty of additional frequencies. output frequency (options l - 9) see standard frequencies chart above. * if the desired frequency is not listed, please consult a sales representative for availabilty of additional frequencies.
data sheet #: sg124 p age 7 of 8 rev: 00 date: 12/09/08 ? copyright 2008 the connor-winfield corp. all rights reserved specifications subject to change without notice
2111 comprehensive drive aurora, illinois 60505 phone: 630- 851- 4722 fax: 630- 851- 5040 www.conwin.com revision revision date note p00 6/30/06 preliminary release p01 2/6/07 added solder profile p02 3/1/07 added mechanical drawing p03 6/7/07 updated solder profile p04 1/22/08 updated output frequency range p05 9/19/08 added input frequency range to tbl. 2 00 12/09/08 change from preliminary to release
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